tidss_crtc.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/
  4. * Author: Tomi Valkeinen <[email protected]>
  5. */
  6. #include <drm/drm_atomic.h>
  7. #include <drm/drm_atomic_helper.h>
  8. #include <drm/drm_crtc.h>
  9. #include <drm/drm_crtc_helper.h>
  10. #include <drm/drm_gem_dma_helper.h>
  11. #include <drm/drm_vblank.h>
  12. #include "tidss_crtc.h"
  13. #include "tidss_dispc.h"
  14. #include "tidss_drv.h"
  15. #include "tidss_irq.h"
  16. #include "tidss_plane.h"
  17. /* Page flip and frame done IRQs */
  18. static void tidss_crtc_finish_page_flip(struct tidss_crtc *tcrtc)
  19. {
  20. struct drm_device *ddev = tcrtc->crtc.dev;
  21. struct tidss_device *tidss = to_tidss(ddev);
  22. struct drm_pending_vblank_event *event;
  23. unsigned long flags;
  24. bool busy;
  25. spin_lock_irqsave(&ddev->event_lock, flags);
  26. /*
  27. * New settings are taken into use at VFP, and GO bit is cleared at
  28. * the same time. This happens before the vertical blank interrupt.
  29. * So there is a small change that the driver sets GO bit after VFP, but
  30. * before vblank, and we have to check for that case here.
  31. */
  32. busy = dispc_vp_go_busy(tidss->dispc, tcrtc->hw_videoport);
  33. if (busy) {
  34. spin_unlock_irqrestore(&ddev->event_lock, flags);
  35. return;
  36. }
  37. event = tcrtc->event;
  38. tcrtc->event = NULL;
  39. if (!event) {
  40. spin_unlock_irqrestore(&ddev->event_lock, flags);
  41. return;
  42. }
  43. drm_crtc_send_vblank_event(&tcrtc->crtc, event);
  44. spin_unlock_irqrestore(&ddev->event_lock, flags);
  45. drm_crtc_vblank_put(&tcrtc->crtc);
  46. }
  47. void tidss_crtc_vblank_irq(struct drm_crtc *crtc)
  48. {
  49. struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
  50. drm_crtc_handle_vblank(crtc);
  51. tidss_crtc_finish_page_flip(tcrtc);
  52. }
  53. void tidss_crtc_framedone_irq(struct drm_crtc *crtc)
  54. {
  55. struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
  56. complete(&tcrtc->framedone_completion);
  57. }
  58. void tidss_crtc_error_irq(struct drm_crtc *crtc, u64 irqstatus)
  59. {
  60. struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
  61. dev_err_ratelimited(crtc->dev->dev, "CRTC%u SYNC LOST: (irq %llx)\n",
  62. tcrtc->hw_videoport, irqstatus);
  63. }
  64. /* drm_crtc_helper_funcs */
  65. static int tidss_crtc_atomic_check(struct drm_crtc *crtc,
  66. struct drm_atomic_state *state)
  67. {
  68. struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state,
  69. crtc);
  70. struct drm_device *ddev = crtc->dev;
  71. struct tidss_device *tidss = to_tidss(ddev);
  72. struct dispc_device *dispc = tidss->dispc;
  73. struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
  74. u32 hw_videoport = tcrtc->hw_videoport;
  75. const struct drm_display_mode *mode;
  76. enum drm_mode_status ok;
  77. dev_dbg(ddev->dev, "%s\n", __func__);
  78. if (!crtc_state->enable)
  79. return 0;
  80. mode = &crtc_state->adjusted_mode;
  81. ok = dispc_vp_mode_valid(dispc, hw_videoport, mode);
  82. if (ok != MODE_OK) {
  83. dev_dbg(ddev->dev, "%s: bad mode: %ux%u pclk %u kHz\n",
  84. __func__, mode->hdisplay, mode->vdisplay, mode->clock);
  85. return -EINVAL;
  86. }
  87. return dispc_vp_bus_check(dispc, hw_videoport, crtc_state);
  88. }
  89. /*
  90. * This needs all affected planes to be present in the atomic
  91. * state. The untouched planes are added to the state in
  92. * tidss_atomic_check().
  93. */
  94. static void tidss_crtc_position_planes(struct tidss_device *tidss,
  95. struct drm_crtc *crtc,
  96. struct drm_crtc_state *old_state,
  97. bool newmodeset)
  98. {
  99. struct drm_atomic_state *ostate = old_state->state;
  100. struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
  101. struct drm_crtc_state *cstate = crtc->state;
  102. int layer;
  103. if (!newmodeset && !cstate->zpos_changed &&
  104. !to_tidss_crtc_state(cstate)->plane_pos_changed)
  105. return;
  106. for (layer = 0; layer < tidss->feat->num_planes; layer++) {
  107. struct drm_plane_state *pstate;
  108. struct drm_plane *plane;
  109. bool layer_active = false;
  110. int i;
  111. for_each_new_plane_in_state(ostate, plane, pstate, i) {
  112. if (pstate->crtc != crtc || !pstate->visible)
  113. continue;
  114. if (pstate->normalized_zpos == layer) {
  115. layer_active = true;
  116. break;
  117. }
  118. }
  119. if (layer_active) {
  120. struct tidss_plane *tplane = to_tidss_plane(plane);
  121. dispc_ovr_set_plane(tidss->dispc, tplane->hw_plane_id,
  122. tcrtc->hw_videoport,
  123. pstate->crtc_x, pstate->crtc_y,
  124. layer);
  125. }
  126. dispc_ovr_enable_layer(tidss->dispc, tcrtc->hw_videoport, layer,
  127. layer_active);
  128. }
  129. }
  130. static void tidss_crtc_atomic_flush(struct drm_crtc *crtc,
  131. struct drm_atomic_state *state)
  132. {
  133. struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state,
  134. crtc);
  135. struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
  136. struct drm_device *ddev = crtc->dev;
  137. struct tidss_device *tidss = to_tidss(ddev);
  138. unsigned long flags;
  139. dev_dbg(ddev->dev,
  140. "%s: %s enabled %d, needs modeset %d, event %p\n", __func__,
  141. crtc->name, drm_atomic_crtc_needs_modeset(crtc->state),
  142. crtc->state->enable, crtc->state->event);
  143. /* There is nothing to do if CRTC is not going to be enabled. */
  144. if (!crtc->state->enable)
  145. return;
  146. /*
  147. * Flush CRTC changes with go bit only if new modeset is not
  148. * coming, so CRTC is enabled trough out the commit.
  149. */
  150. if (drm_atomic_crtc_needs_modeset(crtc->state))
  151. return;
  152. /* If the GO bit is stuck we better quit here. */
  153. if (WARN_ON(dispc_vp_go_busy(tidss->dispc, tcrtc->hw_videoport)))
  154. return;
  155. /* We should have event if CRTC is enabled through out this commit. */
  156. if (WARN_ON(!crtc->state->event))
  157. return;
  158. /* Write vp properties to HW if needed. */
  159. dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, false);
  160. /* Update plane positions if needed. */
  161. tidss_crtc_position_planes(tidss, crtc, old_crtc_state, false);
  162. WARN_ON(drm_crtc_vblank_get(crtc) != 0);
  163. spin_lock_irqsave(&ddev->event_lock, flags);
  164. dispc_vp_go(tidss->dispc, tcrtc->hw_videoport);
  165. WARN_ON(tcrtc->event);
  166. tcrtc->event = crtc->state->event;
  167. crtc->state->event = NULL;
  168. spin_unlock_irqrestore(&ddev->event_lock, flags);
  169. }
  170. static void tidss_crtc_atomic_enable(struct drm_crtc *crtc,
  171. struct drm_atomic_state *state)
  172. {
  173. struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state,
  174. crtc);
  175. struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
  176. struct drm_device *ddev = crtc->dev;
  177. struct tidss_device *tidss = to_tidss(ddev);
  178. const struct drm_display_mode *mode = &crtc->state->adjusted_mode;
  179. unsigned long flags;
  180. int r;
  181. dev_dbg(ddev->dev, "%s, event %p\n", __func__, crtc->state->event);
  182. tidss_runtime_get(tidss);
  183. r = dispc_vp_set_clk_rate(tidss->dispc, tcrtc->hw_videoport,
  184. mode->clock * 1000);
  185. if (r != 0)
  186. return;
  187. r = dispc_vp_enable_clk(tidss->dispc, tcrtc->hw_videoport);
  188. if (r != 0)
  189. return;
  190. dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, true);
  191. tidss_crtc_position_planes(tidss, crtc, old_state, true);
  192. /* Turn vertical blanking interrupt reporting on. */
  193. drm_crtc_vblank_on(crtc);
  194. dispc_vp_prepare(tidss->dispc, tcrtc->hw_videoport, crtc->state);
  195. dispc_vp_enable(tidss->dispc, tcrtc->hw_videoport, crtc->state);
  196. spin_lock_irqsave(&ddev->event_lock, flags);
  197. if (crtc->state->event) {
  198. drm_crtc_send_vblank_event(crtc, crtc->state->event);
  199. crtc->state->event = NULL;
  200. }
  201. spin_unlock_irqrestore(&ddev->event_lock, flags);
  202. }
  203. static void tidss_crtc_atomic_disable(struct drm_crtc *crtc,
  204. struct drm_atomic_state *state)
  205. {
  206. struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
  207. struct drm_device *ddev = crtc->dev;
  208. struct tidss_device *tidss = to_tidss(ddev);
  209. unsigned long flags;
  210. dev_dbg(ddev->dev, "%s, event %p\n", __func__, crtc->state->event);
  211. reinit_completion(&tcrtc->framedone_completion);
  212. dispc_vp_disable(tidss->dispc, tcrtc->hw_videoport);
  213. if (!wait_for_completion_timeout(&tcrtc->framedone_completion,
  214. msecs_to_jiffies(500)))
  215. dev_err(tidss->dev, "Timeout waiting for framedone on crtc %d",
  216. tcrtc->hw_videoport);
  217. dispc_vp_unprepare(tidss->dispc, tcrtc->hw_videoport);
  218. spin_lock_irqsave(&ddev->event_lock, flags);
  219. if (crtc->state->event) {
  220. drm_crtc_send_vblank_event(crtc, crtc->state->event);
  221. crtc->state->event = NULL;
  222. }
  223. spin_unlock_irqrestore(&ddev->event_lock, flags);
  224. drm_crtc_vblank_off(crtc);
  225. dispc_vp_disable_clk(tidss->dispc, tcrtc->hw_videoport);
  226. tidss_runtime_put(tidss);
  227. }
  228. static
  229. enum drm_mode_status tidss_crtc_mode_valid(struct drm_crtc *crtc,
  230. const struct drm_display_mode *mode)
  231. {
  232. struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
  233. struct drm_device *ddev = crtc->dev;
  234. struct tidss_device *tidss = to_tidss(ddev);
  235. return dispc_vp_mode_valid(tidss->dispc, tcrtc->hw_videoport, mode);
  236. }
  237. static const struct drm_crtc_helper_funcs tidss_crtc_helper_funcs = {
  238. .atomic_check = tidss_crtc_atomic_check,
  239. .atomic_flush = tidss_crtc_atomic_flush,
  240. .atomic_enable = tidss_crtc_atomic_enable,
  241. .atomic_disable = tidss_crtc_atomic_disable,
  242. .mode_valid = tidss_crtc_mode_valid,
  243. };
  244. /* drm_crtc_funcs */
  245. static int tidss_crtc_enable_vblank(struct drm_crtc *crtc)
  246. {
  247. struct drm_device *ddev = crtc->dev;
  248. struct tidss_device *tidss = to_tidss(ddev);
  249. dev_dbg(ddev->dev, "%s\n", __func__);
  250. tidss_runtime_get(tidss);
  251. tidss_irq_enable_vblank(crtc);
  252. return 0;
  253. }
  254. static void tidss_crtc_disable_vblank(struct drm_crtc *crtc)
  255. {
  256. struct drm_device *ddev = crtc->dev;
  257. struct tidss_device *tidss = to_tidss(ddev);
  258. dev_dbg(ddev->dev, "%s\n", __func__);
  259. tidss_irq_disable_vblank(crtc);
  260. tidss_runtime_put(tidss);
  261. }
  262. static void tidss_crtc_reset(struct drm_crtc *crtc)
  263. {
  264. struct tidss_crtc_state *tcrtc;
  265. if (crtc->state)
  266. __drm_atomic_helper_crtc_destroy_state(crtc->state);
  267. kfree(crtc->state);
  268. tcrtc = kzalloc(sizeof(*tcrtc), GFP_KERNEL);
  269. if (!tcrtc) {
  270. crtc->state = NULL;
  271. return;
  272. }
  273. __drm_atomic_helper_crtc_reset(crtc, &tcrtc->base);
  274. }
  275. static struct drm_crtc_state *tidss_crtc_duplicate_state(struct drm_crtc *crtc)
  276. {
  277. struct tidss_crtc_state *state, *current_state;
  278. if (WARN_ON(!crtc->state))
  279. return NULL;
  280. current_state = to_tidss_crtc_state(crtc->state);
  281. state = kmalloc(sizeof(*state), GFP_KERNEL);
  282. if (!state)
  283. return NULL;
  284. __drm_atomic_helper_crtc_duplicate_state(crtc, &state->base);
  285. state->plane_pos_changed = false;
  286. state->bus_format = current_state->bus_format;
  287. state->bus_flags = current_state->bus_flags;
  288. return &state->base;
  289. }
  290. static void tidss_crtc_destroy(struct drm_crtc *crtc)
  291. {
  292. struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
  293. drm_crtc_cleanup(crtc);
  294. kfree(tcrtc);
  295. }
  296. static const struct drm_crtc_funcs tidss_crtc_funcs = {
  297. .reset = tidss_crtc_reset,
  298. .destroy = tidss_crtc_destroy,
  299. .set_config = drm_atomic_helper_set_config,
  300. .page_flip = drm_atomic_helper_page_flip,
  301. .atomic_duplicate_state = tidss_crtc_duplicate_state,
  302. .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
  303. .enable_vblank = tidss_crtc_enable_vblank,
  304. .disable_vblank = tidss_crtc_disable_vblank,
  305. };
  306. struct tidss_crtc *tidss_crtc_create(struct tidss_device *tidss,
  307. u32 hw_videoport,
  308. struct drm_plane *primary)
  309. {
  310. struct tidss_crtc *tcrtc;
  311. struct drm_crtc *crtc;
  312. unsigned int gamma_lut_size = 0;
  313. bool has_ctm = tidss->feat->vp_feat.color.has_ctm;
  314. int ret;
  315. tcrtc = kzalloc(sizeof(*tcrtc), GFP_KERNEL);
  316. if (!tcrtc)
  317. return ERR_PTR(-ENOMEM);
  318. tcrtc->hw_videoport = hw_videoport;
  319. init_completion(&tcrtc->framedone_completion);
  320. crtc = &tcrtc->crtc;
  321. ret = drm_crtc_init_with_planes(&tidss->ddev, crtc, primary,
  322. NULL, &tidss_crtc_funcs, NULL);
  323. if (ret < 0) {
  324. kfree(tcrtc);
  325. return ERR_PTR(ret);
  326. }
  327. drm_crtc_helper_add(crtc, &tidss_crtc_helper_funcs);
  328. /*
  329. * The dispc gamma functions adapt to what ever size we ask
  330. * from it no matter what HW supports. X-server assumes 256
  331. * element gamma tables so lets use that.
  332. */
  333. if (tidss->feat->vp_feat.color.gamma_size)
  334. gamma_lut_size = 256;
  335. drm_crtc_enable_color_mgmt(crtc, 0, has_ctm, gamma_lut_size);
  336. if (gamma_lut_size)
  337. drm_mode_crtc_set_gamma_size(crtc, gamma_lut_size);
  338. return tcrtc;
  339. }