plane.h 2.3 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (C) 2017 NVIDIA CORPORATION. All rights reserved.
  4. */
  5. #ifndef TEGRA_PLANE_H
  6. #define TEGRA_PLANE_H 1
  7. #include <drm/drm_plane.h>
  8. struct icc_path;
  9. struct tegra_bo;
  10. struct tegra_dc;
  11. struct tegra_plane {
  12. struct drm_plane base;
  13. struct tegra_dc *dc;
  14. unsigned int offset;
  15. unsigned int index;
  16. struct icc_path *icc_mem;
  17. struct icc_path *icc_mem_vfilter;
  18. };
  19. struct tegra_cursor {
  20. struct tegra_plane base;
  21. struct tegra_bo *bo;
  22. unsigned int width;
  23. unsigned int height;
  24. };
  25. static inline struct tegra_plane *to_tegra_plane(struct drm_plane *plane)
  26. {
  27. return container_of(plane, struct tegra_plane, base);
  28. }
  29. struct tegra_plane_legacy_blending_state {
  30. bool alpha;
  31. bool top;
  32. };
  33. struct tegra_plane_state {
  34. struct drm_plane_state base;
  35. struct host1x_bo_mapping *map[3];
  36. dma_addr_t iova[3];
  37. struct tegra_bo_tiling tiling;
  38. u32 format;
  39. u32 swap;
  40. bool reflect_x;
  41. bool reflect_y;
  42. /* used for legacy blending support only */
  43. struct tegra_plane_legacy_blending_state blending[2];
  44. bool opaque;
  45. /* bandwidths are in ICC units, i.e. kbytes/sec */
  46. u32 total_peak_memory_bandwidth;
  47. u32 peak_memory_bandwidth;
  48. u32 avg_memory_bandwidth;
  49. };
  50. static inline struct tegra_plane_state *
  51. to_tegra_plane_state(struct drm_plane_state *state)
  52. {
  53. if (state)
  54. return container_of(state, struct tegra_plane_state, base);
  55. return NULL;
  56. }
  57. static inline const struct tegra_plane_state *
  58. to_const_tegra_plane_state(const struct drm_plane_state *state)
  59. {
  60. return to_tegra_plane_state((struct drm_plane_state *)state);
  61. }
  62. extern const struct drm_plane_funcs tegra_plane_funcs;
  63. int tegra_plane_prepare_fb(struct drm_plane *plane,
  64. struct drm_plane_state *state);
  65. void tegra_plane_cleanup_fb(struct drm_plane *plane,
  66. struct drm_plane_state *state);
  67. int tegra_plane_state_add(struct tegra_plane *plane,
  68. struct drm_plane_state *state);
  69. int tegra_plane_format(u32 fourcc, u32 *format, u32 *swap);
  70. bool tegra_plane_format_is_indexed(unsigned int format);
  71. bool tegra_plane_format_is_yuv(unsigned int format, unsigned int *planes, unsigned int *bpc);
  72. int tegra_plane_setup_legacy_state(struct tegra_plane *tegra,
  73. struct tegra_plane_state *state);
  74. int tegra_plane_interconnect_init(struct tegra_plane *plane);
  75. #endif /* TEGRA_PLANE_H */