ltdc.h 2.1 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465
  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (C) STMicroelectronics SA 2017
  4. *
  5. * Authors: Philippe Cornu <[email protected]>
  6. * Yannick Fertre <[email protected]>
  7. * Fabien Dessenne <[email protected]>
  8. * Mickael Reulier <[email protected]>
  9. */
  10. #ifndef _LTDC_H_
  11. #define _LTDC_H_
  12. struct ltdc_caps {
  13. u32 hw_version; /* hardware version */
  14. u32 nb_layers; /* number of supported layers */
  15. u32 layer_ofs; /* layer offset for applicable regs */
  16. const u32 *layer_regs; /* layer register offset */
  17. u32 bus_width; /* bus width (32 or 64 bits) */
  18. const u32 *pix_fmt_hw; /* supported hw pixel formats */
  19. const u32 *pix_fmt_drm; /* supported drm pixel formats */
  20. int pix_fmt_nb; /* number of pixel format */
  21. bool pix_fmt_flex; /* pixel format flexibility supported */
  22. bool non_alpha_only_l1; /* non-native no-alpha formats on layer 1 */
  23. int pad_max_freq_hz; /* max frequency supported by pad */
  24. int nb_irq; /* number of hardware interrupts */
  25. bool ycbcr_input; /* ycbcr input converter supported */
  26. bool ycbcr_output; /* ycbcr output converter supported */
  27. bool plane_reg_shadow; /* plane shadow registers ability */
  28. bool crc; /* cyclic redundancy check supported */
  29. bool dynamic_zorder; /* dynamic z-order */
  30. bool plane_rotation; /* plane rotation */
  31. bool fifo_threshold; /* fifo underrun threshold supported */
  32. };
  33. #define LTDC_MAX_LAYER 4
  34. struct fps_info {
  35. unsigned int counter;
  36. ktime_t last_timestamp;
  37. };
  38. struct ltdc_device {
  39. void __iomem *regs;
  40. struct regmap *regmap;
  41. struct clk *pixel_clk; /* lcd pixel clock */
  42. struct mutex err_lock; /* protecting error_status */
  43. struct ltdc_caps caps;
  44. u32 irq_status;
  45. u32 fifo_err; /* fifo underrun error counter */
  46. u32 fifo_warn; /* fifo underrun warning counter */
  47. u32 fifo_threshold; /* fifo underrun threshold */
  48. u32 transfer_err; /* transfer error counter */
  49. struct fps_info plane_fpsi[LTDC_MAX_LAYER];
  50. struct drm_atomic_state *suspend_state;
  51. int crc_skip_count;
  52. bool crc_active;
  53. };
  54. int ltdc_load(struct drm_device *ddev);
  55. void ltdc_unload(struct drm_device *ddev);
  56. void ltdc_suspend(struct drm_device *ddev);
  57. int ltdc_resume(struct drm_device *ddev);
  58. #endif