radeon_fb.c 10 KB

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  1. /*
  2. * Copyright © 2007 David Airlie
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21. * DEALINGS IN THE SOFTWARE.
  22. *
  23. * Authors:
  24. * David Airlie
  25. */
  26. #include <linux/module.h>
  27. #include <linux/pci.h>
  28. #include <linux/pm_runtime.h>
  29. #include <linux/slab.h>
  30. #include <linux/vga_switcheroo.h>
  31. #include <drm/drm_crtc.h>
  32. #include <drm/drm_crtc_helper.h>
  33. #include <drm/drm_fb_helper.h>
  34. #include <drm/drm_fourcc.h>
  35. #include <drm/drm_framebuffer.h>
  36. #include <drm/radeon_drm.h>
  37. #include "radeon.h"
  38. /* object hierarchy -
  39. * this contains a helper + a radeon fb
  40. * the helper contains a pointer to radeon framebuffer baseclass.
  41. */
  42. struct radeon_fbdev {
  43. struct drm_fb_helper helper; /* must be first */
  44. struct drm_framebuffer fb;
  45. struct radeon_device *rdev;
  46. };
  47. static int
  48. radeonfb_open(struct fb_info *info, int user)
  49. {
  50. struct radeon_fbdev *rfbdev = info->par;
  51. struct radeon_device *rdev = rfbdev->rdev;
  52. int ret = pm_runtime_get_sync(rdev->ddev->dev);
  53. if (ret < 0 && ret != -EACCES) {
  54. pm_runtime_mark_last_busy(rdev->ddev->dev);
  55. pm_runtime_put_autosuspend(rdev->ddev->dev);
  56. return ret;
  57. }
  58. return 0;
  59. }
  60. static int
  61. radeonfb_release(struct fb_info *info, int user)
  62. {
  63. struct radeon_fbdev *rfbdev = info->par;
  64. struct radeon_device *rdev = rfbdev->rdev;
  65. pm_runtime_mark_last_busy(rdev->ddev->dev);
  66. pm_runtime_put_autosuspend(rdev->ddev->dev);
  67. return 0;
  68. }
  69. static const struct fb_ops radeonfb_ops = {
  70. .owner = THIS_MODULE,
  71. DRM_FB_HELPER_DEFAULT_OPS,
  72. .fb_open = radeonfb_open,
  73. .fb_release = radeonfb_release,
  74. .fb_fillrect = drm_fb_helper_cfb_fillrect,
  75. .fb_copyarea = drm_fb_helper_cfb_copyarea,
  76. .fb_imageblit = drm_fb_helper_cfb_imageblit,
  77. };
  78. int radeon_align_pitch(struct radeon_device *rdev, int width, int cpp, bool tiled)
  79. {
  80. int aligned = width;
  81. int align_large = (ASIC_IS_AVIVO(rdev)) || tiled;
  82. int pitch_mask = 0;
  83. switch (cpp) {
  84. case 1:
  85. pitch_mask = align_large ? 255 : 127;
  86. break;
  87. case 2:
  88. pitch_mask = align_large ? 127 : 31;
  89. break;
  90. case 3:
  91. case 4:
  92. pitch_mask = align_large ? 63 : 15;
  93. break;
  94. }
  95. aligned += pitch_mask;
  96. aligned &= ~pitch_mask;
  97. return aligned * cpp;
  98. }
  99. static void radeonfb_destroy_pinned_object(struct drm_gem_object *gobj)
  100. {
  101. struct radeon_bo *rbo = gem_to_radeon_bo(gobj);
  102. int ret;
  103. ret = radeon_bo_reserve(rbo, false);
  104. if (likely(ret == 0)) {
  105. radeon_bo_kunmap(rbo);
  106. radeon_bo_unpin(rbo);
  107. radeon_bo_unreserve(rbo);
  108. }
  109. drm_gem_object_put(gobj);
  110. }
  111. static int radeonfb_create_pinned_object(struct radeon_fbdev *rfbdev,
  112. struct drm_mode_fb_cmd2 *mode_cmd,
  113. struct drm_gem_object **gobj_p)
  114. {
  115. const struct drm_format_info *info;
  116. struct radeon_device *rdev = rfbdev->rdev;
  117. struct drm_gem_object *gobj = NULL;
  118. struct radeon_bo *rbo = NULL;
  119. bool fb_tiled = false; /* useful for testing */
  120. u32 tiling_flags = 0;
  121. int ret;
  122. int aligned_size, size;
  123. int height = mode_cmd->height;
  124. u32 cpp;
  125. info = drm_get_format_info(rdev->ddev, mode_cmd);
  126. cpp = info->cpp[0];
  127. /* need to align pitch with crtc limits */
  128. mode_cmd->pitches[0] = radeon_align_pitch(rdev, mode_cmd->width, cpp,
  129. fb_tiled);
  130. if (rdev->family >= CHIP_R600)
  131. height = ALIGN(mode_cmd->height, 8);
  132. size = mode_cmd->pitches[0] * height;
  133. aligned_size = ALIGN(size, PAGE_SIZE);
  134. ret = radeon_gem_object_create(rdev, aligned_size, 0,
  135. RADEON_GEM_DOMAIN_VRAM,
  136. 0, true, &gobj);
  137. if (ret) {
  138. pr_err("failed to allocate framebuffer (%d)\n", aligned_size);
  139. return -ENOMEM;
  140. }
  141. rbo = gem_to_radeon_bo(gobj);
  142. if (fb_tiled)
  143. tiling_flags = RADEON_TILING_MACRO;
  144. #ifdef __BIG_ENDIAN
  145. switch (cpp) {
  146. case 4:
  147. tiling_flags |= RADEON_TILING_SWAP_32BIT;
  148. break;
  149. case 2:
  150. tiling_flags |= RADEON_TILING_SWAP_16BIT;
  151. break;
  152. default:
  153. break;
  154. }
  155. #endif
  156. if (tiling_flags) {
  157. ret = radeon_bo_set_tiling_flags(rbo,
  158. tiling_flags | RADEON_TILING_SURFACE,
  159. mode_cmd->pitches[0]);
  160. if (ret)
  161. dev_err(rdev->dev, "FB failed to set tiling flags\n");
  162. }
  163. ret = radeon_bo_reserve(rbo, false);
  164. if (unlikely(ret != 0))
  165. goto out_unref;
  166. /* Only 27 bit offset for legacy CRTC */
  167. ret = radeon_bo_pin_restricted(rbo, RADEON_GEM_DOMAIN_VRAM,
  168. ASIC_IS_AVIVO(rdev) ? 0 : 1 << 27,
  169. NULL);
  170. if (ret) {
  171. radeon_bo_unreserve(rbo);
  172. goto out_unref;
  173. }
  174. if (fb_tiled)
  175. radeon_bo_check_tiling(rbo, 0, 0);
  176. ret = radeon_bo_kmap(rbo, NULL);
  177. radeon_bo_unreserve(rbo);
  178. if (ret)
  179. goto out_unref;
  180. *gobj_p = gobj;
  181. return 0;
  182. out_unref:
  183. radeonfb_destroy_pinned_object(gobj);
  184. *gobj_p = NULL;
  185. return ret;
  186. }
  187. static int radeonfb_create(struct drm_fb_helper *helper,
  188. struct drm_fb_helper_surface_size *sizes)
  189. {
  190. struct radeon_fbdev *rfbdev =
  191. container_of(helper, struct radeon_fbdev, helper);
  192. struct radeon_device *rdev = rfbdev->rdev;
  193. struct fb_info *info;
  194. struct drm_framebuffer *fb = NULL;
  195. struct drm_mode_fb_cmd2 mode_cmd;
  196. struct drm_gem_object *gobj = NULL;
  197. struct radeon_bo *rbo = NULL;
  198. int ret;
  199. unsigned long tmp;
  200. mode_cmd.width = sizes->surface_width;
  201. mode_cmd.height = sizes->surface_height;
  202. /* avivo can't scanout real 24bpp */
  203. if ((sizes->surface_bpp == 24) && ASIC_IS_AVIVO(rdev))
  204. sizes->surface_bpp = 32;
  205. mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp,
  206. sizes->surface_depth);
  207. ret = radeonfb_create_pinned_object(rfbdev, &mode_cmd, &gobj);
  208. if (ret) {
  209. DRM_ERROR("failed to create fbcon object %d\n", ret);
  210. return ret;
  211. }
  212. rbo = gem_to_radeon_bo(gobj);
  213. /* okay we have an object now allocate the framebuffer */
  214. info = drm_fb_helper_alloc_fbi(helper);
  215. if (IS_ERR(info)) {
  216. ret = PTR_ERR(info);
  217. goto out;
  218. }
  219. /* radeon resume is fragile and needs a vt switch to help it along */
  220. info->skip_vt_switch = false;
  221. ret = radeon_framebuffer_init(rdev->ddev, &rfbdev->fb, &mode_cmd, gobj);
  222. if (ret) {
  223. DRM_ERROR("failed to initialize framebuffer %d\n", ret);
  224. goto out;
  225. }
  226. fb = &rfbdev->fb;
  227. /* setup helper */
  228. rfbdev->helper.fb = fb;
  229. memset_io(rbo->kptr, 0x0, radeon_bo_size(rbo));
  230. info->fbops = &radeonfb_ops;
  231. tmp = radeon_bo_gpu_offset(rbo) - rdev->mc.vram_start;
  232. info->fix.smem_start = rdev->mc.aper_base + tmp;
  233. info->fix.smem_len = radeon_bo_size(rbo);
  234. info->screen_base = rbo->kptr;
  235. info->screen_size = radeon_bo_size(rbo);
  236. drm_fb_helper_fill_info(info, &rfbdev->helper, sizes);
  237. /* setup aperture base/size for vesafb takeover */
  238. info->apertures->ranges[0].base = rdev->ddev->mode_config.fb_base;
  239. info->apertures->ranges[0].size = rdev->mc.aper_size;
  240. /* Use default scratch pixmap (info->pixmap.flags = FB_PIXMAP_SYSTEM) */
  241. if (info->screen_base == NULL) {
  242. ret = -ENOSPC;
  243. goto out;
  244. }
  245. DRM_INFO("fb mappable at 0x%lX\n", info->fix.smem_start);
  246. DRM_INFO("vram apper at 0x%lX\n", (unsigned long)rdev->mc.aper_base);
  247. DRM_INFO("size %lu\n", (unsigned long)radeon_bo_size(rbo));
  248. DRM_INFO("fb depth is %d\n", fb->format->depth);
  249. DRM_INFO(" pitch is %d\n", fb->pitches[0]);
  250. vga_switcheroo_client_fb_set(rdev->pdev, info);
  251. return 0;
  252. out:
  253. if (fb && ret) {
  254. drm_gem_object_put(gobj);
  255. drm_framebuffer_unregister_private(fb);
  256. drm_framebuffer_cleanup(fb);
  257. kfree(fb);
  258. }
  259. return ret;
  260. }
  261. static int radeon_fbdev_destroy(struct drm_device *dev, struct radeon_fbdev *rfbdev)
  262. {
  263. struct drm_framebuffer *fb = &rfbdev->fb;
  264. drm_fb_helper_unregister_fbi(&rfbdev->helper);
  265. if (fb->obj[0]) {
  266. radeonfb_destroy_pinned_object(fb->obj[0]);
  267. fb->obj[0] = NULL;
  268. drm_framebuffer_unregister_private(fb);
  269. drm_framebuffer_cleanup(fb);
  270. }
  271. drm_fb_helper_fini(&rfbdev->helper);
  272. return 0;
  273. }
  274. static const struct drm_fb_helper_funcs radeon_fb_helper_funcs = {
  275. .fb_probe = radeonfb_create,
  276. };
  277. int radeon_fbdev_init(struct radeon_device *rdev)
  278. {
  279. struct radeon_fbdev *rfbdev;
  280. int bpp_sel = 32;
  281. int ret;
  282. /* don't enable fbdev if no connectors */
  283. if (list_empty(&rdev->ddev->mode_config.connector_list))
  284. return 0;
  285. /* select 8 bpp console on 8MB cards, or 16 bpp on RN50 or 32MB */
  286. if (rdev->mc.real_vram_size <= (8*1024*1024))
  287. bpp_sel = 8;
  288. else if (ASIC_IS_RN50(rdev) ||
  289. rdev->mc.real_vram_size <= (32*1024*1024))
  290. bpp_sel = 16;
  291. rfbdev = kzalloc(sizeof(struct radeon_fbdev), GFP_KERNEL);
  292. if (!rfbdev)
  293. return -ENOMEM;
  294. rfbdev->rdev = rdev;
  295. rdev->mode_info.rfbdev = rfbdev;
  296. drm_fb_helper_prepare(rdev->ddev, &rfbdev->helper,
  297. &radeon_fb_helper_funcs);
  298. ret = drm_fb_helper_init(rdev->ddev, &rfbdev->helper);
  299. if (ret)
  300. goto free;
  301. /* disable all the possible outputs/crtcs before entering KMS mode */
  302. drm_helper_disable_unused_functions(rdev->ddev);
  303. ret = drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel);
  304. if (ret)
  305. goto fini;
  306. return 0;
  307. fini:
  308. drm_fb_helper_fini(&rfbdev->helper);
  309. free:
  310. kfree(rfbdev);
  311. return ret;
  312. }
  313. void radeon_fbdev_fini(struct radeon_device *rdev)
  314. {
  315. if (!rdev->mode_info.rfbdev)
  316. return;
  317. radeon_fbdev_destroy(rdev->ddev, rdev->mode_info.rfbdev);
  318. kfree(rdev->mode_info.rfbdev);
  319. rdev->mode_info.rfbdev = NULL;
  320. }
  321. void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state)
  322. {
  323. if (rdev->mode_info.rfbdev)
  324. drm_fb_helper_set_suspend(&rdev->mode_info.rfbdev->helper, state);
  325. }
  326. bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj)
  327. {
  328. if (!rdev->mode_info.rfbdev)
  329. return false;
  330. if (robj == gem_to_radeon_bo(rdev->mode_info.rfbdev->fb.obj[0]))
  331. return true;
  332. return false;
  333. }