radeon_audio.c 22 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723
  1. /*
  2. * Copyright 2014 Advanced Micro Devices, Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Slava Grigorev <[email protected]>
  23. */
  24. #include <linux/gcd.h>
  25. #include <drm/drm_crtc.h>
  26. #include "dce6_afmt.h"
  27. #include "evergreen_hdmi.h"
  28. #include "radeon.h"
  29. #include "atom.h"
  30. #include "r600.h"
  31. #include "radeon_audio.h"
  32. void dce6_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
  33. u8 enable_mask);
  34. struct r600_audio_pin* r600_audio_get_pin(struct radeon_device *rdev);
  35. struct r600_audio_pin* dce6_audio_get_pin(struct radeon_device *rdev);
  36. static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder,
  37. struct drm_display_mode *mode);
  38. static void radeon_audio_dp_mode_set(struct drm_encoder *encoder,
  39. struct drm_display_mode *mode);
  40. static const u32 pin_offsets[7] =
  41. {
  42. (0x5e00 - 0x5e00),
  43. (0x5e18 - 0x5e00),
  44. (0x5e30 - 0x5e00),
  45. (0x5e48 - 0x5e00),
  46. (0x5e60 - 0x5e00),
  47. (0x5e78 - 0x5e00),
  48. (0x5e90 - 0x5e00),
  49. };
  50. static u32 radeon_audio_rreg(struct radeon_device *rdev, u32 offset, u32 reg)
  51. {
  52. return RREG32(reg);
  53. }
  54. static void radeon_audio_wreg(struct radeon_device *rdev, u32 offset,
  55. u32 reg, u32 v)
  56. {
  57. WREG32(reg, v);
  58. }
  59. static struct radeon_audio_basic_funcs r600_funcs = {
  60. .endpoint_rreg = radeon_audio_rreg,
  61. .endpoint_wreg = radeon_audio_wreg,
  62. .enable = r600_audio_enable,
  63. };
  64. static struct radeon_audio_basic_funcs dce32_funcs = {
  65. .endpoint_rreg = radeon_audio_rreg,
  66. .endpoint_wreg = radeon_audio_wreg,
  67. .enable = r600_audio_enable,
  68. };
  69. static struct radeon_audio_basic_funcs dce4_funcs = {
  70. .endpoint_rreg = radeon_audio_rreg,
  71. .endpoint_wreg = radeon_audio_wreg,
  72. .enable = dce4_audio_enable,
  73. };
  74. static struct radeon_audio_basic_funcs dce6_funcs = {
  75. .endpoint_rreg = dce6_endpoint_rreg,
  76. .endpoint_wreg = dce6_endpoint_wreg,
  77. .enable = dce6_audio_enable,
  78. };
  79. static struct radeon_audio_funcs r600_hdmi_funcs = {
  80. .get_pin = r600_audio_get_pin,
  81. .set_dto = r600_hdmi_audio_set_dto,
  82. .update_acr = r600_hdmi_update_acr,
  83. .set_vbi_packet = r600_set_vbi_packet,
  84. .set_avi_packet = r600_set_avi_packet,
  85. .set_audio_packet = r600_set_audio_packet,
  86. .set_mute = r600_set_mute,
  87. .mode_set = radeon_audio_hdmi_mode_set,
  88. .dpms = r600_hdmi_enable,
  89. };
  90. static struct radeon_audio_funcs dce32_hdmi_funcs = {
  91. .get_pin = r600_audio_get_pin,
  92. .write_sad_regs = dce3_2_afmt_write_sad_regs,
  93. .write_speaker_allocation = dce3_2_afmt_hdmi_write_speaker_allocation,
  94. .set_dto = dce3_2_audio_set_dto,
  95. .update_acr = dce3_2_hdmi_update_acr,
  96. .set_vbi_packet = r600_set_vbi_packet,
  97. .set_avi_packet = r600_set_avi_packet,
  98. .set_audio_packet = dce3_2_set_audio_packet,
  99. .set_mute = dce3_2_set_mute,
  100. .mode_set = radeon_audio_hdmi_mode_set,
  101. .dpms = r600_hdmi_enable,
  102. };
  103. static struct radeon_audio_funcs dce32_dp_funcs = {
  104. .get_pin = r600_audio_get_pin,
  105. .write_sad_regs = dce3_2_afmt_write_sad_regs,
  106. .write_speaker_allocation = dce3_2_afmt_dp_write_speaker_allocation,
  107. .set_dto = dce3_2_audio_set_dto,
  108. .set_avi_packet = r600_set_avi_packet,
  109. .set_audio_packet = dce3_2_set_audio_packet,
  110. };
  111. static struct radeon_audio_funcs dce4_hdmi_funcs = {
  112. .get_pin = r600_audio_get_pin,
  113. .write_sad_regs = evergreen_hdmi_write_sad_regs,
  114. .write_speaker_allocation = dce4_afmt_hdmi_write_speaker_allocation,
  115. .write_latency_fields = dce4_afmt_write_latency_fields,
  116. .set_dto = dce4_hdmi_audio_set_dto,
  117. .update_acr = evergreen_hdmi_update_acr,
  118. .set_vbi_packet = dce4_set_vbi_packet,
  119. .set_color_depth = dce4_hdmi_set_color_depth,
  120. .set_avi_packet = evergreen_set_avi_packet,
  121. .set_audio_packet = dce4_set_audio_packet,
  122. .set_mute = dce4_set_mute,
  123. .mode_set = radeon_audio_hdmi_mode_set,
  124. .dpms = evergreen_hdmi_enable,
  125. };
  126. static struct radeon_audio_funcs dce4_dp_funcs = {
  127. .get_pin = r600_audio_get_pin,
  128. .write_sad_regs = evergreen_hdmi_write_sad_regs,
  129. .write_speaker_allocation = dce4_afmt_dp_write_speaker_allocation,
  130. .write_latency_fields = dce4_afmt_write_latency_fields,
  131. .set_dto = dce4_dp_audio_set_dto,
  132. .set_avi_packet = evergreen_set_avi_packet,
  133. .set_audio_packet = dce4_set_audio_packet,
  134. .mode_set = radeon_audio_dp_mode_set,
  135. .dpms = evergreen_dp_enable,
  136. };
  137. static struct radeon_audio_funcs dce6_hdmi_funcs = {
  138. .select_pin = dce6_afmt_select_pin,
  139. .get_pin = dce6_audio_get_pin,
  140. .write_sad_regs = dce6_afmt_write_sad_regs,
  141. .write_speaker_allocation = dce6_afmt_hdmi_write_speaker_allocation,
  142. .write_latency_fields = dce6_afmt_write_latency_fields,
  143. .set_dto = dce6_hdmi_audio_set_dto,
  144. .update_acr = evergreen_hdmi_update_acr,
  145. .set_vbi_packet = dce4_set_vbi_packet,
  146. .set_color_depth = dce4_hdmi_set_color_depth,
  147. .set_avi_packet = evergreen_set_avi_packet,
  148. .set_audio_packet = dce4_set_audio_packet,
  149. .set_mute = dce4_set_mute,
  150. .mode_set = radeon_audio_hdmi_mode_set,
  151. .dpms = evergreen_hdmi_enable,
  152. };
  153. static struct radeon_audio_funcs dce6_dp_funcs = {
  154. .select_pin = dce6_afmt_select_pin,
  155. .get_pin = dce6_audio_get_pin,
  156. .write_sad_regs = dce6_afmt_write_sad_regs,
  157. .write_speaker_allocation = dce6_afmt_dp_write_speaker_allocation,
  158. .write_latency_fields = dce6_afmt_write_latency_fields,
  159. .set_dto = dce6_dp_audio_set_dto,
  160. .set_avi_packet = evergreen_set_avi_packet,
  161. .set_audio_packet = dce4_set_audio_packet,
  162. .mode_set = radeon_audio_dp_mode_set,
  163. .dpms = evergreen_dp_enable,
  164. };
  165. static void radeon_audio_enable(struct radeon_device *rdev,
  166. struct r600_audio_pin *pin, u8 enable_mask)
  167. {
  168. struct drm_encoder *encoder;
  169. struct radeon_encoder *radeon_encoder;
  170. struct radeon_encoder_atom_dig *dig;
  171. int pin_count = 0;
  172. if (!pin)
  173. return;
  174. if (rdev->mode_info.mode_config_initialized) {
  175. list_for_each_entry(encoder, &rdev->ddev->mode_config.encoder_list, head) {
  176. if (radeon_encoder_is_digital(encoder)) {
  177. radeon_encoder = to_radeon_encoder(encoder);
  178. dig = radeon_encoder->enc_priv;
  179. if (dig->pin == pin)
  180. pin_count++;
  181. }
  182. }
  183. if ((pin_count > 1) && (enable_mask == 0))
  184. return;
  185. }
  186. if (rdev->audio.funcs->enable)
  187. rdev->audio.funcs->enable(rdev, pin, enable_mask);
  188. }
  189. static void radeon_audio_interface_init(struct radeon_device *rdev)
  190. {
  191. if (ASIC_IS_DCE6(rdev)) {
  192. rdev->audio.funcs = &dce6_funcs;
  193. rdev->audio.hdmi_funcs = &dce6_hdmi_funcs;
  194. rdev->audio.dp_funcs = &dce6_dp_funcs;
  195. } else if (ASIC_IS_DCE4(rdev)) {
  196. rdev->audio.funcs = &dce4_funcs;
  197. rdev->audio.hdmi_funcs = &dce4_hdmi_funcs;
  198. rdev->audio.dp_funcs = &dce4_dp_funcs;
  199. } else if (ASIC_IS_DCE32(rdev)) {
  200. rdev->audio.funcs = &dce32_funcs;
  201. rdev->audio.hdmi_funcs = &dce32_hdmi_funcs;
  202. rdev->audio.dp_funcs = &dce32_dp_funcs;
  203. } else {
  204. rdev->audio.funcs = &r600_funcs;
  205. rdev->audio.hdmi_funcs = &r600_hdmi_funcs;
  206. rdev->audio.dp_funcs = NULL;
  207. }
  208. }
  209. static int radeon_audio_chipset_supported(struct radeon_device *rdev)
  210. {
  211. return ASIC_IS_DCE2(rdev) && !ASIC_IS_NODCE(rdev);
  212. }
  213. int radeon_audio_init(struct radeon_device *rdev)
  214. {
  215. int i;
  216. if (!radeon_audio || !radeon_audio_chipset_supported(rdev))
  217. return 0;
  218. rdev->audio.enabled = true;
  219. if (ASIC_IS_DCE83(rdev)) /* KB: 2 streams, 3 endpoints */
  220. rdev->audio.num_pins = 3;
  221. else if (ASIC_IS_DCE81(rdev)) /* KV: 4 streams, 7 endpoints */
  222. rdev->audio.num_pins = 7;
  223. else if (ASIC_IS_DCE8(rdev)) /* BN/HW: 6 streams, 7 endpoints */
  224. rdev->audio.num_pins = 7;
  225. else if (ASIC_IS_DCE64(rdev)) /* OL: 2 streams, 2 endpoints */
  226. rdev->audio.num_pins = 2;
  227. else if (ASIC_IS_DCE61(rdev)) /* TN: 4 streams, 6 endpoints */
  228. rdev->audio.num_pins = 6;
  229. else if (ASIC_IS_DCE6(rdev)) /* SI: 6 streams, 6 endpoints */
  230. rdev->audio.num_pins = 6;
  231. else
  232. rdev->audio.num_pins = 1;
  233. for (i = 0; i < rdev->audio.num_pins; i++) {
  234. rdev->audio.pin[i].channels = -1;
  235. rdev->audio.pin[i].rate = -1;
  236. rdev->audio.pin[i].bits_per_sample = -1;
  237. rdev->audio.pin[i].status_bits = 0;
  238. rdev->audio.pin[i].category_code = 0;
  239. rdev->audio.pin[i].connected = false;
  240. rdev->audio.pin[i].offset = pin_offsets[i];
  241. rdev->audio.pin[i].id = i;
  242. }
  243. radeon_audio_interface_init(rdev);
  244. /* disable audio. it will be set up later */
  245. for (i = 0; i < rdev->audio.num_pins; i++)
  246. radeon_audio_enable(rdev, &rdev->audio.pin[i], 0);
  247. return 0;
  248. }
  249. u32 radeon_audio_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg)
  250. {
  251. if (rdev->audio.funcs->endpoint_rreg)
  252. return rdev->audio.funcs->endpoint_rreg(rdev, offset, reg);
  253. return 0;
  254. }
  255. void radeon_audio_endpoint_wreg(struct radeon_device *rdev, u32 offset,
  256. u32 reg, u32 v)
  257. {
  258. if (rdev->audio.funcs->endpoint_wreg)
  259. rdev->audio.funcs->endpoint_wreg(rdev, offset, reg, v);
  260. }
  261. static void radeon_audio_write_sad_regs(struct drm_encoder *encoder)
  262. {
  263. struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
  264. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  265. struct cea_sad *sads;
  266. int sad_count;
  267. if (!connector)
  268. return;
  269. sad_count = drm_edid_to_sad(radeon_connector_edid(connector), &sads);
  270. if (sad_count < 0)
  271. DRM_ERROR("Couldn't read SADs: %d\n", sad_count);
  272. if (sad_count <= 0)
  273. return;
  274. BUG_ON(!sads);
  275. if (radeon_encoder->audio && radeon_encoder->audio->write_sad_regs)
  276. radeon_encoder->audio->write_sad_regs(encoder, sads, sad_count);
  277. kfree(sads);
  278. }
  279. static void radeon_audio_write_speaker_allocation(struct drm_encoder *encoder)
  280. {
  281. struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
  282. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  283. u8 *sadb = NULL;
  284. int sad_count;
  285. if (!connector)
  286. return;
  287. sad_count = drm_edid_to_speaker_allocation(radeon_connector_edid(connector),
  288. &sadb);
  289. if (sad_count < 0) {
  290. DRM_DEBUG("Couldn't read Speaker Allocation Data Block: %d\n",
  291. sad_count);
  292. sad_count = 0;
  293. }
  294. if (radeon_encoder->audio && radeon_encoder->audio->write_speaker_allocation)
  295. radeon_encoder->audio->write_speaker_allocation(encoder, sadb, sad_count);
  296. kfree(sadb);
  297. }
  298. static void radeon_audio_write_latency_fields(struct drm_encoder *encoder,
  299. struct drm_display_mode *mode)
  300. {
  301. struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
  302. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  303. if (!connector)
  304. return;
  305. if (radeon_encoder->audio && radeon_encoder->audio->write_latency_fields)
  306. radeon_encoder->audio->write_latency_fields(encoder, connector, mode);
  307. }
  308. struct r600_audio_pin* radeon_audio_get_pin(struct drm_encoder *encoder)
  309. {
  310. struct radeon_device *rdev = encoder->dev->dev_private;
  311. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  312. if (radeon_encoder->audio && radeon_encoder->audio->get_pin)
  313. return radeon_encoder->audio->get_pin(rdev);
  314. return NULL;
  315. }
  316. static void radeon_audio_select_pin(struct drm_encoder *encoder)
  317. {
  318. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  319. if (radeon_encoder->audio && radeon_encoder->audio->select_pin)
  320. radeon_encoder->audio->select_pin(encoder);
  321. }
  322. void radeon_audio_detect(struct drm_connector *connector,
  323. struct drm_encoder *encoder,
  324. enum drm_connector_status status)
  325. {
  326. struct drm_device *dev = connector->dev;
  327. struct radeon_device *rdev = dev->dev_private;
  328. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  329. struct radeon_encoder_atom_dig *dig;
  330. if (!radeon_audio_chipset_supported(rdev))
  331. return;
  332. if (!radeon_encoder_is_digital(encoder))
  333. return;
  334. dig = radeon_encoder->enc_priv;
  335. if (status == connector_status_connected) {
  336. if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
  337. struct radeon_connector *radeon_connector = to_radeon_connector(connector);
  338. if (radeon_dp_getsinktype(radeon_connector) ==
  339. CONNECTOR_OBJECT_ID_DISPLAYPORT)
  340. radeon_encoder->audio = rdev->audio.dp_funcs;
  341. else
  342. radeon_encoder->audio = rdev->audio.hdmi_funcs;
  343. } else {
  344. radeon_encoder->audio = rdev->audio.hdmi_funcs;
  345. }
  346. if (drm_detect_monitor_audio(radeon_connector_edid(connector))) {
  347. if (!dig->pin)
  348. dig->pin = radeon_audio_get_pin(encoder);
  349. radeon_audio_enable(rdev, dig->pin, 0xf);
  350. } else {
  351. radeon_audio_enable(rdev, dig->pin, 0);
  352. dig->pin = NULL;
  353. }
  354. } else {
  355. radeon_audio_enable(rdev, dig->pin, 0);
  356. dig->pin = NULL;
  357. }
  358. }
  359. void radeon_audio_fini(struct radeon_device *rdev)
  360. {
  361. int i;
  362. if (!rdev->audio.enabled)
  363. return;
  364. for (i = 0; i < rdev->audio.num_pins; i++)
  365. radeon_audio_enable(rdev, &rdev->audio.pin[i], 0);
  366. rdev->audio.enabled = false;
  367. }
  368. static void radeon_audio_set_dto(struct drm_encoder *encoder, unsigned int clock)
  369. {
  370. struct radeon_device *rdev = encoder->dev->dev_private;
  371. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  372. struct radeon_crtc *crtc = to_radeon_crtc(encoder->crtc);
  373. if (radeon_encoder->audio && radeon_encoder->audio->set_dto)
  374. radeon_encoder->audio->set_dto(rdev, crtc, clock);
  375. }
  376. static int radeon_audio_set_avi_packet(struct drm_encoder *encoder,
  377. struct drm_display_mode *mode)
  378. {
  379. struct radeon_device *rdev = encoder->dev->dev_private;
  380. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  381. struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
  382. struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
  383. u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AVI_INFOFRAME_SIZE];
  384. struct hdmi_avi_infoframe frame;
  385. int err;
  386. if (!connector)
  387. return -EINVAL;
  388. err = drm_hdmi_avi_infoframe_from_display_mode(&frame, connector, mode);
  389. if (err < 0) {
  390. DRM_ERROR("failed to setup AVI infoframe: %d\n", err);
  391. return err;
  392. }
  393. if (radeon_encoder->output_csc != RADEON_OUTPUT_CSC_BYPASS) {
  394. drm_hdmi_avi_infoframe_quant_range(&frame, connector, mode,
  395. radeon_encoder->output_csc == RADEON_OUTPUT_CSC_TVRGB ?
  396. HDMI_QUANTIZATION_RANGE_LIMITED :
  397. HDMI_QUANTIZATION_RANGE_FULL);
  398. }
  399. err = hdmi_avi_infoframe_pack(&frame, buffer, sizeof(buffer));
  400. if (err < 0) {
  401. DRM_ERROR("failed to pack AVI infoframe: %d\n", err);
  402. return err;
  403. }
  404. if (dig && dig->afmt && radeon_encoder->audio &&
  405. radeon_encoder->audio->set_avi_packet)
  406. radeon_encoder->audio->set_avi_packet(rdev, dig->afmt->offset,
  407. buffer, sizeof(buffer));
  408. return 0;
  409. }
  410. /*
  411. * calculate CTS and N values if they are not found in the table
  412. */
  413. static void radeon_audio_calc_cts(unsigned int clock, int *CTS, int *N, int freq)
  414. {
  415. int n, cts;
  416. unsigned long div, mul;
  417. /* Safe, but overly large values */
  418. n = 128 * freq;
  419. cts = clock * 1000;
  420. /* Smallest valid fraction */
  421. div = gcd(n, cts);
  422. n /= div;
  423. cts /= div;
  424. /*
  425. * The optimal N is 128*freq/1000. Calculate the closest larger
  426. * value that doesn't truncate any bits.
  427. */
  428. mul = ((128*freq/1000) + (n-1))/n;
  429. n *= mul;
  430. cts *= mul;
  431. /* Check that we are in spec (not always possible) */
  432. if (n < (128*freq/1500))
  433. pr_warn("Calculated ACR N value is too small. You may experience audio problems.\n");
  434. if (n > (128*freq/300))
  435. pr_warn("Calculated ACR N value is too large. You may experience audio problems.\n");
  436. *N = n;
  437. *CTS = cts;
  438. DRM_DEBUG("Calculated ACR timing N=%d CTS=%d for frequency %d\n",
  439. *N, *CTS, freq);
  440. }
  441. static const struct radeon_hdmi_acr* radeon_audio_acr(unsigned int clock)
  442. {
  443. static struct radeon_hdmi_acr res;
  444. u8 i;
  445. static const struct radeon_hdmi_acr hdmi_predefined_acr[] = {
  446. /* 32kHz 44.1kHz 48kHz */
  447. /* Clock N CTS N CTS N CTS */
  448. { 25175, 4096, 25175, 28224, 125875, 6144, 25175 }, /* 25,20/1.001 MHz */
  449. { 25200, 4096, 25200, 6272, 28000, 6144, 25200 }, /* 25.20 MHz */
  450. { 27000, 4096, 27000, 6272, 30000, 6144, 27000 }, /* 27.00 MHz */
  451. { 27027, 4096, 27027, 6272, 30030, 6144, 27027 }, /* 27.00*1.001 MHz */
  452. { 54000, 4096, 54000, 6272, 60000, 6144, 54000 }, /* 54.00 MHz */
  453. { 54054, 4096, 54054, 6272, 60060, 6144, 54054 }, /* 54.00*1.001 MHz */
  454. { 74176, 4096, 74176, 5733, 75335, 6144, 74176 }, /* 74.25/1.001 MHz */
  455. { 74250, 4096, 74250, 6272, 82500, 6144, 74250 }, /* 74.25 MHz */
  456. { 148352, 4096, 148352, 5733, 150670, 6144, 148352 }, /* 148.50/1.001 MHz */
  457. { 148500, 4096, 148500, 6272, 165000, 6144, 148500 }, /* 148.50 MHz */
  458. };
  459. /* Precalculated values for common clocks */
  460. for (i = 0; i < ARRAY_SIZE(hdmi_predefined_acr); i++)
  461. if (hdmi_predefined_acr[i].clock == clock)
  462. return &hdmi_predefined_acr[i];
  463. /* And odd clocks get manually calculated */
  464. radeon_audio_calc_cts(clock, &res.cts_32khz, &res.n_32khz, 32000);
  465. radeon_audio_calc_cts(clock, &res.cts_44_1khz, &res.n_44_1khz, 44100);
  466. radeon_audio_calc_cts(clock, &res.cts_48khz, &res.n_48khz, 48000);
  467. return &res;
  468. }
  469. /*
  470. * update the N and CTS parameters for a given pixel clock rate
  471. */
  472. static void radeon_audio_update_acr(struct drm_encoder *encoder, unsigned int clock)
  473. {
  474. const struct radeon_hdmi_acr *acr = radeon_audio_acr(clock);
  475. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  476. struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
  477. if (!dig || !dig->afmt)
  478. return;
  479. if (radeon_encoder->audio && radeon_encoder->audio->update_acr)
  480. radeon_encoder->audio->update_acr(encoder, dig->afmt->offset, acr);
  481. }
  482. static void radeon_audio_set_vbi_packet(struct drm_encoder *encoder)
  483. {
  484. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  485. struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
  486. if (!dig || !dig->afmt)
  487. return;
  488. if (radeon_encoder->audio && radeon_encoder->audio->set_vbi_packet)
  489. radeon_encoder->audio->set_vbi_packet(encoder, dig->afmt->offset);
  490. }
  491. static void radeon_hdmi_set_color_depth(struct drm_encoder *encoder)
  492. {
  493. int bpc = 8;
  494. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  495. struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
  496. if (!dig || !dig->afmt)
  497. return;
  498. if (encoder->crtc) {
  499. struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
  500. bpc = radeon_crtc->bpc;
  501. }
  502. if (radeon_encoder->audio && radeon_encoder->audio->set_color_depth)
  503. radeon_encoder->audio->set_color_depth(encoder, dig->afmt->offset, bpc);
  504. }
  505. static void radeon_audio_set_audio_packet(struct drm_encoder *encoder)
  506. {
  507. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  508. struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
  509. if (!dig || !dig->afmt)
  510. return;
  511. if (radeon_encoder->audio && radeon_encoder->audio->set_audio_packet)
  512. radeon_encoder->audio->set_audio_packet(encoder, dig->afmt->offset);
  513. }
  514. static void radeon_audio_set_mute(struct drm_encoder *encoder, bool mute)
  515. {
  516. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  517. struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
  518. if (!dig || !dig->afmt)
  519. return;
  520. if (radeon_encoder->audio && radeon_encoder->audio->set_mute)
  521. radeon_encoder->audio->set_mute(encoder, dig->afmt->offset, mute);
  522. }
  523. /*
  524. * update the info frames with the data from the current display mode
  525. */
  526. static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder,
  527. struct drm_display_mode *mode)
  528. {
  529. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  530. struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
  531. struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
  532. if (!dig || !dig->afmt)
  533. return;
  534. if (!connector)
  535. return;
  536. if (drm_detect_monitor_audio(radeon_connector_edid(connector))) {
  537. radeon_audio_set_mute(encoder, true);
  538. radeon_audio_write_speaker_allocation(encoder);
  539. radeon_audio_write_sad_regs(encoder);
  540. radeon_audio_write_latency_fields(encoder, mode);
  541. radeon_audio_set_dto(encoder, mode->clock);
  542. radeon_audio_set_vbi_packet(encoder);
  543. radeon_hdmi_set_color_depth(encoder);
  544. radeon_audio_update_acr(encoder, mode->clock);
  545. radeon_audio_set_audio_packet(encoder);
  546. radeon_audio_select_pin(encoder);
  547. if (radeon_audio_set_avi_packet(encoder, mode) < 0)
  548. return;
  549. radeon_audio_set_mute(encoder, false);
  550. } else {
  551. radeon_hdmi_set_color_depth(encoder);
  552. if (radeon_audio_set_avi_packet(encoder, mode) < 0)
  553. return;
  554. }
  555. }
  556. static void radeon_audio_dp_mode_set(struct drm_encoder *encoder,
  557. struct drm_display_mode *mode)
  558. {
  559. struct drm_device *dev = encoder->dev;
  560. struct radeon_device *rdev = dev->dev_private;
  561. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  562. struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
  563. struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
  564. if (!dig || !dig->afmt)
  565. return;
  566. if (!connector)
  567. return;
  568. if (drm_detect_monitor_audio(radeon_connector_edid(connector))) {
  569. radeon_audio_write_speaker_allocation(encoder);
  570. radeon_audio_write_sad_regs(encoder);
  571. radeon_audio_write_latency_fields(encoder, mode);
  572. radeon_audio_set_dto(encoder, rdev->clock.vco_freq * 10);
  573. radeon_audio_set_audio_packet(encoder);
  574. radeon_audio_select_pin(encoder);
  575. if (radeon_audio_set_avi_packet(encoder, mode) < 0)
  576. return;
  577. }
  578. }
  579. void radeon_audio_mode_set(struct drm_encoder *encoder,
  580. struct drm_display_mode *mode)
  581. {
  582. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  583. if (radeon_encoder->audio && radeon_encoder->audio->mode_set)
  584. radeon_encoder->audio->mode_set(encoder, mode);
  585. }
  586. void radeon_audio_dpms(struct drm_encoder *encoder, int mode)
  587. {
  588. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  589. if (radeon_encoder->audio && radeon_encoder->audio->dpms)
  590. radeon_encoder->audio->dpms(encoder, mode == DRM_MODE_DPMS_ON);
  591. }
  592. unsigned int radeon_audio_decode_dfs_div(unsigned int div)
  593. {
  594. if (div >= 8 && div < 64)
  595. return (div - 8) * 25 + 200;
  596. else if (div >= 64 && div < 96)
  597. return (div - 64) * 50 + 1600;
  598. else if (div >= 96 && div < 128)
  599. return (div - 96) * 100 + 3200;
  600. else
  601. return 0;
  602. }