atombios_i2c.c 4.1 KB

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  1. /*
  2. * Copyright 2011 Advanced Micro Devices, Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Alex Deucher
  23. *
  24. */
  25. #include <drm/radeon_drm.h>
  26. #include "radeon.h"
  27. #include "atom.h"
  28. #define TARGET_HW_I2C_CLOCK 50
  29. /* these are a limitation of ProcessI2cChannelTransaction not the hw */
  30. #define ATOM_MAX_HW_I2C_WRITE 3
  31. #define ATOM_MAX_HW_I2C_READ 255
  32. static int radeon_process_i2c_ch(struct radeon_i2c_chan *chan,
  33. u8 slave_addr, u8 flags,
  34. u8 *buf, int num)
  35. {
  36. struct drm_device *dev = chan->dev;
  37. struct radeon_device *rdev = dev->dev_private;
  38. PROCESS_I2C_CHANNEL_TRANSACTION_PS_ALLOCATION args;
  39. int index = GetIndexIntoMasterTable(COMMAND, ProcessI2cChannelTransaction);
  40. unsigned char *base;
  41. u16 out = cpu_to_le16(0);
  42. int r = 0;
  43. memset(&args, 0, sizeof(args));
  44. mutex_lock(&chan->mutex);
  45. mutex_lock(&rdev->mode_info.atom_context->scratch_mutex);
  46. base = (unsigned char *)rdev->mode_info.atom_context->scratch;
  47. if (flags & HW_I2C_WRITE) {
  48. if (num > ATOM_MAX_HW_I2C_WRITE) {
  49. DRM_ERROR("hw i2c: tried to write too many bytes (%d vs 3)\n", num);
  50. r = -EINVAL;
  51. goto done;
  52. }
  53. if (buf == NULL)
  54. args.ucRegIndex = 0;
  55. else
  56. args.ucRegIndex = buf[0];
  57. if (num)
  58. num--;
  59. if (num)
  60. memcpy(&out, &buf[1], num);
  61. args.lpI2CDataOut = cpu_to_le16(out);
  62. } else {
  63. args.ucRegIndex = 0;
  64. args.lpI2CDataOut = 0;
  65. }
  66. args.ucFlag = flags;
  67. args.ucI2CSpeed = TARGET_HW_I2C_CLOCK;
  68. args.ucTransBytes = num;
  69. args.ucSlaveAddr = slave_addr << 1;
  70. args.ucLineNumber = chan->rec.i2c_id;
  71. atom_execute_table_scratch_unlocked(rdev->mode_info.atom_context, index, (uint32_t *)&args);
  72. /* error */
  73. if (args.ucStatus != HW_ASSISTED_I2C_STATUS_SUCCESS) {
  74. DRM_DEBUG_KMS("hw_i2c error\n");
  75. r = -EIO;
  76. goto done;
  77. }
  78. if (!(flags & HW_I2C_WRITE))
  79. radeon_atom_copy_swap(buf, base, num, false);
  80. done:
  81. mutex_unlock(&rdev->mode_info.atom_context->scratch_mutex);
  82. mutex_unlock(&chan->mutex);
  83. return r;
  84. }
  85. int radeon_atom_hw_i2c_xfer(struct i2c_adapter *i2c_adap,
  86. struct i2c_msg *msgs, int num)
  87. {
  88. struct radeon_i2c_chan *i2c = i2c_get_adapdata(i2c_adap);
  89. struct i2c_msg *p;
  90. int i, remaining, current_count, buffer_offset, max_bytes, ret;
  91. u8 flags;
  92. /* check for bus probe */
  93. p = &msgs[0];
  94. if ((num == 1) && (p->len == 0)) {
  95. ret = radeon_process_i2c_ch(i2c,
  96. p->addr, HW_I2C_WRITE,
  97. NULL, 0);
  98. if (ret)
  99. return ret;
  100. else
  101. return num;
  102. }
  103. for (i = 0; i < num; i++) {
  104. p = &msgs[i];
  105. remaining = p->len;
  106. buffer_offset = 0;
  107. /* max_bytes are a limitation of ProcessI2cChannelTransaction not the hw */
  108. if (p->flags & I2C_M_RD) {
  109. max_bytes = ATOM_MAX_HW_I2C_READ;
  110. flags = HW_I2C_READ;
  111. } else {
  112. max_bytes = ATOM_MAX_HW_I2C_WRITE;
  113. flags = HW_I2C_WRITE;
  114. }
  115. while (remaining) {
  116. if (remaining > max_bytes)
  117. current_count = max_bytes;
  118. else
  119. current_count = remaining;
  120. ret = radeon_process_i2c_ch(i2c,
  121. p->addr, flags,
  122. &p->buf[buffer_offset], current_count);
  123. if (ret)
  124. return ret;
  125. remaining -= current_count;
  126. buffer_offset += current_count;
  127. }
  128. }
  129. return num;
  130. }
  131. u32 radeon_atom_hw_i2c_func(struct i2c_adapter *adap)
  132. {
  133. return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
  134. }