atom.c 35 KB

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  1. /*
  2. * Copyright 2008 Advanced Micro Devices, Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Author: Stanislaw Skowronek
  23. */
  24. #include <linux/module.h>
  25. #include <linux/sched.h>
  26. #include <linux/slab.h>
  27. #include <linux/string_helpers.h>
  28. #include <asm/unaligned.h>
  29. #include <drm/drm_device.h>
  30. #include <drm/drm_util.h>
  31. #define ATOM_DEBUG
  32. #include "atom.h"
  33. #include "atom-names.h"
  34. #include "atom-bits.h"
  35. #include "radeon.h"
  36. #define ATOM_COND_ABOVE 0
  37. #define ATOM_COND_ABOVEOREQUAL 1
  38. #define ATOM_COND_ALWAYS 2
  39. #define ATOM_COND_BELOW 3
  40. #define ATOM_COND_BELOWOREQUAL 4
  41. #define ATOM_COND_EQUAL 5
  42. #define ATOM_COND_NOTEQUAL 6
  43. #define ATOM_PORT_ATI 0
  44. #define ATOM_PORT_PCI 1
  45. #define ATOM_PORT_SYSIO 2
  46. #define ATOM_UNIT_MICROSEC 0
  47. #define ATOM_UNIT_MILLISEC 1
  48. #define PLL_INDEX 2
  49. #define PLL_DATA 3
  50. typedef struct {
  51. struct atom_context *ctx;
  52. uint32_t *ps, *ws;
  53. int ps_shift;
  54. uint16_t start;
  55. unsigned last_jump;
  56. unsigned long last_jump_jiffies;
  57. bool abort;
  58. } atom_exec_context;
  59. int atom_debug = 0;
  60. static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params);
  61. int atom_execute_table(struct atom_context *ctx, int index, uint32_t * params);
  62. static uint32_t atom_arg_mask[8] = {
  63. 0xFFFFFFFF, 0x0000FFFF, 0x00FFFF00, 0xFFFF0000,
  64. 0x000000FF, 0x0000FF00, 0x00FF0000, 0xFF000000
  65. };
  66. static int atom_arg_shift[8] = { 0, 0, 8, 16, 0, 8, 16, 24 };
  67. static int atom_dst_to_src[8][4] = {
  68. /* translate destination alignment field to the source alignment encoding */
  69. {0, 0, 0, 0},
  70. {1, 2, 3, 0},
  71. {1, 2, 3, 0},
  72. {1, 2, 3, 0},
  73. {4, 5, 6, 7},
  74. {4, 5, 6, 7},
  75. {4, 5, 6, 7},
  76. {4, 5, 6, 7},
  77. };
  78. static int atom_def_dst[8] = { 0, 0, 1, 2, 0, 1, 2, 3 };
  79. static int debug_depth = 0;
  80. #ifdef ATOM_DEBUG
  81. static void debug_print_spaces(int n)
  82. {
  83. while (n--)
  84. printk(" ");
  85. }
  86. #define DEBUG(...) do if (atom_debug) { printk(KERN_DEBUG __VA_ARGS__); } while (0)
  87. #define SDEBUG(...) do if (atom_debug) { printk(KERN_DEBUG); debug_print_spaces(debug_depth); printk(__VA_ARGS__); } while (0)
  88. #else
  89. #define DEBUG(...) do { } while (0)
  90. #define SDEBUG(...) do { } while (0)
  91. #endif
  92. static uint32_t atom_iio_execute(struct atom_context *ctx, int base,
  93. uint32_t index, uint32_t data)
  94. {
  95. struct radeon_device *rdev = ctx->card->dev->dev_private;
  96. uint32_t temp = 0xCDCDCDCD;
  97. while (1)
  98. switch (CU8(base)) {
  99. case ATOM_IIO_NOP:
  100. base++;
  101. break;
  102. case ATOM_IIO_READ:
  103. temp = ctx->card->ioreg_read(ctx->card, CU16(base + 1));
  104. base += 3;
  105. break;
  106. case ATOM_IIO_WRITE:
  107. if (rdev->family == CHIP_RV515)
  108. (void)ctx->card->ioreg_read(ctx->card, CU16(base + 1));
  109. ctx->card->ioreg_write(ctx->card, CU16(base + 1), temp);
  110. base += 3;
  111. break;
  112. case ATOM_IIO_CLEAR:
  113. temp &=
  114. ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
  115. CU8(base + 2));
  116. base += 3;
  117. break;
  118. case ATOM_IIO_SET:
  119. temp |=
  120. (0xFFFFFFFF >> (32 - CU8(base + 1))) << CU8(base +
  121. 2);
  122. base += 3;
  123. break;
  124. case ATOM_IIO_MOVE_INDEX:
  125. temp &=
  126. ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
  127. CU8(base + 3));
  128. temp |=
  129. ((index >> CU8(base + 2)) &
  130. (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
  131. 3);
  132. base += 4;
  133. break;
  134. case ATOM_IIO_MOVE_DATA:
  135. temp &=
  136. ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
  137. CU8(base + 3));
  138. temp |=
  139. ((data >> CU8(base + 2)) &
  140. (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
  141. 3);
  142. base += 4;
  143. break;
  144. case ATOM_IIO_MOVE_ATTR:
  145. temp &=
  146. ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
  147. CU8(base + 3));
  148. temp |=
  149. ((ctx->
  150. io_attr >> CU8(base + 2)) & (0xFFFFFFFF >> (32 -
  151. CU8
  152. (base
  153. +
  154. 1))))
  155. << CU8(base + 3);
  156. base += 4;
  157. break;
  158. case ATOM_IIO_END:
  159. return temp;
  160. default:
  161. pr_info("Unknown IIO opcode\n");
  162. return 0;
  163. }
  164. }
  165. static uint32_t atom_get_src_int(atom_exec_context *ctx, uint8_t attr,
  166. int *ptr, uint32_t *saved, int print)
  167. {
  168. uint32_t idx, val = 0xCDCDCDCD, align, arg;
  169. struct atom_context *gctx = ctx->ctx;
  170. arg = attr & 7;
  171. align = (attr >> 3) & 7;
  172. switch (arg) {
  173. case ATOM_ARG_REG:
  174. idx = U16(*ptr);
  175. (*ptr) += 2;
  176. if (print)
  177. DEBUG("REG[0x%04X]", idx);
  178. idx += gctx->reg_block;
  179. switch (gctx->io_mode) {
  180. case ATOM_IO_MM:
  181. val = gctx->card->reg_read(gctx->card, idx);
  182. break;
  183. case ATOM_IO_PCI:
  184. pr_info("PCI registers are not implemented\n");
  185. return 0;
  186. case ATOM_IO_SYSIO:
  187. pr_info("SYSIO registers are not implemented\n");
  188. return 0;
  189. default:
  190. if (!(gctx->io_mode & 0x80)) {
  191. pr_info("Bad IO mode\n");
  192. return 0;
  193. }
  194. if (!gctx->iio[gctx->io_mode & 0x7F]) {
  195. pr_info("Undefined indirect IO read method %d\n",
  196. gctx->io_mode & 0x7F);
  197. return 0;
  198. }
  199. val =
  200. atom_iio_execute(gctx,
  201. gctx->iio[gctx->io_mode & 0x7F],
  202. idx, 0);
  203. }
  204. break;
  205. case ATOM_ARG_PS:
  206. idx = U8(*ptr);
  207. (*ptr)++;
  208. /* get_unaligned_le32 avoids unaligned accesses from atombios
  209. * tables, noticed on a DEC Alpha. */
  210. val = get_unaligned_le32((u32 *)&ctx->ps[idx]);
  211. if (print)
  212. DEBUG("PS[0x%02X,0x%04X]", idx, val);
  213. break;
  214. case ATOM_ARG_WS:
  215. idx = U8(*ptr);
  216. (*ptr)++;
  217. if (print)
  218. DEBUG("WS[0x%02X]", idx);
  219. switch (idx) {
  220. case ATOM_WS_QUOTIENT:
  221. val = gctx->divmul[0];
  222. break;
  223. case ATOM_WS_REMAINDER:
  224. val = gctx->divmul[1];
  225. break;
  226. case ATOM_WS_DATAPTR:
  227. val = gctx->data_block;
  228. break;
  229. case ATOM_WS_SHIFT:
  230. val = gctx->shift;
  231. break;
  232. case ATOM_WS_OR_MASK:
  233. val = 1 << gctx->shift;
  234. break;
  235. case ATOM_WS_AND_MASK:
  236. val = ~(1 << gctx->shift);
  237. break;
  238. case ATOM_WS_FB_WINDOW:
  239. val = gctx->fb_base;
  240. break;
  241. case ATOM_WS_ATTRIBUTES:
  242. val = gctx->io_attr;
  243. break;
  244. case ATOM_WS_REGPTR:
  245. val = gctx->reg_block;
  246. break;
  247. default:
  248. val = ctx->ws[idx];
  249. }
  250. break;
  251. case ATOM_ARG_ID:
  252. idx = U16(*ptr);
  253. (*ptr) += 2;
  254. if (print) {
  255. if (gctx->data_block)
  256. DEBUG("ID[0x%04X+%04X]", idx, gctx->data_block);
  257. else
  258. DEBUG("ID[0x%04X]", idx);
  259. }
  260. val = U32(idx + gctx->data_block);
  261. break;
  262. case ATOM_ARG_FB:
  263. idx = U8(*ptr);
  264. (*ptr)++;
  265. if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) {
  266. DRM_ERROR("ATOM: fb read beyond scratch region: %d vs. %d\n",
  267. gctx->fb_base + (idx * 4), gctx->scratch_size_bytes);
  268. val = 0;
  269. } else
  270. val = gctx->scratch[(gctx->fb_base / 4) + idx];
  271. if (print)
  272. DEBUG("FB[0x%02X]", idx);
  273. break;
  274. case ATOM_ARG_IMM:
  275. switch (align) {
  276. case ATOM_SRC_DWORD:
  277. val = U32(*ptr);
  278. (*ptr) += 4;
  279. if (print)
  280. DEBUG("IMM 0x%08X\n", val);
  281. return val;
  282. case ATOM_SRC_WORD0:
  283. case ATOM_SRC_WORD8:
  284. case ATOM_SRC_WORD16:
  285. val = U16(*ptr);
  286. (*ptr) += 2;
  287. if (print)
  288. DEBUG("IMM 0x%04X\n", val);
  289. return val;
  290. case ATOM_SRC_BYTE0:
  291. case ATOM_SRC_BYTE8:
  292. case ATOM_SRC_BYTE16:
  293. case ATOM_SRC_BYTE24:
  294. val = U8(*ptr);
  295. (*ptr)++;
  296. if (print)
  297. DEBUG("IMM 0x%02X\n", val);
  298. return val;
  299. }
  300. return 0;
  301. case ATOM_ARG_PLL:
  302. idx = U8(*ptr);
  303. (*ptr)++;
  304. if (print)
  305. DEBUG("PLL[0x%02X]", idx);
  306. val = gctx->card->pll_read(gctx->card, idx);
  307. break;
  308. case ATOM_ARG_MC:
  309. idx = U8(*ptr);
  310. (*ptr)++;
  311. if (print)
  312. DEBUG("MC[0x%02X]", idx);
  313. val = gctx->card->mc_read(gctx->card, idx);
  314. break;
  315. }
  316. if (saved)
  317. *saved = val;
  318. val &= atom_arg_mask[align];
  319. val >>= atom_arg_shift[align];
  320. if (print)
  321. switch (align) {
  322. case ATOM_SRC_DWORD:
  323. DEBUG(".[31:0] -> 0x%08X\n", val);
  324. break;
  325. case ATOM_SRC_WORD0:
  326. DEBUG(".[15:0] -> 0x%04X\n", val);
  327. break;
  328. case ATOM_SRC_WORD8:
  329. DEBUG(".[23:8] -> 0x%04X\n", val);
  330. break;
  331. case ATOM_SRC_WORD16:
  332. DEBUG(".[31:16] -> 0x%04X\n", val);
  333. break;
  334. case ATOM_SRC_BYTE0:
  335. DEBUG(".[7:0] -> 0x%02X\n", val);
  336. break;
  337. case ATOM_SRC_BYTE8:
  338. DEBUG(".[15:8] -> 0x%02X\n", val);
  339. break;
  340. case ATOM_SRC_BYTE16:
  341. DEBUG(".[23:16] -> 0x%02X\n", val);
  342. break;
  343. case ATOM_SRC_BYTE24:
  344. DEBUG(".[31:24] -> 0x%02X\n", val);
  345. break;
  346. }
  347. return val;
  348. }
  349. static void atom_skip_src_int(atom_exec_context *ctx, uint8_t attr, int *ptr)
  350. {
  351. uint32_t align = (attr >> 3) & 7, arg = attr & 7;
  352. switch (arg) {
  353. case ATOM_ARG_REG:
  354. case ATOM_ARG_ID:
  355. (*ptr) += 2;
  356. break;
  357. case ATOM_ARG_PLL:
  358. case ATOM_ARG_MC:
  359. case ATOM_ARG_PS:
  360. case ATOM_ARG_WS:
  361. case ATOM_ARG_FB:
  362. (*ptr)++;
  363. break;
  364. case ATOM_ARG_IMM:
  365. switch (align) {
  366. case ATOM_SRC_DWORD:
  367. (*ptr) += 4;
  368. return;
  369. case ATOM_SRC_WORD0:
  370. case ATOM_SRC_WORD8:
  371. case ATOM_SRC_WORD16:
  372. (*ptr) += 2;
  373. return;
  374. case ATOM_SRC_BYTE0:
  375. case ATOM_SRC_BYTE8:
  376. case ATOM_SRC_BYTE16:
  377. case ATOM_SRC_BYTE24:
  378. (*ptr)++;
  379. return;
  380. }
  381. return;
  382. }
  383. }
  384. static uint32_t atom_get_src(atom_exec_context *ctx, uint8_t attr, int *ptr)
  385. {
  386. return atom_get_src_int(ctx, attr, ptr, NULL, 1);
  387. }
  388. static uint32_t atom_get_src_direct(atom_exec_context *ctx, uint8_t align, int *ptr)
  389. {
  390. uint32_t val = 0xCDCDCDCD;
  391. switch (align) {
  392. case ATOM_SRC_DWORD:
  393. val = U32(*ptr);
  394. (*ptr) += 4;
  395. break;
  396. case ATOM_SRC_WORD0:
  397. case ATOM_SRC_WORD8:
  398. case ATOM_SRC_WORD16:
  399. val = U16(*ptr);
  400. (*ptr) += 2;
  401. break;
  402. case ATOM_SRC_BYTE0:
  403. case ATOM_SRC_BYTE8:
  404. case ATOM_SRC_BYTE16:
  405. case ATOM_SRC_BYTE24:
  406. val = U8(*ptr);
  407. (*ptr)++;
  408. break;
  409. }
  410. return val;
  411. }
  412. static uint32_t atom_get_dst(atom_exec_context *ctx, int arg, uint8_t attr,
  413. int *ptr, uint32_t *saved, int print)
  414. {
  415. return atom_get_src_int(ctx,
  416. arg | atom_dst_to_src[(attr >> 3) &
  417. 7][(attr >> 6) & 3] << 3,
  418. ptr, saved, print);
  419. }
  420. static void atom_skip_dst(atom_exec_context *ctx, int arg, uint8_t attr, int *ptr)
  421. {
  422. atom_skip_src_int(ctx,
  423. arg | atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) &
  424. 3] << 3, ptr);
  425. }
  426. static void atom_put_dst(atom_exec_context *ctx, int arg, uint8_t attr,
  427. int *ptr, uint32_t val, uint32_t saved)
  428. {
  429. uint32_t align =
  430. atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3], old_val =
  431. val, idx;
  432. struct atom_context *gctx = ctx->ctx;
  433. old_val &= atom_arg_mask[align] >> atom_arg_shift[align];
  434. val <<= atom_arg_shift[align];
  435. val &= atom_arg_mask[align];
  436. saved &= ~atom_arg_mask[align];
  437. val |= saved;
  438. switch (arg) {
  439. case ATOM_ARG_REG:
  440. idx = U16(*ptr);
  441. (*ptr) += 2;
  442. DEBUG("REG[0x%04X]", idx);
  443. idx += gctx->reg_block;
  444. switch (gctx->io_mode) {
  445. case ATOM_IO_MM:
  446. if (idx == 0)
  447. gctx->card->reg_write(gctx->card, idx,
  448. val << 2);
  449. else
  450. gctx->card->reg_write(gctx->card, idx, val);
  451. break;
  452. case ATOM_IO_PCI:
  453. pr_info("PCI registers are not implemented\n");
  454. return;
  455. case ATOM_IO_SYSIO:
  456. pr_info("SYSIO registers are not implemented\n");
  457. return;
  458. default:
  459. if (!(gctx->io_mode & 0x80)) {
  460. pr_info("Bad IO mode\n");
  461. return;
  462. }
  463. if (!gctx->iio[gctx->io_mode & 0xFF]) {
  464. pr_info("Undefined indirect IO write method %d\n",
  465. gctx->io_mode & 0x7F);
  466. return;
  467. }
  468. atom_iio_execute(gctx, gctx->iio[gctx->io_mode & 0xFF],
  469. idx, val);
  470. }
  471. break;
  472. case ATOM_ARG_PS:
  473. idx = U8(*ptr);
  474. (*ptr)++;
  475. DEBUG("PS[0x%02X]", idx);
  476. ctx->ps[idx] = cpu_to_le32(val);
  477. break;
  478. case ATOM_ARG_WS:
  479. idx = U8(*ptr);
  480. (*ptr)++;
  481. DEBUG("WS[0x%02X]", idx);
  482. switch (idx) {
  483. case ATOM_WS_QUOTIENT:
  484. gctx->divmul[0] = val;
  485. break;
  486. case ATOM_WS_REMAINDER:
  487. gctx->divmul[1] = val;
  488. break;
  489. case ATOM_WS_DATAPTR:
  490. gctx->data_block = val;
  491. break;
  492. case ATOM_WS_SHIFT:
  493. gctx->shift = val;
  494. break;
  495. case ATOM_WS_OR_MASK:
  496. case ATOM_WS_AND_MASK:
  497. break;
  498. case ATOM_WS_FB_WINDOW:
  499. gctx->fb_base = val;
  500. break;
  501. case ATOM_WS_ATTRIBUTES:
  502. gctx->io_attr = val;
  503. break;
  504. case ATOM_WS_REGPTR:
  505. gctx->reg_block = val;
  506. break;
  507. default:
  508. ctx->ws[idx] = val;
  509. }
  510. break;
  511. case ATOM_ARG_FB:
  512. idx = U8(*ptr);
  513. (*ptr)++;
  514. if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) {
  515. DRM_ERROR("ATOM: fb write beyond scratch region: %d vs. %d\n",
  516. gctx->fb_base + (idx * 4), gctx->scratch_size_bytes);
  517. } else
  518. gctx->scratch[(gctx->fb_base / 4) + idx] = val;
  519. DEBUG("FB[0x%02X]", idx);
  520. break;
  521. case ATOM_ARG_PLL:
  522. idx = U8(*ptr);
  523. (*ptr)++;
  524. DEBUG("PLL[0x%02X]", idx);
  525. gctx->card->pll_write(gctx->card, idx, val);
  526. break;
  527. case ATOM_ARG_MC:
  528. idx = U8(*ptr);
  529. (*ptr)++;
  530. DEBUG("MC[0x%02X]", idx);
  531. gctx->card->mc_write(gctx->card, idx, val);
  532. return;
  533. }
  534. switch (align) {
  535. case ATOM_SRC_DWORD:
  536. DEBUG(".[31:0] <- 0x%08X\n", old_val);
  537. break;
  538. case ATOM_SRC_WORD0:
  539. DEBUG(".[15:0] <- 0x%04X\n", old_val);
  540. break;
  541. case ATOM_SRC_WORD8:
  542. DEBUG(".[23:8] <- 0x%04X\n", old_val);
  543. break;
  544. case ATOM_SRC_WORD16:
  545. DEBUG(".[31:16] <- 0x%04X\n", old_val);
  546. break;
  547. case ATOM_SRC_BYTE0:
  548. DEBUG(".[7:0] <- 0x%02X\n", old_val);
  549. break;
  550. case ATOM_SRC_BYTE8:
  551. DEBUG(".[15:8] <- 0x%02X\n", old_val);
  552. break;
  553. case ATOM_SRC_BYTE16:
  554. DEBUG(".[23:16] <- 0x%02X\n", old_val);
  555. break;
  556. case ATOM_SRC_BYTE24:
  557. DEBUG(".[31:24] <- 0x%02X\n", old_val);
  558. break;
  559. }
  560. }
  561. static void atom_op_add(atom_exec_context *ctx, int *ptr, int arg)
  562. {
  563. uint8_t attr = U8((*ptr)++);
  564. uint32_t dst, src, saved;
  565. int dptr = *ptr;
  566. SDEBUG(" dst: ");
  567. dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
  568. SDEBUG(" src: ");
  569. src = atom_get_src(ctx, attr, ptr);
  570. dst += src;
  571. SDEBUG(" dst: ");
  572. atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
  573. }
  574. static void atom_op_and(atom_exec_context *ctx, int *ptr, int arg)
  575. {
  576. uint8_t attr = U8((*ptr)++);
  577. uint32_t dst, src, saved;
  578. int dptr = *ptr;
  579. SDEBUG(" dst: ");
  580. dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
  581. SDEBUG(" src: ");
  582. src = atom_get_src(ctx, attr, ptr);
  583. dst &= src;
  584. SDEBUG(" dst: ");
  585. atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
  586. }
  587. static void atom_op_beep(atom_exec_context *ctx, int *ptr, int arg)
  588. {
  589. printk("ATOM BIOS beeped!\n");
  590. }
  591. static void atom_op_calltable(atom_exec_context *ctx, int *ptr, int arg)
  592. {
  593. int idx = U8((*ptr)++);
  594. int r = 0;
  595. if (idx < ATOM_TABLE_NAMES_CNT)
  596. SDEBUG(" table: %d (%s)\n", idx, atom_table_names[idx]);
  597. else
  598. SDEBUG(" table: %d\n", idx);
  599. if (U16(ctx->ctx->cmd_table + 4 + 2 * idx))
  600. r = atom_execute_table_locked(ctx->ctx, idx, ctx->ps + ctx->ps_shift);
  601. if (r) {
  602. ctx->abort = true;
  603. }
  604. }
  605. static void atom_op_clear(atom_exec_context *ctx, int *ptr, int arg)
  606. {
  607. uint8_t attr = U8((*ptr)++);
  608. uint32_t saved;
  609. int dptr = *ptr;
  610. attr &= 0x38;
  611. attr |= atom_def_dst[attr >> 3] << 6;
  612. atom_get_dst(ctx, arg, attr, ptr, &saved, 0);
  613. SDEBUG(" dst: ");
  614. atom_put_dst(ctx, arg, attr, &dptr, 0, saved);
  615. }
  616. static void atom_op_compare(atom_exec_context *ctx, int *ptr, int arg)
  617. {
  618. uint8_t attr = U8((*ptr)++);
  619. uint32_t dst, src;
  620. SDEBUG(" src1: ");
  621. dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
  622. SDEBUG(" src2: ");
  623. src = atom_get_src(ctx, attr, ptr);
  624. ctx->ctx->cs_equal = (dst == src);
  625. ctx->ctx->cs_above = (dst > src);
  626. SDEBUG(" result: %s %s\n", ctx->ctx->cs_equal ? "EQ" : "NE",
  627. ctx->ctx->cs_above ? "GT" : "LE");
  628. }
  629. static void atom_op_delay(atom_exec_context *ctx, int *ptr, int arg)
  630. {
  631. unsigned count = U8((*ptr)++);
  632. SDEBUG(" count: %d\n", count);
  633. if (arg == ATOM_UNIT_MICROSEC)
  634. udelay(count);
  635. else if (!drm_can_sleep())
  636. mdelay(count);
  637. else
  638. msleep(count);
  639. }
  640. static void atom_op_div(atom_exec_context *ctx, int *ptr, int arg)
  641. {
  642. uint8_t attr = U8((*ptr)++);
  643. uint32_t dst, src;
  644. SDEBUG(" src1: ");
  645. dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
  646. SDEBUG(" src2: ");
  647. src = atom_get_src(ctx, attr, ptr);
  648. if (src != 0) {
  649. ctx->ctx->divmul[0] = dst / src;
  650. ctx->ctx->divmul[1] = dst % src;
  651. } else {
  652. ctx->ctx->divmul[0] = 0;
  653. ctx->ctx->divmul[1] = 0;
  654. }
  655. }
  656. static void atom_op_eot(atom_exec_context *ctx, int *ptr, int arg)
  657. {
  658. /* functionally, a nop */
  659. }
  660. static void atom_op_jump(atom_exec_context *ctx, int *ptr, int arg)
  661. {
  662. int execute = 0, target = U16(*ptr);
  663. unsigned long cjiffies;
  664. (*ptr) += 2;
  665. switch (arg) {
  666. case ATOM_COND_ABOVE:
  667. execute = ctx->ctx->cs_above;
  668. break;
  669. case ATOM_COND_ABOVEOREQUAL:
  670. execute = ctx->ctx->cs_above || ctx->ctx->cs_equal;
  671. break;
  672. case ATOM_COND_ALWAYS:
  673. execute = 1;
  674. break;
  675. case ATOM_COND_BELOW:
  676. execute = !(ctx->ctx->cs_above || ctx->ctx->cs_equal);
  677. break;
  678. case ATOM_COND_BELOWOREQUAL:
  679. execute = !ctx->ctx->cs_above;
  680. break;
  681. case ATOM_COND_EQUAL:
  682. execute = ctx->ctx->cs_equal;
  683. break;
  684. case ATOM_COND_NOTEQUAL:
  685. execute = !ctx->ctx->cs_equal;
  686. break;
  687. }
  688. if (arg != ATOM_COND_ALWAYS)
  689. SDEBUG(" taken: %s\n", str_yes_no(execute));
  690. SDEBUG(" target: 0x%04X\n", target);
  691. if (execute) {
  692. if (ctx->last_jump == (ctx->start + target)) {
  693. cjiffies = jiffies;
  694. if (time_after(cjiffies, ctx->last_jump_jiffies)) {
  695. cjiffies -= ctx->last_jump_jiffies;
  696. if ((jiffies_to_msecs(cjiffies) > 5000)) {
  697. DRM_ERROR("atombios stuck in loop for more than 5secs aborting\n");
  698. ctx->abort = true;
  699. }
  700. } else {
  701. /* jiffies wrap around we will just wait a little longer */
  702. ctx->last_jump_jiffies = jiffies;
  703. }
  704. } else {
  705. ctx->last_jump = ctx->start + target;
  706. ctx->last_jump_jiffies = jiffies;
  707. }
  708. *ptr = ctx->start + target;
  709. }
  710. }
  711. static void atom_op_mask(atom_exec_context *ctx, int *ptr, int arg)
  712. {
  713. uint8_t attr = U8((*ptr)++);
  714. uint32_t dst, mask, src, saved;
  715. int dptr = *ptr;
  716. SDEBUG(" dst: ");
  717. dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
  718. mask = atom_get_src_direct(ctx, ((attr >> 3) & 7), ptr);
  719. SDEBUG(" mask: 0x%08x", mask);
  720. SDEBUG(" src: ");
  721. src = atom_get_src(ctx, attr, ptr);
  722. dst &= mask;
  723. dst |= src;
  724. SDEBUG(" dst: ");
  725. atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
  726. }
  727. static void atom_op_move(atom_exec_context *ctx, int *ptr, int arg)
  728. {
  729. uint8_t attr = U8((*ptr)++);
  730. uint32_t src, saved;
  731. int dptr = *ptr;
  732. if (((attr >> 3) & 7) != ATOM_SRC_DWORD)
  733. atom_get_dst(ctx, arg, attr, ptr, &saved, 0);
  734. else {
  735. atom_skip_dst(ctx, arg, attr, ptr);
  736. saved = 0xCDCDCDCD;
  737. }
  738. SDEBUG(" src: ");
  739. src = atom_get_src(ctx, attr, ptr);
  740. SDEBUG(" dst: ");
  741. atom_put_dst(ctx, arg, attr, &dptr, src, saved);
  742. }
  743. static void atom_op_mul(atom_exec_context *ctx, int *ptr, int arg)
  744. {
  745. uint8_t attr = U8((*ptr)++);
  746. uint32_t dst, src;
  747. SDEBUG(" src1: ");
  748. dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
  749. SDEBUG(" src2: ");
  750. src = atom_get_src(ctx, attr, ptr);
  751. ctx->ctx->divmul[0] = dst * src;
  752. }
  753. static void atom_op_nop(atom_exec_context *ctx, int *ptr, int arg)
  754. {
  755. /* nothing */
  756. }
  757. static void atom_op_or(atom_exec_context *ctx, int *ptr, int arg)
  758. {
  759. uint8_t attr = U8((*ptr)++);
  760. uint32_t dst, src, saved;
  761. int dptr = *ptr;
  762. SDEBUG(" dst: ");
  763. dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
  764. SDEBUG(" src: ");
  765. src = atom_get_src(ctx, attr, ptr);
  766. dst |= src;
  767. SDEBUG(" dst: ");
  768. atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
  769. }
  770. static void atom_op_postcard(atom_exec_context *ctx, int *ptr, int arg)
  771. {
  772. uint8_t val = U8((*ptr)++);
  773. SDEBUG("POST card output: 0x%02X\n", val);
  774. }
  775. static void atom_op_repeat(atom_exec_context *ctx, int *ptr, int arg)
  776. {
  777. pr_info("unimplemented!\n");
  778. }
  779. static void atom_op_restorereg(atom_exec_context *ctx, int *ptr, int arg)
  780. {
  781. pr_info("unimplemented!\n");
  782. }
  783. static void atom_op_savereg(atom_exec_context *ctx, int *ptr, int arg)
  784. {
  785. pr_info("unimplemented!\n");
  786. }
  787. static void atom_op_setdatablock(atom_exec_context *ctx, int *ptr, int arg)
  788. {
  789. int idx = U8(*ptr);
  790. (*ptr)++;
  791. SDEBUG(" block: %d\n", idx);
  792. if (!idx)
  793. ctx->ctx->data_block = 0;
  794. else if (idx == 255)
  795. ctx->ctx->data_block = ctx->start;
  796. else
  797. ctx->ctx->data_block = U16(ctx->ctx->data_table + 4 + 2 * idx);
  798. SDEBUG(" base: 0x%04X\n", ctx->ctx->data_block);
  799. }
  800. static void atom_op_setfbbase(atom_exec_context *ctx, int *ptr, int arg)
  801. {
  802. uint8_t attr = U8((*ptr)++);
  803. SDEBUG(" fb_base: ");
  804. ctx->ctx->fb_base = atom_get_src(ctx, attr, ptr);
  805. }
  806. static void atom_op_setport(atom_exec_context *ctx, int *ptr, int arg)
  807. {
  808. int port;
  809. switch (arg) {
  810. case ATOM_PORT_ATI:
  811. port = U16(*ptr);
  812. if (port < ATOM_IO_NAMES_CNT)
  813. SDEBUG(" port: %d (%s)\n", port, atom_io_names[port]);
  814. else
  815. SDEBUG(" port: %d\n", port);
  816. if (!port)
  817. ctx->ctx->io_mode = ATOM_IO_MM;
  818. else
  819. ctx->ctx->io_mode = ATOM_IO_IIO | port;
  820. (*ptr) += 2;
  821. break;
  822. case ATOM_PORT_PCI:
  823. ctx->ctx->io_mode = ATOM_IO_PCI;
  824. (*ptr)++;
  825. break;
  826. case ATOM_PORT_SYSIO:
  827. ctx->ctx->io_mode = ATOM_IO_SYSIO;
  828. (*ptr)++;
  829. break;
  830. }
  831. }
  832. static void atom_op_setregblock(atom_exec_context *ctx, int *ptr, int arg)
  833. {
  834. ctx->ctx->reg_block = U16(*ptr);
  835. (*ptr) += 2;
  836. SDEBUG(" base: 0x%04X\n", ctx->ctx->reg_block);
  837. }
  838. static void atom_op_shift_left(atom_exec_context *ctx, int *ptr, int arg)
  839. {
  840. uint8_t attr = U8((*ptr)++), shift;
  841. uint32_t saved, dst;
  842. int dptr = *ptr;
  843. attr &= 0x38;
  844. attr |= atom_def_dst[attr >> 3] << 6;
  845. SDEBUG(" dst: ");
  846. dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
  847. shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);
  848. SDEBUG(" shift: %d\n", shift);
  849. dst <<= shift;
  850. SDEBUG(" dst: ");
  851. atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
  852. }
  853. static void atom_op_shift_right(atom_exec_context *ctx, int *ptr, int arg)
  854. {
  855. uint8_t attr = U8((*ptr)++), shift;
  856. uint32_t saved, dst;
  857. int dptr = *ptr;
  858. attr &= 0x38;
  859. attr |= atom_def_dst[attr >> 3] << 6;
  860. SDEBUG(" dst: ");
  861. dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
  862. shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);
  863. SDEBUG(" shift: %d\n", shift);
  864. dst >>= shift;
  865. SDEBUG(" dst: ");
  866. atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
  867. }
  868. static void atom_op_shl(atom_exec_context *ctx, int *ptr, int arg)
  869. {
  870. uint8_t attr = U8((*ptr)++), shift;
  871. uint32_t saved, dst;
  872. int dptr = *ptr;
  873. uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3];
  874. SDEBUG(" dst: ");
  875. dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
  876. /* op needs to full dst value */
  877. dst = saved;
  878. shift = atom_get_src(ctx, attr, ptr);
  879. SDEBUG(" shift: %d\n", shift);
  880. dst <<= shift;
  881. dst &= atom_arg_mask[dst_align];
  882. dst >>= atom_arg_shift[dst_align];
  883. SDEBUG(" dst: ");
  884. atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
  885. }
  886. static void atom_op_shr(atom_exec_context *ctx, int *ptr, int arg)
  887. {
  888. uint8_t attr = U8((*ptr)++), shift;
  889. uint32_t saved, dst;
  890. int dptr = *ptr;
  891. uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3];
  892. SDEBUG(" dst: ");
  893. dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
  894. /* op needs to full dst value */
  895. dst = saved;
  896. shift = atom_get_src(ctx, attr, ptr);
  897. SDEBUG(" shift: %d\n", shift);
  898. dst >>= shift;
  899. dst &= atom_arg_mask[dst_align];
  900. dst >>= atom_arg_shift[dst_align];
  901. SDEBUG(" dst: ");
  902. atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
  903. }
  904. static void atom_op_sub(atom_exec_context *ctx, int *ptr, int arg)
  905. {
  906. uint8_t attr = U8((*ptr)++);
  907. uint32_t dst, src, saved;
  908. int dptr = *ptr;
  909. SDEBUG(" dst: ");
  910. dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
  911. SDEBUG(" src: ");
  912. src = atom_get_src(ctx, attr, ptr);
  913. dst -= src;
  914. SDEBUG(" dst: ");
  915. atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
  916. }
  917. static void atom_op_switch(atom_exec_context *ctx, int *ptr, int arg)
  918. {
  919. uint8_t attr = U8((*ptr)++);
  920. uint32_t src, val, target;
  921. SDEBUG(" switch: ");
  922. src = atom_get_src(ctx, attr, ptr);
  923. while (U16(*ptr) != ATOM_CASE_END)
  924. if (U8(*ptr) == ATOM_CASE_MAGIC) {
  925. (*ptr)++;
  926. SDEBUG(" case: ");
  927. val =
  928. atom_get_src(ctx, (attr & 0x38) | ATOM_ARG_IMM,
  929. ptr);
  930. target = U16(*ptr);
  931. if (val == src) {
  932. SDEBUG(" target: %04X\n", target);
  933. *ptr = ctx->start + target;
  934. return;
  935. }
  936. (*ptr) += 2;
  937. } else {
  938. pr_info("Bad case\n");
  939. return;
  940. }
  941. (*ptr) += 2;
  942. }
  943. static void atom_op_test(atom_exec_context *ctx, int *ptr, int arg)
  944. {
  945. uint8_t attr = U8((*ptr)++);
  946. uint32_t dst, src;
  947. SDEBUG(" src1: ");
  948. dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
  949. SDEBUG(" src2: ");
  950. src = atom_get_src(ctx, attr, ptr);
  951. ctx->ctx->cs_equal = ((dst & src) == 0);
  952. SDEBUG(" result: %s\n", ctx->ctx->cs_equal ? "EQ" : "NE");
  953. }
  954. static void atom_op_xor(atom_exec_context *ctx, int *ptr, int arg)
  955. {
  956. uint8_t attr = U8((*ptr)++);
  957. uint32_t dst, src, saved;
  958. int dptr = *ptr;
  959. SDEBUG(" dst: ");
  960. dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
  961. SDEBUG(" src: ");
  962. src = atom_get_src(ctx, attr, ptr);
  963. dst ^= src;
  964. SDEBUG(" dst: ");
  965. atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
  966. }
  967. static void atom_op_debug(atom_exec_context *ctx, int *ptr, int arg)
  968. {
  969. pr_info("unimplemented!\n");
  970. }
  971. static struct {
  972. void (*func) (atom_exec_context *, int *, int);
  973. int arg;
  974. } opcode_table[ATOM_OP_CNT] = {
  975. {
  976. NULL, 0}, {
  977. atom_op_move, ATOM_ARG_REG}, {
  978. atom_op_move, ATOM_ARG_PS}, {
  979. atom_op_move, ATOM_ARG_WS}, {
  980. atom_op_move, ATOM_ARG_FB}, {
  981. atom_op_move, ATOM_ARG_PLL}, {
  982. atom_op_move, ATOM_ARG_MC}, {
  983. atom_op_and, ATOM_ARG_REG}, {
  984. atom_op_and, ATOM_ARG_PS}, {
  985. atom_op_and, ATOM_ARG_WS}, {
  986. atom_op_and, ATOM_ARG_FB}, {
  987. atom_op_and, ATOM_ARG_PLL}, {
  988. atom_op_and, ATOM_ARG_MC}, {
  989. atom_op_or, ATOM_ARG_REG}, {
  990. atom_op_or, ATOM_ARG_PS}, {
  991. atom_op_or, ATOM_ARG_WS}, {
  992. atom_op_or, ATOM_ARG_FB}, {
  993. atom_op_or, ATOM_ARG_PLL}, {
  994. atom_op_or, ATOM_ARG_MC}, {
  995. atom_op_shift_left, ATOM_ARG_REG}, {
  996. atom_op_shift_left, ATOM_ARG_PS}, {
  997. atom_op_shift_left, ATOM_ARG_WS}, {
  998. atom_op_shift_left, ATOM_ARG_FB}, {
  999. atom_op_shift_left, ATOM_ARG_PLL}, {
  1000. atom_op_shift_left, ATOM_ARG_MC}, {
  1001. atom_op_shift_right, ATOM_ARG_REG}, {
  1002. atom_op_shift_right, ATOM_ARG_PS}, {
  1003. atom_op_shift_right, ATOM_ARG_WS}, {
  1004. atom_op_shift_right, ATOM_ARG_FB}, {
  1005. atom_op_shift_right, ATOM_ARG_PLL}, {
  1006. atom_op_shift_right, ATOM_ARG_MC}, {
  1007. atom_op_mul, ATOM_ARG_REG}, {
  1008. atom_op_mul, ATOM_ARG_PS}, {
  1009. atom_op_mul, ATOM_ARG_WS}, {
  1010. atom_op_mul, ATOM_ARG_FB}, {
  1011. atom_op_mul, ATOM_ARG_PLL}, {
  1012. atom_op_mul, ATOM_ARG_MC}, {
  1013. atom_op_div, ATOM_ARG_REG}, {
  1014. atom_op_div, ATOM_ARG_PS}, {
  1015. atom_op_div, ATOM_ARG_WS}, {
  1016. atom_op_div, ATOM_ARG_FB}, {
  1017. atom_op_div, ATOM_ARG_PLL}, {
  1018. atom_op_div, ATOM_ARG_MC}, {
  1019. atom_op_add, ATOM_ARG_REG}, {
  1020. atom_op_add, ATOM_ARG_PS}, {
  1021. atom_op_add, ATOM_ARG_WS}, {
  1022. atom_op_add, ATOM_ARG_FB}, {
  1023. atom_op_add, ATOM_ARG_PLL}, {
  1024. atom_op_add, ATOM_ARG_MC}, {
  1025. atom_op_sub, ATOM_ARG_REG}, {
  1026. atom_op_sub, ATOM_ARG_PS}, {
  1027. atom_op_sub, ATOM_ARG_WS}, {
  1028. atom_op_sub, ATOM_ARG_FB}, {
  1029. atom_op_sub, ATOM_ARG_PLL}, {
  1030. atom_op_sub, ATOM_ARG_MC}, {
  1031. atom_op_setport, ATOM_PORT_ATI}, {
  1032. atom_op_setport, ATOM_PORT_PCI}, {
  1033. atom_op_setport, ATOM_PORT_SYSIO}, {
  1034. atom_op_setregblock, 0}, {
  1035. atom_op_setfbbase, 0}, {
  1036. atom_op_compare, ATOM_ARG_REG}, {
  1037. atom_op_compare, ATOM_ARG_PS}, {
  1038. atom_op_compare, ATOM_ARG_WS}, {
  1039. atom_op_compare, ATOM_ARG_FB}, {
  1040. atom_op_compare, ATOM_ARG_PLL}, {
  1041. atom_op_compare, ATOM_ARG_MC}, {
  1042. atom_op_switch, 0}, {
  1043. atom_op_jump, ATOM_COND_ALWAYS}, {
  1044. atom_op_jump, ATOM_COND_EQUAL}, {
  1045. atom_op_jump, ATOM_COND_BELOW}, {
  1046. atom_op_jump, ATOM_COND_ABOVE}, {
  1047. atom_op_jump, ATOM_COND_BELOWOREQUAL}, {
  1048. atom_op_jump, ATOM_COND_ABOVEOREQUAL}, {
  1049. atom_op_jump, ATOM_COND_NOTEQUAL}, {
  1050. atom_op_test, ATOM_ARG_REG}, {
  1051. atom_op_test, ATOM_ARG_PS}, {
  1052. atom_op_test, ATOM_ARG_WS}, {
  1053. atom_op_test, ATOM_ARG_FB}, {
  1054. atom_op_test, ATOM_ARG_PLL}, {
  1055. atom_op_test, ATOM_ARG_MC}, {
  1056. atom_op_delay, ATOM_UNIT_MILLISEC}, {
  1057. atom_op_delay, ATOM_UNIT_MICROSEC}, {
  1058. atom_op_calltable, 0}, {
  1059. atom_op_repeat, 0}, {
  1060. atom_op_clear, ATOM_ARG_REG}, {
  1061. atom_op_clear, ATOM_ARG_PS}, {
  1062. atom_op_clear, ATOM_ARG_WS}, {
  1063. atom_op_clear, ATOM_ARG_FB}, {
  1064. atom_op_clear, ATOM_ARG_PLL}, {
  1065. atom_op_clear, ATOM_ARG_MC}, {
  1066. atom_op_nop, 0}, {
  1067. atom_op_eot, 0}, {
  1068. atom_op_mask, ATOM_ARG_REG}, {
  1069. atom_op_mask, ATOM_ARG_PS}, {
  1070. atom_op_mask, ATOM_ARG_WS}, {
  1071. atom_op_mask, ATOM_ARG_FB}, {
  1072. atom_op_mask, ATOM_ARG_PLL}, {
  1073. atom_op_mask, ATOM_ARG_MC}, {
  1074. atom_op_postcard, 0}, {
  1075. atom_op_beep, 0}, {
  1076. atom_op_savereg, 0}, {
  1077. atom_op_restorereg, 0}, {
  1078. atom_op_setdatablock, 0}, {
  1079. atom_op_xor, ATOM_ARG_REG}, {
  1080. atom_op_xor, ATOM_ARG_PS}, {
  1081. atom_op_xor, ATOM_ARG_WS}, {
  1082. atom_op_xor, ATOM_ARG_FB}, {
  1083. atom_op_xor, ATOM_ARG_PLL}, {
  1084. atom_op_xor, ATOM_ARG_MC}, {
  1085. atom_op_shl, ATOM_ARG_REG}, {
  1086. atom_op_shl, ATOM_ARG_PS}, {
  1087. atom_op_shl, ATOM_ARG_WS}, {
  1088. atom_op_shl, ATOM_ARG_FB}, {
  1089. atom_op_shl, ATOM_ARG_PLL}, {
  1090. atom_op_shl, ATOM_ARG_MC}, {
  1091. atom_op_shr, ATOM_ARG_REG}, {
  1092. atom_op_shr, ATOM_ARG_PS}, {
  1093. atom_op_shr, ATOM_ARG_WS}, {
  1094. atom_op_shr, ATOM_ARG_FB}, {
  1095. atom_op_shr, ATOM_ARG_PLL}, {
  1096. atom_op_shr, ATOM_ARG_MC}, {
  1097. atom_op_debug, 0},};
  1098. static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params)
  1099. {
  1100. int base = CU16(ctx->cmd_table + 4 + 2 * index);
  1101. int len, ws, ps, ptr;
  1102. unsigned char op;
  1103. atom_exec_context ectx;
  1104. int ret = 0;
  1105. if (!base)
  1106. return -EINVAL;
  1107. len = CU16(base + ATOM_CT_SIZE_PTR);
  1108. ws = CU8(base + ATOM_CT_WS_PTR);
  1109. ps = CU8(base + ATOM_CT_PS_PTR) & ATOM_CT_PS_MASK;
  1110. ptr = base + ATOM_CT_CODE_PTR;
  1111. SDEBUG(">> execute %04X (len %d, WS %d, PS %d)\n", base, len, ws, ps);
  1112. ectx.ctx = ctx;
  1113. ectx.ps_shift = ps / 4;
  1114. ectx.start = base;
  1115. ectx.ps = params;
  1116. ectx.abort = false;
  1117. ectx.last_jump = 0;
  1118. if (ws)
  1119. ectx.ws = kcalloc(4, ws, GFP_KERNEL);
  1120. else
  1121. ectx.ws = NULL;
  1122. debug_depth++;
  1123. while (1) {
  1124. op = CU8(ptr++);
  1125. if (op < ATOM_OP_NAMES_CNT)
  1126. SDEBUG("%s @ 0x%04X\n", atom_op_names[op], ptr - 1);
  1127. else
  1128. SDEBUG("[%d] @ 0x%04X\n", op, ptr - 1);
  1129. if (ectx.abort) {
  1130. DRM_ERROR("atombios stuck executing %04X (len %d, WS %d, PS %d) @ 0x%04X\n",
  1131. base, len, ws, ps, ptr - 1);
  1132. ret = -EINVAL;
  1133. goto free;
  1134. }
  1135. if (op < ATOM_OP_CNT && op > 0)
  1136. opcode_table[op].func(&ectx, &ptr,
  1137. opcode_table[op].arg);
  1138. else
  1139. break;
  1140. if (op == ATOM_OP_EOT)
  1141. break;
  1142. }
  1143. debug_depth--;
  1144. SDEBUG("<<\n");
  1145. free:
  1146. kfree(ectx.ws);
  1147. return ret;
  1148. }
  1149. int atom_execute_table_scratch_unlocked(struct atom_context *ctx, int index, uint32_t * params)
  1150. {
  1151. int r;
  1152. mutex_lock(&ctx->mutex);
  1153. /* reset data block */
  1154. ctx->data_block = 0;
  1155. /* reset reg block */
  1156. ctx->reg_block = 0;
  1157. /* reset fb window */
  1158. ctx->fb_base = 0;
  1159. /* reset io mode */
  1160. ctx->io_mode = ATOM_IO_MM;
  1161. /* reset divmul */
  1162. ctx->divmul[0] = 0;
  1163. ctx->divmul[1] = 0;
  1164. r = atom_execute_table_locked(ctx, index, params);
  1165. mutex_unlock(&ctx->mutex);
  1166. return r;
  1167. }
  1168. int atom_execute_table(struct atom_context *ctx, int index, uint32_t * params)
  1169. {
  1170. int r;
  1171. mutex_lock(&ctx->scratch_mutex);
  1172. r = atom_execute_table_scratch_unlocked(ctx, index, params);
  1173. mutex_unlock(&ctx->scratch_mutex);
  1174. return r;
  1175. }
  1176. static int atom_iio_len[] = { 1, 2, 3, 3, 3, 3, 4, 4, 4, 3 };
  1177. static void atom_index_iio(struct atom_context *ctx, int base)
  1178. {
  1179. ctx->iio = kzalloc(2 * 256, GFP_KERNEL);
  1180. if (!ctx->iio)
  1181. return;
  1182. while (CU8(base) == ATOM_IIO_START) {
  1183. ctx->iio[CU8(base + 1)] = base + 2;
  1184. base += 2;
  1185. while (CU8(base) != ATOM_IIO_END)
  1186. base += atom_iio_len[CU8(base)];
  1187. base += 3;
  1188. }
  1189. }
  1190. struct atom_context *atom_parse(struct card_info *card, void *bios)
  1191. {
  1192. int base;
  1193. struct atom_context *ctx =
  1194. kzalloc(sizeof(struct atom_context), GFP_KERNEL);
  1195. char *str;
  1196. char name[512];
  1197. int i;
  1198. if (!ctx)
  1199. return NULL;
  1200. ctx->card = card;
  1201. ctx->bios = bios;
  1202. if (CU16(0) != ATOM_BIOS_MAGIC) {
  1203. pr_info("Invalid BIOS magic\n");
  1204. kfree(ctx);
  1205. return NULL;
  1206. }
  1207. if (strncmp
  1208. (CSTR(ATOM_ATI_MAGIC_PTR), ATOM_ATI_MAGIC,
  1209. strlen(ATOM_ATI_MAGIC))) {
  1210. pr_info("Invalid ATI magic\n");
  1211. kfree(ctx);
  1212. return NULL;
  1213. }
  1214. base = CU16(ATOM_ROM_TABLE_PTR);
  1215. if (strncmp
  1216. (CSTR(base + ATOM_ROM_MAGIC_PTR), ATOM_ROM_MAGIC,
  1217. strlen(ATOM_ROM_MAGIC))) {
  1218. pr_info("Invalid ATOM magic\n");
  1219. kfree(ctx);
  1220. return NULL;
  1221. }
  1222. ctx->cmd_table = CU16(base + ATOM_ROM_CMD_PTR);
  1223. ctx->data_table = CU16(base + ATOM_ROM_DATA_PTR);
  1224. atom_index_iio(ctx, CU16(ctx->data_table + ATOM_DATA_IIO_PTR) + 4);
  1225. if (!ctx->iio) {
  1226. atom_destroy(ctx);
  1227. return NULL;
  1228. }
  1229. str = CSTR(CU16(base + ATOM_ROM_MSG_PTR));
  1230. while (*str && ((*str == '\n') || (*str == '\r')))
  1231. str++;
  1232. /* name string isn't always 0 terminated */
  1233. for (i = 0; i < 511; i++) {
  1234. name[i] = str[i];
  1235. if (name[i] < '.' || name[i] > 'z') {
  1236. name[i] = 0;
  1237. break;
  1238. }
  1239. }
  1240. pr_info("ATOM BIOS: %s\n", name);
  1241. return ctx;
  1242. }
  1243. int atom_asic_init(struct atom_context *ctx)
  1244. {
  1245. struct radeon_device *rdev = ctx->card->dev->dev_private;
  1246. int hwi = CU16(ctx->data_table + ATOM_DATA_FWI_PTR);
  1247. uint32_t ps[16];
  1248. int ret;
  1249. memset(ps, 0, 64);
  1250. ps[0] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFSCLK_PTR));
  1251. ps[1] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFMCLK_PTR));
  1252. if (!ps[0] || !ps[1])
  1253. return 1;
  1254. if (!CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_INIT))
  1255. return 1;
  1256. ret = atom_execute_table(ctx, ATOM_CMD_INIT, ps);
  1257. if (ret)
  1258. return ret;
  1259. memset(ps, 0, 64);
  1260. if (rdev->family < CHIP_R600) {
  1261. if (CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_SPDFANCNTL))
  1262. atom_execute_table(ctx, ATOM_CMD_SPDFANCNTL, ps);
  1263. }
  1264. return ret;
  1265. }
  1266. void atom_destroy(struct atom_context *ctx)
  1267. {
  1268. kfree(ctx->iio);
  1269. kfree(ctx);
  1270. }
  1271. bool atom_parse_data_header(struct atom_context *ctx, int index,
  1272. uint16_t * size, uint8_t * frev, uint8_t * crev,
  1273. uint16_t * data_start)
  1274. {
  1275. int offset = index * 2 + 4;
  1276. int idx = CU16(ctx->data_table + offset);
  1277. u16 *mdt = (u16 *)(ctx->bios + ctx->data_table + 4);
  1278. if (!mdt[index])
  1279. return false;
  1280. if (size)
  1281. *size = CU16(idx);
  1282. if (frev)
  1283. *frev = CU8(idx + 2);
  1284. if (crev)
  1285. *crev = CU8(idx + 3);
  1286. *data_start = idx;
  1287. return true;
  1288. }
  1289. bool atom_parse_cmd_header(struct atom_context *ctx, int index, uint8_t * frev,
  1290. uint8_t * crev)
  1291. {
  1292. int offset = index * 2 + 4;
  1293. int idx = CU16(ctx->cmd_table + offset);
  1294. u16 *mct = (u16 *)(ctx->bios + ctx->cmd_table + 4);
  1295. if (!mct[index])
  1296. return false;
  1297. if (frev)
  1298. *frev = CU8(idx + 2);
  1299. if (crev)
  1300. *crev = CU8(idx + 3);
  1301. return true;
  1302. }
  1303. int atom_allocate_fb_scratch(struct atom_context *ctx)
  1304. {
  1305. int index = GetIndexIntoMasterTable(DATA, VRAM_UsageByFirmware);
  1306. uint16_t data_offset;
  1307. int usage_bytes = 0;
  1308. struct _ATOM_VRAM_USAGE_BY_FIRMWARE *firmware_usage;
  1309. if (atom_parse_data_header(ctx, index, NULL, NULL, NULL, &data_offset)) {
  1310. firmware_usage = (struct _ATOM_VRAM_USAGE_BY_FIRMWARE *)(ctx->bios + data_offset);
  1311. DRM_DEBUG("atom firmware requested %08x %dkb\n",
  1312. le32_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].ulStartAddrUsedByFirmware),
  1313. le16_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb));
  1314. usage_bytes = le16_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb) * 1024;
  1315. }
  1316. ctx->scratch_size_bytes = 0;
  1317. if (usage_bytes == 0)
  1318. usage_bytes = 20 * 1024;
  1319. /* allocate some scratch memory */
  1320. ctx->scratch = kzalloc(usage_bytes, GFP_KERNEL);
  1321. if (!ctx->scratch)
  1322. return -ENOMEM;
  1323. ctx->scratch_size_bytes = usage_bytes;
  1324. return 0;
  1325. }