panel-samsung-s6d27a1.c 8.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Panel driver for the Samsung S6D27A1 480x800 DPI RGB panel.
  4. * Found in the Samsung Galaxy Ace 2 GT-I8160 mobile phone.
  5. */
  6. #include <drm/drm_mipi_dbi.h>
  7. #include <drm/drm_modes.h>
  8. #include <drm/drm_panel.h>
  9. #include <linux/delay.h>
  10. #include <linux/gpio/consumer.h>
  11. #include <linux/init.h>
  12. #include <linux/kernel.h>
  13. #include <linux/media-bus-format.h>
  14. #include <linux/module.h>
  15. #include <linux/of.h>
  16. #include <linux/regulator/consumer.h>
  17. #include <linux/spi/spi.h>
  18. #include <video/mipi_display.h>
  19. #define S6D27A1_PASSWD_L2 0xF0 /* Password Command for Level 2 Control */
  20. #define S6D27A1_RESCTL 0xB3 /* Resolution Select Control */
  21. #define S6D27A1_PANELCTL2 0xB4 /* ASG Signal Control */
  22. #define S6D27A1_READID1 0xDA /* Read panel ID 1 */
  23. #define S6D27A1_READID2 0xDB /* Read panel ID 2 */
  24. #define S6D27A1_READID3 0xDC /* Read panel ID 3 */
  25. #define S6D27A1_DISPCTL 0xF2 /* Display Control */
  26. #define S6D27A1_MANPWR 0xF3 /* Manual Control */
  27. #define S6D27A1_PWRCTL1 0xF4 /* Power Control */
  28. #define S6D27A1_SRCCTL 0xF6 /* Source Control */
  29. #define S6D27A1_PANELCTL 0xF7 /* Panel Control*/
  30. static const u8 s6d27a1_dbi_read_commands[] = {
  31. S6D27A1_READID1,
  32. S6D27A1_READID2,
  33. S6D27A1_READID3,
  34. 0, /* sentinel */
  35. };
  36. struct s6d27a1 {
  37. struct device *dev;
  38. struct mipi_dbi dbi;
  39. struct drm_panel panel;
  40. struct gpio_desc *reset;
  41. struct regulator_bulk_data regulators[2];
  42. };
  43. static const struct drm_display_mode s6d27a1_480_800_mode = {
  44. /*
  45. * The vendor driver states that the S6D27A1 panel
  46. * has a pixel clock frequency of 49920000 Hz / 2 = 24960000 Hz.
  47. */
  48. .clock = 24960,
  49. .hdisplay = 480,
  50. .hsync_start = 480 + 63,
  51. .hsync_end = 480 + 63 + 2,
  52. .htotal = 480 + 63 + 2 + 63,
  53. .vdisplay = 800,
  54. .vsync_start = 800 + 11,
  55. .vsync_end = 800 + 11 + 2,
  56. .vtotal = 800 + 11 + 2 + 10,
  57. .width_mm = 50,
  58. .height_mm = 84,
  59. .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
  60. };
  61. static inline struct s6d27a1 *to_s6d27a1(struct drm_panel *panel)
  62. {
  63. return container_of(panel, struct s6d27a1, panel);
  64. }
  65. static void s6d27a1_read_mtp_id(struct s6d27a1 *ctx)
  66. {
  67. struct mipi_dbi *dbi = &ctx->dbi;
  68. u8 id1, id2, id3;
  69. int ret;
  70. ret = mipi_dbi_command_read(dbi, S6D27A1_READID1, &id1);
  71. if (ret) {
  72. dev_err(ctx->dev, "unable to read MTP ID 1\n");
  73. return;
  74. }
  75. ret = mipi_dbi_command_read(dbi, S6D27A1_READID2, &id2);
  76. if (ret) {
  77. dev_err(ctx->dev, "unable to read MTP ID 2\n");
  78. return;
  79. }
  80. ret = mipi_dbi_command_read(dbi, S6D27A1_READID3, &id3);
  81. if (ret) {
  82. dev_err(ctx->dev, "unable to read MTP ID 3\n");
  83. return;
  84. }
  85. dev_info(ctx->dev, "MTP ID: %02x %02x %02x\n", id1, id2, id3);
  86. }
  87. static int s6d27a1_power_on(struct s6d27a1 *ctx)
  88. {
  89. struct mipi_dbi *dbi = &ctx->dbi;
  90. int ret;
  91. /* Power up */
  92. ret = regulator_bulk_enable(ARRAY_SIZE(ctx->regulators),
  93. ctx->regulators);
  94. if (ret) {
  95. dev_err(ctx->dev, "failed to enable regulators: %d\n", ret);
  96. return ret;
  97. }
  98. msleep(20);
  99. /* Assert reset >=1 ms */
  100. gpiod_set_value_cansleep(ctx->reset, 1);
  101. usleep_range(1000, 5000);
  102. /* De-assert reset */
  103. gpiod_set_value_cansleep(ctx->reset, 0);
  104. /* Wait >= 10 ms */
  105. msleep(20);
  106. /*
  107. * Exit sleep mode and initialize display - some hammering is
  108. * necessary.
  109. */
  110. mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE);
  111. mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE);
  112. msleep(120);
  113. /* Magic to unlock level 2 control of the display */
  114. mipi_dbi_command(dbi, S6D27A1_PASSWD_L2, 0x5A, 0x5A);
  115. /* Configure resolution to 480RGBx800 */
  116. mipi_dbi_command(dbi, S6D27A1_RESCTL, 0x22);
  117. mipi_dbi_command(dbi, S6D27A1_PANELCTL2, 0x00, 0x02, 0x03, 0x04, 0x05, 0x08, 0x00, 0x0c);
  118. mipi_dbi_command(dbi, S6D27A1_MANPWR, 0x01, 0x00, 0x00, 0x08, 0x08, 0x02, 0x00);
  119. mipi_dbi_command(dbi, S6D27A1_DISPCTL, 0x19, 0x00, 0x08, 0x0D, 0x03, 0x41, 0x3F);
  120. mipi_dbi_command(dbi, S6D27A1_PWRCTL1, 0x00, 0x00, 0x00, 0x00, 0x55,
  121. 0x44, 0x05, 0x88, 0x4B, 0x50);
  122. mipi_dbi_command(dbi, S6D27A1_SRCCTL, 0x03, 0x09, 0x8A, 0x00, 0x01, 0x16);
  123. mipi_dbi_command(dbi, S6D27A1_PANELCTL, 0x00, 0x05, 0x06, 0x07, 0x08,
  124. 0x01, 0x09, 0x0D, 0x0A, 0x0E,
  125. 0x0B, 0x0F, 0x0C, 0x10, 0x01,
  126. 0x11, 0x12, 0x13, 0x14, 0x05,
  127. 0x06, 0x07, 0x08, 0x01, 0x09,
  128. 0x0D, 0x0A, 0x0E, 0x0B, 0x0F,
  129. 0x0C, 0x10, 0x01, 0x11, 0x12,
  130. 0x13, 0x14);
  131. /* lock the level 2 control */
  132. mipi_dbi_command(dbi, S6D27A1_PASSWD_L2, 0xA5, 0xA5);
  133. s6d27a1_read_mtp_id(ctx);
  134. return 0;
  135. }
  136. static int s6d27a1_power_off(struct s6d27a1 *ctx)
  137. {
  138. /* Go into RESET and disable regulators */
  139. gpiod_set_value_cansleep(ctx->reset, 1);
  140. return regulator_bulk_disable(ARRAY_SIZE(ctx->regulators),
  141. ctx->regulators);
  142. }
  143. static int s6d27a1_unprepare(struct drm_panel *panel)
  144. {
  145. struct s6d27a1 *ctx = to_s6d27a1(panel);
  146. struct mipi_dbi *dbi = &ctx->dbi;
  147. mipi_dbi_command(dbi, MIPI_DCS_ENTER_SLEEP_MODE);
  148. msleep(120);
  149. return s6d27a1_power_off(to_s6d27a1(panel));
  150. }
  151. static int s6d27a1_disable(struct drm_panel *panel)
  152. {
  153. struct s6d27a1 *ctx = to_s6d27a1(panel);
  154. struct mipi_dbi *dbi = &ctx->dbi;
  155. mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_OFF);
  156. msleep(25);
  157. return 0;
  158. }
  159. static int s6d27a1_prepare(struct drm_panel *panel)
  160. {
  161. return s6d27a1_power_on(to_s6d27a1(panel));
  162. }
  163. static int s6d27a1_enable(struct drm_panel *panel)
  164. {
  165. struct s6d27a1 *ctx = to_s6d27a1(panel);
  166. struct mipi_dbi *dbi = &ctx->dbi;
  167. mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_ON);
  168. return 0;
  169. }
  170. static int s6d27a1_get_modes(struct drm_panel *panel,
  171. struct drm_connector *connector)
  172. {
  173. struct s6d27a1 *ctx = to_s6d27a1(panel);
  174. struct drm_display_mode *mode;
  175. static const u32 bus_format = MEDIA_BUS_FMT_RGB888_1X24;
  176. mode = drm_mode_duplicate(connector->dev, &s6d27a1_480_800_mode);
  177. if (!mode) {
  178. dev_err(ctx->dev, "failed to add mode\n");
  179. return -ENOMEM;
  180. }
  181. connector->display_info.bpc = 8;
  182. connector->display_info.width_mm = mode->width_mm;
  183. connector->display_info.height_mm = mode->height_mm;
  184. connector->display_info.bus_flags =
  185. DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE;
  186. drm_display_info_set_bus_formats(&connector->display_info,
  187. &bus_format, 1);
  188. drm_mode_set_name(mode);
  189. mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
  190. drm_mode_probed_add(connector, mode);
  191. return 1;
  192. }
  193. static const struct drm_panel_funcs s6d27a1_drm_funcs = {
  194. .disable = s6d27a1_disable,
  195. .unprepare = s6d27a1_unprepare,
  196. .prepare = s6d27a1_prepare,
  197. .enable = s6d27a1_enable,
  198. .get_modes = s6d27a1_get_modes,
  199. };
  200. static int s6d27a1_probe(struct spi_device *spi)
  201. {
  202. struct device *dev = &spi->dev;
  203. struct s6d27a1 *ctx;
  204. int ret;
  205. ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
  206. if (!ctx)
  207. return -ENOMEM;
  208. ctx->dev = dev;
  209. /*
  210. * VCI is the analog voltage supply
  211. * VCCIO is the digital I/O voltage supply
  212. */
  213. ctx->regulators[0].supply = "vci";
  214. ctx->regulators[1].supply = "vccio";
  215. ret = devm_regulator_bulk_get(dev,
  216. ARRAY_SIZE(ctx->regulators),
  217. ctx->regulators);
  218. if (ret)
  219. return dev_err_probe(dev, ret, "failed to get regulators\n");
  220. ctx->reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
  221. if (IS_ERR(ctx->reset)) {
  222. ret = PTR_ERR(ctx->reset);
  223. return dev_err_probe(dev, ret, "no RESET GPIO\n");
  224. }
  225. ret = mipi_dbi_spi_init(spi, &ctx->dbi, NULL);
  226. if (ret)
  227. return dev_err_probe(dev, ret, "MIPI DBI init failed\n");
  228. ctx->dbi.read_commands = s6d27a1_dbi_read_commands;
  229. drm_panel_init(&ctx->panel, dev, &s6d27a1_drm_funcs,
  230. DRM_MODE_CONNECTOR_DPI);
  231. ret = drm_panel_of_backlight(&ctx->panel);
  232. if (ret)
  233. return dev_err_probe(dev, ret, "failed to add backlight\n");
  234. spi_set_drvdata(spi, ctx);
  235. drm_panel_add(&ctx->panel);
  236. return 0;
  237. }
  238. static void s6d27a1_remove(struct spi_device *spi)
  239. {
  240. struct s6d27a1 *ctx = spi_get_drvdata(spi);
  241. drm_panel_remove(&ctx->panel);
  242. }
  243. static const struct of_device_id s6d27a1_match[] = {
  244. { .compatible = "samsung,s6d27a1", },
  245. { /* sentinel */ },
  246. };
  247. MODULE_DEVICE_TABLE(of, s6d27a1_match);
  248. static struct spi_driver s6d27a1_driver = {
  249. .probe = s6d27a1_probe,
  250. .remove = s6d27a1_remove,
  251. .driver = {
  252. .name = "s6d27a1-panel",
  253. .of_match_table = s6d27a1_match,
  254. },
  255. };
  256. module_spi_driver(s6d27a1_driver);
  257. MODULE_AUTHOR("Markuss Broks <[email protected]>");
  258. MODULE_DESCRIPTION("Samsung S6D27A1 panel driver");
  259. MODULE_LICENSE("GPL v2");