panel-boe-tv101wum-nl6.c 43 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2018 MediaTek Inc.
  4. * Author: Jitao Shi <[email protected]>
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/gpio/consumer.h>
  8. #include <linux/module.h>
  9. #include <linux/of.h>
  10. #include <linux/of_device.h>
  11. #include <linux/regulator/consumer.h>
  12. #include <drm/drm_connector.h>
  13. #include <drm/drm_crtc.h>
  14. #include <drm/drm_mipi_dsi.h>
  15. #include <drm/drm_panel.h>
  16. #include <video/mipi_display.h>
  17. struct panel_desc {
  18. const struct drm_display_mode *modes;
  19. unsigned int bpc;
  20. /**
  21. * @width_mm: width of the panel's active display area
  22. * @height_mm: height of the panel's active display area
  23. */
  24. struct {
  25. unsigned int width_mm;
  26. unsigned int height_mm;
  27. } size;
  28. unsigned long mode_flags;
  29. enum mipi_dsi_pixel_format format;
  30. const struct panel_init_cmd *init_cmds;
  31. unsigned int lanes;
  32. bool discharge_on_disable;
  33. bool lp11_before_reset;
  34. };
  35. struct boe_panel {
  36. struct drm_panel base;
  37. struct mipi_dsi_device *dsi;
  38. const struct panel_desc *desc;
  39. enum drm_panel_orientation orientation;
  40. struct regulator *pp3300;
  41. struct regulator *pp1800;
  42. struct regulator *avee;
  43. struct regulator *avdd;
  44. struct gpio_desc *enable_gpio;
  45. bool prepared;
  46. };
  47. enum dsi_cmd_type {
  48. INIT_DCS_CMD,
  49. DELAY_CMD,
  50. };
  51. struct panel_init_cmd {
  52. enum dsi_cmd_type type;
  53. size_t len;
  54. const char *data;
  55. };
  56. #define _INIT_DCS_CMD(...) { \
  57. .type = INIT_DCS_CMD, \
  58. .len = sizeof((char[]){__VA_ARGS__}), \
  59. .data = (char[]){__VA_ARGS__} }
  60. #define _INIT_DELAY_CMD(...) { \
  61. .type = DELAY_CMD,\
  62. .len = sizeof((char[]){__VA_ARGS__}), \
  63. .data = (char[]){__VA_ARGS__} }
  64. static const struct panel_init_cmd boe_tv110c9m_init_cmd[] = {
  65. _INIT_DCS_CMD(0xFF, 0x20),
  66. _INIT_DCS_CMD(0xFB, 0x01),
  67. _INIT_DCS_CMD(0x05, 0xD9),
  68. _INIT_DCS_CMD(0x07, 0x78),
  69. _INIT_DCS_CMD(0x08, 0x5A),
  70. _INIT_DCS_CMD(0x0D, 0x63),
  71. _INIT_DCS_CMD(0x0E, 0x91),
  72. _INIT_DCS_CMD(0x0F, 0x73),
  73. _INIT_DCS_CMD(0x95, 0xE6),
  74. _INIT_DCS_CMD(0x96, 0xF0),
  75. _INIT_DCS_CMD(0x30, 0x00),
  76. _INIT_DCS_CMD(0x6D, 0x66),
  77. _INIT_DCS_CMD(0x75, 0xA2),
  78. _INIT_DCS_CMD(0x77, 0x3B),
  79. _INIT_DCS_CMD(0xB0, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4D, 0x00, 0x6D, 0x00, 0x89, 0x00, 0xA1, 0x00, 0xB6, 0x00, 0xC9),
  80. _INIT_DCS_CMD(0xB1, 0x00, 0xDA, 0x01, 0x13, 0x01, 0x3C, 0x01, 0x7E, 0x01, 0xAB, 0x01, 0xF7, 0x02, 0x2F, 0x02, 0x31),
  81. _INIT_DCS_CMD(0xB2, 0x02, 0x67, 0x02, 0xA6, 0x02, 0xD1, 0x03, 0x08, 0x03, 0x2E, 0x03, 0x5B, 0x03, 0x6B, 0x03, 0x7B),
  82. _INIT_DCS_CMD(0xB3, 0x03, 0x8E, 0x03, 0xA2, 0x03, 0xB7, 0x03, 0xE7, 0x03, 0xFD, 0x03, 0xFF),
  83. _INIT_DCS_CMD(0xB4, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4D, 0x00, 0x6D, 0x00, 0x89, 0x00, 0xA1, 0x00, 0xB6, 0x00, 0xC9),
  84. _INIT_DCS_CMD(0xB5, 0x00, 0xDA, 0x01, 0x13, 0x01, 0x3C, 0x01, 0x7E, 0x01, 0xAB, 0x01, 0xF7, 0x02, 0x2F, 0x02, 0x31),
  85. _INIT_DCS_CMD(0xB6, 0x02, 0x67, 0x02, 0xA6, 0x02, 0xD1, 0x03, 0x08, 0x03, 0x2E, 0x03, 0x5B, 0x03, 0x6B, 0x03, 0x7B),
  86. _INIT_DCS_CMD(0xB7, 0x03, 0x8E, 0x03, 0xA2, 0x03, 0xB7, 0x03, 0xE7, 0x03, 0xFD, 0x03, 0xFF),
  87. _INIT_DCS_CMD(0xB8, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4D, 0x00, 0x6D, 0x00, 0x89, 0x00, 0xA1, 0x00, 0xB6, 0x00, 0xC9),
  88. _INIT_DCS_CMD(0xB9, 0x00, 0xDA, 0x01, 0x13, 0x01, 0x3C, 0x01, 0x7E, 0x01, 0xAB, 0x01, 0xF7, 0x02, 0x2F, 0x02, 0x31),
  89. _INIT_DCS_CMD(0xBA, 0x02, 0x67, 0x02, 0xA6, 0x02, 0xD1, 0x03, 0x08, 0x03, 0x2E, 0x03, 0x5B, 0x03, 0x6B, 0x03, 0x7B),
  90. _INIT_DCS_CMD(0xBB, 0x03, 0x8E, 0x03, 0xA2, 0x03, 0xB7, 0x03, 0xE7, 0x03, 0xFD, 0x03, 0xFF),
  91. _INIT_DCS_CMD(0xFF, 0x21),
  92. _INIT_DCS_CMD(0xFB, 0x01),
  93. _INIT_DCS_CMD(0xB0, 0x00, 0x00, 0x00, 0x1B, 0x00, 0x45, 0x00, 0x65, 0x00, 0x81, 0x00, 0x99, 0x00, 0xAE, 0x00, 0xC1),
  94. _INIT_DCS_CMD(0xB1, 0x00, 0xD2, 0x01, 0x0B, 0x01, 0x34, 0x01, 0x76, 0x01, 0xA3, 0x01, 0xEF, 0x02, 0x27, 0x02, 0x29),
  95. _INIT_DCS_CMD(0xB2, 0x02, 0x5F, 0x02, 0x9E, 0x02, 0xC9, 0x03, 0x00, 0x03, 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73),
  96. _INIT_DCS_CMD(0xB3, 0x03, 0x86, 0x03, 0x9A, 0x03, 0xAF, 0x03, 0xDF, 0x03, 0xF5, 0x03, 0xE0),
  97. _INIT_DCS_CMD(0xB4, 0x00, 0x00, 0x00, 0x1B, 0x00, 0x45, 0x00, 0x65, 0x00, 0x81, 0x00, 0x99, 0x00, 0xAE, 0x00, 0xC1),
  98. _INIT_DCS_CMD(0xB5, 0x00, 0xD2, 0x01, 0x0B, 0x01, 0x34, 0x01, 0x76, 0x01, 0xA3, 0x01, 0xEF, 0x02, 0x27, 0x02, 0x29),
  99. _INIT_DCS_CMD(0xB6, 0x02, 0x5F, 0x02, 0x9E, 0x02, 0xC9, 0x03, 0x00, 0x03, 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73),
  100. _INIT_DCS_CMD(0xB7, 0x03, 0x86, 0x03, 0x9A, 0x03, 0xAF, 0x03, 0xDF, 0x03, 0xF5, 0x03, 0xE0),
  101. _INIT_DCS_CMD(0xB8, 0x00, 0x00, 0x00, 0x1B, 0x00, 0x45, 0x00, 0x65, 0x00, 0x81, 0x00, 0x99, 0x00, 0xAE, 0x00, 0xC1),
  102. _INIT_DCS_CMD(0xB9, 0x00, 0xD2, 0x01, 0x0B, 0x01, 0x34, 0x01, 0x76, 0x01, 0xA3, 0x01, 0xEF, 0x02, 0x27, 0x02, 0x29),
  103. _INIT_DCS_CMD(0xBA, 0x02, 0x5F, 0x02, 0x9E, 0x02, 0xC9, 0x03, 0x00, 0x03, 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73),
  104. _INIT_DCS_CMD(0xBB, 0x03, 0x86, 0x03, 0x9A, 0x03, 0xAF, 0x03, 0xDF, 0x03, 0xF5, 0x03, 0xE0),
  105. _INIT_DCS_CMD(0xFF, 0x24),
  106. _INIT_DCS_CMD(0xFB, 0x01),
  107. _INIT_DCS_CMD(0x00, 0x00),
  108. _INIT_DCS_CMD(0x01, 0x00),
  109. _INIT_DCS_CMD(0x02, 0x1C),
  110. _INIT_DCS_CMD(0x03, 0x1C),
  111. _INIT_DCS_CMD(0x04, 0x1D),
  112. _INIT_DCS_CMD(0x05, 0x1D),
  113. _INIT_DCS_CMD(0x06, 0x04),
  114. _INIT_DCS_CMD(0x07, 0x04),
  115. _INIT_DCS_CMD(0x08, 0x0F),
  116. _INIT_DCS_CMD(0x09, 0x0F),
  117. _INIT_DCS_CMD(0x0A, 0x0E),
  118. _INIT_DCS_CMD(0x0B, 0x0E),
  119. _INIT_DCS_CMD(0x0C, 0x0D),
  120. _INIT_DCS_CMD(0x0D, 0x0D),
  121. _INIT_DCS_CMD(0x0E, 0x0C),
  122. _INIT_DCS_CMD(0x0F, 0x0C),
  123. _INIT_DCS_CMD(0x10, 0x08),
  124. _INIT_DCS_CMD(0x11, 0x08),
  125. _INIT_DCS_CMD(0x12, 0x00),
  126. _INIT_DCS_CMD(0x13, 0x00),
  127. _INIT_DCS_CMD(0x14, 0x00),
  128. _INIT_DCS_CMD(0x15, 0x00),
  129. _INIT_DCS_CMD(0x16, 0x00),
  130. _INIT_DCS_CMD(0x17, 0x00),
  131. _INIT_DCS_CMD(0x18, 0x1C),
  132. _INIT_DCS_CMD(0x19, 0x1C),
  133. _INIT_DCS_CMD(0x1A, 0x1D),
  134. _INIT_DCS_CMD(0x1B, 0x1D),
  135. _INIT_DCS_CMD(0x1C, 0x04),
  136. _INIT_DCS_CMD(0x1D, 0x04),
  137. _INIT_DCS_CMD(0x1E, 0x0F),
  138. _INIT_DCS_CMD(0x1F, 0x0F),
  139. _INIT_DCS_CMD(0x20, 0x0E),
  140. _INIT_DCS_CMD(0x21, 0x0E),
  141. _INIT_DCS_CMD(0x22, 0x0D),
  142. _INIT_DCS_CMD(0x23, 0x0D),
  143. _INIT_DCS_CMD(0x24, 0x0C),
  144. _INIT_DCS_CMD(0x25, 0x0C),
  145. _INIT_DCS_CMD(0x26, 0x08),
  146. _INIT_DCS_CMD(0x27, 0x08),
  147. _INIT_DCS_CMD(0x28, 0x00),
  148. _INIT_DCS_CMD(0x29, 0x00),
  149. _INIT_DCS_CMD(0x2A, 0x00),
  150. _INIT_DCS_CMD(0x2B, 0x00),
  151. _INIT_DCS_CMD(0x2D, 0x20),
  152. _INIT_DCS_CMD(0x2F, 0x0A),
  153. _INIT_DCS_CMD(0x30, 0x44),
  154. _INIT_DCS_CMD(0x33, 0x0C),
  155. _INIT_DCS_CMD(0x34, 0x32),
  156. _INIT_DCS_CMD(0x37, 0x44),
  157. _INIT_DCS_CMD(0x38, 0x40),
  158. _INIT_DCS_CMD(0x39, 0x00),
  159. _INIT_DCS_CMD(0x3A, 0x5D),
  160. _INIT_DCS_CMD(0x3B, 0x60),
  161. _INIT_DCS_CMD(0x3D, 0x42),
  162. _INIT_DCS_CMD(0x3F, 0x06),
  163. _INIT_DCS_CMD(0x43, 0x06),
  164. _INIT_DCS_CMD(0x47, 0x66),
  165. _INIT_DCS_CMD(0x4A, 0x5D),
  166. _INIT_DCS_CMD(0x4B, 0x60),
  167. _INIT_DCS_CMD(0x4C, 0x91),
  168. _INIT_DCS_CMD(0x4D, 0x21),
  169. _INIT_DCS_CMD(0x4E, 0x43),
  170. _INIT_DCS_CMD(0x51, 0x12),
  171. _INIT_DCS_CMD(0x52, 0x34),
  172. _INIT_DCS_CMD(0x55, 0x82, 0x02),
  173. _INIT_DCS_CMD(0x56, 0x04),
  174. _INIT_DCS_CMD(0x58, 0x21),
  175. _INIT_DCS_CMD(0x59, 0x30),
  176. _INIT_DCS_CMD(0x5A, 0x60),
  177. _INIT_DCS_CMD(0x5B, 0x50),
  178. _INIT_DCS_CMD(0x5E, 0x00, 0x06),
  179. _INIT_DCS_CMD(0x5F, 0x00),
  180. _INIT_DCS_CMD(0x65, 0x82),
  181. _INIT_DCS_CMD(0x7E, 0x20),
  182. _INIT_DCS_CMD(0x7F, 0x3C),
  183. _INIT_DCS_CMD(0x82, 0x04),
  184. _INIT_DCS_CMD(0x97, 0xC0),
  185. _INIT_DCS_CMD(0xB6, 0x05, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x05, 0x00, 0x00),
  186. _INIT_DCS_CMD(0x91, 0x44),
  187. _INIT_DCS_CMD(0x92, 0xA9),
  188. _INIT_DCS_CMD(0x93, 0x1A),
  189. _INIT_DCS_CMD(0x94, 0x96),
  190. _INIT_DCS_CMD(0xD7, 0x55),
  191. _INIT_DCS_CMD(0xDA, 0x0A),
  192. _INIT_DCS_CMD(0xDE, 0x08),
  193. _INIT_DCS_CMD(0xDB, 0x05),
  194. _INIT_DCS_CMD(0xDC, 0xA9),
  195. _INIT_DCS_CMD(0xDD, 0x22),
  196. _INIT_DCS_CMD(0xDF, 0x05),
  197. _INIT_DCS_CMD(0xE0, 0xA9),
  198. _INIT_DCS_CMD(0xE1, 0x05),
  199. _INIT_DCS_CMD(0xE2, 0xA9),
  200. _INIT_DCS_CMD(0xE3, 0x05),
  201. _INIT_DCS_CMD(0xE4, 0xA9),
  202. _INIT_DCS_CMD(0xE5, 0x05),
  203. _INIT_DCS_CMD(0xE6, 0xA9),
  204. _INIT_DCS_CMD(0x5C, 0x00),
  205. _INIT_DCS_CMD(0x5D, 0x00),
  206. _INIT_DCS_CMD(0x8D, 0x00),
  207. _INIT_DCS_CMD(0x8E, 0x00),
  208. _INIT_DCS_CMD(0xB5, 0x90),
  209. _INIT_DCS_CMD(0xFF, 0x25),
  210. _INIT_DCS_CMD(0xFB, 0x01),
  211. _INIT_DCS_CMD(0x05, 0x00),
  212. _INIT_DCS_CMD(0x19, 0x07),
  213. _INIT_DCS_CMD(0x1F, 0x60),
  214. _INIT_DCS_CMD(0x20, 0x50),
  215. _INIT_DCS_CMD(0x26, 0x60),
  216. _INIT_DCS_CMD(0x27, 0x50),
  217. _INIT_DCS_CMD(0x33, 0x60),
  218. _INIT_DCS_CMD(0x34, 0x50),
  219. _INIT_DCS_CMD(0x3F, 0xE0),
  220. _INIT_DCS_CMD(0x40, 0x00),
  221. _INIT_DCS_CMD(0x44, 0x00),
  222. _INIT_DCS_CMD(0x45, 0x40),
  223. _INIT_DCS_CMD(0x48, 0x60),
  224. _INIT_DCS_CMD(0x49, 0x50),
  225. _INIT_DCS_CMD(0x5B, 0x00),
  226. _INIT_DCS_CMD(0x5C, 0x00),
  227. _INIT_DCS_CMD(0x5D, 0x00),
  228. _INIT_DCS_CMD(0x5E, 0xD0),
  229. _INIT_DCS_CMD(0x61, 0x60),
  230. _INIT_DCS_CMD(0x62, 0x50),
  231. _INIT_DCS_CMD(0xF1, 0x10),
  232. _INIT_DCS_CMD(0xFF, 0x2A),
  233. _INIT_DCS_CMD(0xFB, 0x01),
  234. _INIT_DCS_CMD(0x64, 0x16),
  235. _INIT_DCS_CMD(0x67, 0x16),
  236. _INIT_DCS_CMD(0x6A, 0x16),
  237. _INIT_DCS_CMD(0x70, 0x30),
  238. _INIT_DCS_CMD(0xA2, 0xF3),
  239. _INIT_DCS_CMD(0xA3, 0xFF),
  240. _INIT_DCS_CMD(0xA4, 0xFF),
  241. _INIT_DCS_CMD(0xA5, 0xFF),
  242. _INIT_DCS_CMD(0xD6, 0x08),
  243. _INIT_DCS_CMD(0xFF, 0x26),
  244. _INIT_DCS_CMD(0xFB, 0x01),
  245. _INIT_DCS_CMD(0x00, 0xA1),
  246. _INIT_DCS_CMD(0x02, 0x31),
  247. _INIT_DCS_CMD(0x04, 0x28),
  248. _INIT_DCS_CMD(0x06, 0x30),
  249. _INIT_DCS_CMD(0x0C, 0x16),
  250. _INIT_DCS_CMD(0x0D, 0x0D),
  251. _INIT_DCS_CMD(0x0F, 0x00),
  252. _INIT_DCS_CMD(0x11, 0x00),
  253. _INIT_DCS_CMD(0x12, 0x50),
  254. _INIT_DCS_CMD(0x13, 0x56),
  255. _INIT_DCS_CMD(0x14, 0x57),
  256. _INIT_DCS_CMD(0x15, 0x00),
  257. _INIT_DCS_CMD(0x16, 0x10),
  258. _INIT_DCS_CMD(0x17, 0xA0),
  259. _INIT_DCS_CMD(0x18, 0x86),
  260. _INIT_DCS_CMD(0x19, 0x0D),
  261. _INIT_DCS_CMD(0x1A, 0x7F),
  262. _INIT_DCS_CMD(0x1B, 0x0C),
  263. _INIT_DCS_CMD(0x1C, 0xBF),
  264. _INIT_DCS_CMD(0x22, 0x00),
  265. _INIT_DCS_CMD(0x23, 0x00),
  266. _INIT_DCS_CMD(0x2A, 0x0D),
  267. _INIT_DCS_CMD(0x2B, 0x7F),
  268. _INIT_DCS_CMD(0x1D, 0x00),
  269. _INIT_DCS_CMD(0x1E, 0x65),
  270. _INIT_DCS_CMD(0x1F, 0x65),
  271. _INIT_DCS_CMD(0x24, 0x00),
  272. _INIT_DCS_CMD(0x25, 0x65),
  273. _INIT_DCS_CMD(0x2F, 0x05),
  274. _INIT_DCS_CMD(0x30, 0x65),
  275. _INIT_DCS_CMD(0x31, 0x05),
  276. _INIT_DCS_CMD(0x32, 0x7D),
  277. _INIT_DCS_CMD(0x39, 0x00),
  278. _INIT_DCS_CMD(0x3A, 0x65),
  279. _INIT_DCS_CMD(0x20, 0x01),
  280. _INIT_DCS_CMD(0x33, 0x11),
  281. _INIT_DCS_CMD(0x34, 0x78),
  282. _INIT_DCS_CMD(0x35, 0x16),
  283. _INIT_DCS_CMD(0xC8, 0x04),
  284. _INIT_DCS_CMD(0xC9, 0x9E),
  285. _INIT_DCS_CMD(0xCA, 0x4E),
  286. _INIT_DCS_CMD(0xCB, 0x00),
  287. _INIT_DCS_CMD(0xA9, 0x49),
  288. _INIT_DCS_CMD(0xAA, 0x4B),
  289. _INIT_DCS_CMD(0xAB, 0x48),
  290. _INIT_DCS_CMD(0xAC, 0x43),
  291. _INIT_DCS_CMD(0xAD, 0x40),
  292. _INIT_DCS_CMD(0xAE, 0x50),
  293. _INIT_DCS_CMD(0xAF, 0x44),
  294. _INIT_DCS_CMD(0xB0, 0x54),
  295. _INIT_DCS_CMD(0xB1, 0x4E),
  296. _INIT_DCS_CMD(0xB2, 0x4D),
  297. _INIT_DCS_CMD(0xB3, 0x4C),
  298. _INIT_DCS_CMD(0xB4, 0x41),
  299. _INIT_DCS_CMD(0xB5, 0x47),
  300. _INIT_DCS_CMD(0xB6, 0x53),
  301. _INIT_DCS_CMD(0xB7, 0x3E),
  302. _INIT_DCS_CMD(0xB8, 0x51),
  303. _INIT_DCS_CMD(0xB9, 0x3C),
  304. _INIT_DCS_CMD(0xBA, 0x3B),
  305. _INIT_DCS_CMD(0xBB, 0x46),
  306. _INIT_DCS_CMD(0xBC, 0x45),
  307. _INIT_DCS_CMD(0xBD, 0x55),
  308. _INIT_DCS_CMD(0xBE, 0x3D),
  309. _INIT_DCS_CMD(0xBF, 0x3F),
  310. _INIT_DCS_CMD(0xC0, 0x52),
  311. _INIT_DCS_CMD(0xC1, 0x4A),
  312. _INIT_DCS_CMD(0xC2, 0x39),
  313. _INIT_DCS_CMD(0xC3, 0x4F),
  314. _INIT_DCS_CMD(0xC4, 0x3A),
  315. _INIT_DCS_CMD(0xC5, 0x42),
  316. _INIT_DCS_CMD(0xFF, 0x27),
  317. _INIT_DCS_CMD(0xFB, 0x01),
  318. _INIT_DCS_CMD(0x56, 0x06),
  319. _INIT_DCS_CMD(0x58, 0x80),
  320. _INIT_DCS_CMD(0x59, 0x75),
  321. _INIT_DCS_CMD(0x5A, 0x00),
  322. _INIT_DCS_CMD(0x5B, 0x02),
  323. _INIT_DCS_CMD(0x5C, 0x00),
  324. _INIT_DCS_CMD(0x5D, 0x00),
  325. _INIT_DCS_CMD(0x5E, 0x20),
  326. _INIT_DCS_CMD(0x5F, 0x10),
  327. _INIT_DCS_CMD(0x60, 0x00),
  328. _INIT_DCS_CMD(0x61, 0x2E),
  329. _INIT_DCS_CMD(0x62, 0x00),
  330. _INIT_DCS_CMD(0x63, 0x01),
  331. _INIT_DCS_CMD(0x64, 0x43),
  332. _INIT_DCS_CMD(0x65, 0x2D),
  333. _INIT_DCS_CMD(0x66, 0x00),
  334. _INIT_DCS_CMD(0x67, 0x01),
  335. _INIT_DCS_CMD(0x68, 0x44),
  336. _INIT_DCS_CMD(0x00, 0x00),
  337. _INIT_DCS_CMD(0x78, 0x00),
  338. _INIT_DCS_CMD(0xC3, 0x00),
  339. _INIT_DCS_CMD(0xFF, 0x2A),
  340. _INIT_DCS_CMD(0xFB, 0x01),
  341. _INIT_DCS_CMD(0x22, 0x2F),
  342. _INIT_DCS_CMD(0x23, 0x08),
  343. _INIT_DCS_CMD(0x24, 0x00),
  344. _INIT_DCS_CMD(0x25, 0x65),
  345. _INIT_DCS_CMD(0x26, 0xF8),
  346. _INIT_DCS_CMD(0x27, 0x00),
  347. _INIT_DCS_CMD(0x28, 0x1A),
  348. _INIT_DCS_CMD(0x29, 0x00),
  349. _INIT_DCS_CMD(0x2A, 0x1A),
  350. _INIT_DCS_CMD(0x2B, 0x00),
  351. _INIT_DCS_CMD(0x2D, 0x1A),
  352. _INIT_DCS_CMD(0xFF, 0x23),
  353. _INIT_DCS_CMD(0xFB, 0x01),
  354. _INIT_DCS_CMD(0x00, 0x80),
  355. _INIT_DCS_CMD(0x07, 0x00),
  356. _INIT_DCS_CMD(0xFF, 0xE0),
  357. _INIT_DCS_CMD(0xFB, 0x01),
  358. _INIT_DCS_CMD(0x14, 0x60),
  359. _INIT_DCS_CMD(0x16, 0xC0),
  360. _INIT_DCS_CMD(0xFF, 0xF0),
  361. _INIT_DCS_CMD(0xFB, 0x01),
  362. _INIT_DCS_CMD(0x3A, 0x08),
  363. _INIT_DCS_CMD(0xFF, 0x10),
  364. _INIT_DCS_CMD(0xFB, 0x01),
  365. _INIT_DCS_CMD(0xB9, 0x01),
  366. _INIT_DCS_CMD(0xFF, 0x20),
  367. _INIT_DCS_CMD(0xFB, 0x01),
  368. _INIT_DCS_CMD(0x18, 0x40),
  369. _INIT_DCS_CMD(0xFF, 0x10),
  370. _INIT_DCS_CMD(0xFB, 0x01),
  371. _INIT_DCS_CMD(0xB9, 0x02),
  372. _INIT_DCS_CMD(0x35, 0x00),
  373. _INIT_DCS_CMD(0x51, 0x00, 0xFF),
  374. _INIT_DCS_CMD(0x53, 0x24),
  375. _INIT_DCS_CMD(0x55, 0x00),
  376. _INIT_DCS_CMD(0xBB, 0x13),
  377. _INIT_DCS_CMD(0x3B, 0x03, 0x96, 0x1A, 0x04, 0x04),
  378. _INIT_DELAY_CMD(100),
  379. _INIT_DCS_CMD(0x11),
  380. _INIT_DELAY_CMD(200),
  381. _INIT_DCS_CMD(0x29),
  382. _INIT_DELAY_CMD(100),
  383. {},
  384. };
  385. static const struct panel_init_cmd inx_hj110iz_init_cmd[] = {
  386. _INIT_DCS_CMD(0xFF, 0x20),
  387. _INIT_DCS_CMD(0xFB, 0x01),
  388. _INIT_DCS_CMD(0x05, 0xD1),
  389. _INIT_DCS_CMD(0x0D, 0x63),
  390. _INIT_DCS_CMD(0x07, 0x8C),
  391. _INIT_DCS_CMD(0x08, 0x4B),
  392. _INIT_DCS_CMD(0x0E, 0x91),
  393. _INIT_DCS_CMD(0x0F, 0x69),
  394. _INIT_DCS_CMD(0x95, 0xF5),
  395. _INIT_DCS_CMD(0x96, 0xF5),
  396. _INIT_DCS_CMD(0x9D, 0x00),
  397. _INIT_DCS_CMD(0x9E, 0x00),
  398. _INIT_DCS_CMD(0x69, 0x98),
  399. _INIT_DCS_CMD(0x75, 0xA2),
  400. _INIT_DCS_CMD(0x77, 0xB3),
  401. _INIT_DCS_CMD(0xFF, 0x24),
  402. _INIT_DCS_CMD(0xFB, 0x01),
  403. _INIT_DCS_CMD(0x91, 0x44),
  404. _INIT_DCS_CMD(0x92, 0x7A),
  405. _INIT_DCS_CMD(0x93, 0x1A),
  406. _INIT_DCS_CMD(0x94, 0x40),
  407. _INIT_DCS_CMD(0x9A, 0x08),
  408. _INIT_DCS_CMD(0x60, 0x96),
  409. _INIT_DCS_CMD(0x61, 0xD0),
  410. _INIT_DCS_CMD(0x63, 0x70),
  411. _INIT_DCS_CMD(0xC2, 0xCF),
  412. _INIT_DCS_CMD(0x9B, 0x0F),
  413. _INIT_DCS_CMD(0x9A, 0x08),
  414. _INIT_DCS_CMD(0x00, 0x03),
  415. _INIT_DCS_CMD(0x01, 0x03),
  416. _INIT_DCS_CMD(0x02, 0x03),
  417. _INIT_DCS_CMD(0x03, 0x03),
  418. _INIT_DCS_CMD(0x04, 0x03),
  419. _INIT_DCS_CMD(0x05, 0x03),
  420. _INIT_DCS_CMD(0x06, 0x22),
  421. _INIT_DCS_CMD(0x07, 0x06),
  422. _INIT_DCS_CMD(0x08, 0x00),
  423. _INIT_DCS_CMD(0x09, 0x1D),
  424. _INIT_DCS_CMD(0x0A, 0x1C),
  425. _INIT_DCS_CMD(0x0B, 0x13),
  426. _INIT_DCS_CMD(0x0C, 0x12),
  427. _INIT_DCS_CMD(0x0D, 0x11),
  428. _INIT_DCS_CMD(0x0E, 0x10),
  429. _INIT_DCS_CMD(0x0F, 0x0F),
  430. _INIT_DCS_CMD(0x10, 0x0E),
  431. _INIT_DCS_CMD(0x11, 0x0D),
  432. _INIT_DCS_CMD(0x12, 0x0C),
  433. _INIT_DCS_CMD(0x13, 0x04),
  434. _INIT_DCS_CMD(0x14, 0x03),
  435. _INIT_DCS_CMD(0x15, 0x03),
  436. _INIT_DCS_CMD(0x16, 0x03),
  437. _INIT_DCS_CMD(0x17, 0x03),
  438. _INIT_DCS_CMD(0x18, 0x03),
  439. _INIT_DCS_CMD(0x19, 0x03),
  440. _INIT_DCS_CMD(0x1A, 0x03),
  441. _INIT_DCS_CMD(0x1B, 0x03),
  442. _INIT_DCS_CMD(0x1C, 0x22),
  443. _INIT_DCS_CMD(0x1D, 0x06),
  444. _INIT_DCS_CMD(0x1E, 0x00),
  445. _INIT_DCS_CMD(0x1F, 0x1D),
  446. _INIT_DCS_CMD(0x20, 0x1C),
  447. _INIT_DCS_CMD(0x21, 0x13),
  448. _INIT_DCS_CMD(0x22, 0x12),
  449. _INIT_DCS_CMD(0x23, 0x11),
  450. _INIT_DCS_CMD(0x24, 0x10),
  451. _INIT_DCS_CMD(0x25, 0x0F),
  452. _INIT_DCS_CMD(0x26, 0x0E),
  453. _INIT_DCS_CMD(0x27, 0x0D),
  454. _INIT_DCS_CMD(0x28, 0x0C),
  455. _INIT_DCS_CMD(0x29, 0x04),
  456. _INIT_DCS_CMD(0x2A, 0x03),
  457. _INIT_DCS_CMD(0x2B, 0x03),
  458. _INIT_DCS_CMD(0x2F, 0x05),
  459. _INIT_DCS_CMD(0x30, 0x32),
  460. _INIT_DCS_CMD(0x31, 0x43),
  461. _INIT_DCS_CMD(0x33, 0x05),
  462. _INIT_DCS_CMD(0x34, 0x32),
  463. _INIT_DCS_CMD(0x35, 0x43),
  464. _INIT_DCS_CMD(0x37, 0x44),
  465. _INIT_DCS_CMD(0x38, 0x40),
  466. _INIT_DCS_CMD(0x39, 0x00),
  467. _INIT_DCS_CMD(0x3A, 0x18),
  468. _INIT_DCS_CMD(0x3B, 0x00),
  469. _INIT_DCS_CMD(0x3D, 0x93),
  470. _INIT_DCS_CMD(0xAB, 0x44),
  471. _INIT_DCS_CMD(0xAC, 0x40),
  472. _INIT_DCS_CMD(0x4D, 0x21),
  473. _INIT_DCS_CMD(0x4E, 0x43),
  474. _INIT_DCS_CMD(0x4F, 0x65),
  475. _INIT_DCS_CMD(0x50, 0x87),
  476. _INIT_DCS_CMD(0x51, 0x78),
  477. _INIT_DCS_CMD(0x52, 0x56),
  478. _INIT_DCS_CMD(0x53, 0x34),
  479. _INIT_DCS_CMD(0x54, 0x21),
  480. _INIT_DCS_CMD(0x55, 0x83),
  481. _INIT_DCS_CMD(0x56, 0x08),
  482. _INIT_DCS_CMD(0x58, 0x21),
  483. _INIT_DCS_CMD(0x59, 0x40),
  484. _INIT_DCS_CMD(0x5A, 0x00),
  485. _INIT_DCS_CMD(0x5B, 0x2C),
  486. _INIT_DCS_CMD(0x5E, 0x00, 0x10),
  487. _INIT_DCS_CMD(0x5F, 0x00),
  488. _INIT_DCS_CMD(0x7A, 0x00),
  489. _INIT_DCS_CMD(0x7B, 0x00),
  490. _INIT_DCS_CMD(0x7C, 0x00),
  491. _INIT_DCS_CMD(0x7D, 0x00),
  492. _INIT_DCS_CMD(0x7E, 0x20),
  493. _INIT_DCS_CMD(0x7F, 0x3C),
  494. _INIT_DCS_CMD(0x80, 0x00),
  495. _INIT_DCS_CMD(0x81, 0x00),
  496. _INIT_DCS_CMD(0x82, 0x08),
  497. _INIT_DCS_CMD(0x97, 0x02),
  498. _INIT_DCS_CMD(0xC5, 0x10),
  499. _INIT_DCS_CMD(0xDA, 0x05),
  500. _INIT_DCS_CMD(0xDB, 0x01),
  501. _INIT_DCS_CMD(0xDC, 0x7A),
  502. _INIT_DCS_CMD(0xDD, 0x55),
  503. _INIT_DCS_CMD(0xDE, 0x27),
  504. _INIT_DCS_CMD(0xDF, 0x01),
  505. _INIT_DCS_CMD(0xE0, 0x7A),
  506. _INIT_DCS_CMD(0xE1, 0x01),
  507. _INIT_DCS_CMD(0xE2, 0x7A),
  508. _INIT_DCS_CMD(0xE3, 0x01),
  509. _INIT_DCS_CMD(0xE4, 0x7A),
  510. _INIT_DCS_CMD(0xE5, 0x01),
  511. _INIT_DCS_CMD(0xE6, 0x7A),
  512. _INIT_DCS_CMD(0xE7, 0x00),
  513. _INIT_DCS_CMD(0xE8, 0x00),
  514. _INIT_DCS_CMD(0xE9, 0x01),
  515. _INIT_DCS_CMD(0xEA, 0x7A),
  516. _INIT_DCS_CMD(0xEB, 0x01),
  517. _INIT_DCS_CMD(0xEE, 0x7A),
  518. _INIT_DCS_CMD(0xEF, 0x01),
  519. _INIT_DCS_CMD(0xF0, 0x7A),
  520. _INIT_DCS_CMD(0xB6, 0x05, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x05, 0x00, 0x00),
  521. _INIT_DCS_CMD(0xFF, 0x25),
  522. _INIT_DCS_CMD(0xFB, 0x01),
  523. _INIT_DCS_CMD(0x05, 0x00),
  524. _INIT_DCS_CMD(0x13, 0x02),
  525. _INIT_DCS_CMD(0x14, 0xDF),
  526. _INIT_DCS_CMD(0xF1, 0x10),
  527. _INIT_DCS_CMD(0x1E, 0x00),
  528. _INIT_DCS_CMD(0x1F, 0x00),
  529. _INIT_DCS_CMD(0x20, 0x2C),
  530. _INIT_DCS_CMD(0x25, 0x00),
  531. _INIT_DCS_CMD(0x26, 0x00),
  532. _INIT_DCS_CMD(0x27, 0x2C),
  533. _INIT_DCS_CMD(0x3F, 0x80),
  534. _INIT_DCS_CMD(0x40, 0x00),
  535. _INIT_DCS_CMD(0x43, 0x00),
  536. _INIT_DCS_CMD(0x44, 0x18),
  537. _INIT_DCS_CMD(0x45, 0x00),
  538. _INIT_DCS_CMD(0x48, 0x00),
  539. _INIT_DCS_CMD(0x49, 0x2C),
  540. _INIT_DCS_CMD(0x5B, 0x80),
  541. _INIT_DCS_CMD(0x5C, 0x00),
  542. _INIT_DCS_CMD(0x5D, 0x00),
  543. _INIT_DCS_CMD(0x5E, 0x00),
  544. _INIT_DCS_CMD(0x61, 0x00),
  545. _INIT_DCS_CMD(0x62, 0x2C),
  546. _INIT_DCS_CMD(0x68, 0x10),
  547. _INIT_DCS_CMD(0xFF, 0x26),
  548. _INIT_DCS_CMD(0xFB, 0x01),
  549. _INIT_DCS_CMD(0x00, 0xA1),
  550. _INIT_DCS_CMD(0x02, 0x31),
  551. _INIT_DCS_CMD(0x0A, 0xF2),
  552. _INIT_DCS_CMD(0x04, 0x28),
  553. _INIT_DCS_CMD(0x06, 0x30),
  554. _INIT_DCS_CMD(0x0C, 0x16),
  555. _INIT_DCS_CMD(0x0D, 0x0D),
  556. _INIT_DCS_CMD(0x0F, 0x00),
  557. _INIT_DCS_CMD(0x11, 0x00),
  558. _INIT_DCS_CMD(0x12, 0x50),
  559. _INIT_DCS_CMD(0x13, 0x56),
  560. _INIT_DCS_CMD(0x14, 0x57),
  561. _INIT_DCS_CMD(0x15, 0x00),
  562. _INIT_DCS_CMD(0x16, 0x10),
  563. _INIT_DCS_CMD(0x17, 0xA0),
  564. _INIT_DCS_CMD(0x18, 0x86),
  565. _INIT_DCS_CMD(0x22, 0x00),
  566. _INIT_DCS_CMD(0x23, 0x00),
  567. _INIT_DCS_CMD(0x19, 0x0D),
  568. _INIT_DCS_CMD(0x1A, 0x7F),
  569. _INIT_DCS_CMD(0x1B, 0x0C),
  570. _INIT_DCS_CMD(0x1C, 0xBF),
  571. _INIT_DCS_CMD(0x2A, 0x0D),
  572. _INIT_DCS_CMD(0x2B, 0x7F),
  573. _INIT_DCS_CMD(0x20, 0x00),
  574. _INIT_DCS_CMD(0x1D, 0x00),
  575. _INIT_DCS_CMD(0x1E, 0x78),
  576. _INIT_DCS_CMD(0x1F, 0x78),
  577. _INIT_DCS_CMD(0x2F, 0x03),
  578. _INIT_DCS_CMD(0x30, 0x78),
  579. _INIT_DCS_CMD(0x33, 0x78),
  580. _INIT_DCS_CMD(0x34, 0x66),
  581. _INIT_DCS_CMD(0x35, 0x11),
  582. _INIT_DCS_CMD(0x39, 0x10),
  583. _INIT_DCS_CMD(0x3A, 0x78),
  584. _INIT_DCS_CMD(0x3B, 0x06),
  585. _INIT_DCS_CMD(0xC8, 0x04),
  586. _INIT_DCS_CMD(0xC9, 0x84),
  587. _INIT_DCS_CMD(0xCA, 0x4E),
  588. _INIT_DCS_CMD(0xCB, 0x00),
  589. _INIT_DCS_CMD(0xA9, 0x50),
  590. _INIT_DCS_CMD(0xAA, 0x4F),
  591. _INIT_DCS_CMD(0xAB, 0x4D),
  592. _INIT_DCS_CMD(0xAC, 0x4A),
  593. _INIT_DCS_CMD(0xAD, 0x48),
  594. _INIT_DCS_CMD(0xAE, 0x46),
  595. _INIT_DCS_CMD(0xFF, 0x27),
  596. _INIT_DCS_CMD(0xFB, 0x01),
  597. _INIT_DCS_CMD(0xC0, 0x18),
  598. _INIT_DCS_CMD(0xC1, 0x00),
  599. _INIT_DCS_CMD(0xC2, 0x00),
  600. _INIT_DCS_CMD(0x56, 0x06),
  601. _INIT_DCS_CMD(0x58, 0x80),
  602. _INIT_DCS_CMD(0x59, 0x75),
  603. _INIT_DCS_CMD(0x5A, 0x00),
  604. _INIT_DCS_CMD(0x5B, 0x02),
  605. _INIT_DCS_CMD(0x5C, 0x00),
  606. _INIT_DCS_CMD(0x5D, 0x00),
  607. _INIT_DCS_CMD(0x5E, 0x20),
  608. _INIT_DCS_CMD(0x5F, 0x10),
  609. _INIT_DCS_CMD(0x60, 0x00),
  610. _INIT_DCS_CMD(0x61, 0x2E),
  611. _INIT_DCS_CMD(0x62, 0x00),
  612. _INIT_DCS_CMD(0x63, 0x01),
  613. _INIT_DCS_CMD(0x64, 0x43),
  614. _INIT_DCS_CMD(0x65, 0x2D),
  615. _INIT_DCS_CMD(0x66, 0x00),
  616. _INIT_DCS_CMD(0x67, 0x01),
  617. _INIT_DCS_CMD(0x68, 0x43),
  618. _INIT_DCS_CMD(0x98, 0x01),
  619. _INIT_DCS_CMD(0xB4, 0x03),
  620. _INIT_DCS_CMD(0x9B, 0xBD),
  621. _INIT_DCS_CMD(0xA0, 0x90),
  622. _INIT_DCS_CMD(0xAB, 0x1B),
  623. _INIT_DCS_CMD(0xBC, 0x0C),
  624. _INIT_DCS_CMD(0xBD, 0x28),
  625. _INIT_DCS_CMD(0xFF, 0x2A),
  626. _INIT_DCS_CMD(0xFB, 0x01),
  627. _INIT_DCS_CMD(0x22, 0x2F),
  628. _INIT_DCS_CMD(0x23, 0x08),
  629. _INIT_DCS_CMD(0x24, 0x00),
  630. _INIT_DCS_CMD(0x25, 0x65),
  631. _INIT_DCS_CMD(0x26, 0xF8),
  632. _INIT_DCS_CMD(0x27, 0x00),
  633. _INIT_DCS_CMD(0x28, 0x1A),
  634. _INIT_DCS_CMD(0x29, 0x00),
  635. _INIT_DCS_CMD(0x2A, 0x1A),
  636. _INIT_DCS_CMD(0x2B, 0x00),
  637. _INIT_DCS_CMD(0x2D, 0x1A),
  638. _INIT_DCS_CMD(0x64, 0x96),
  639. _INIT_DCS_CMD(0x65, 0x00),
  640. _INIT_DCS_CMD(0x66, 0x00),
  641. _INIT_DCS_CMD(0x6A, 0x96),
  642. _INIT_DCS_CMD(0x6B, 0x00),
  643. _INIT_DCS_CMD(0x6C, 0x00),
  644. _INIT_DCS_CMD(0x70, 0x92),
  645. _INIT_DCS_CMD(0x71, 0x00),
  646. _INIT_DCS_CMD(0x72, 0x00),
  647. _INIT_DCS_CMD(0xA2, 0x33),
  648. _INIT_DCS_CMD(0xA3, 0x30),
  649. _INIT_DCS_CMD(0xA4, 0xC0),
  650. _INIT_DCS_CMD(0xE8, 0x00),
  651. _INIT_DCS_CMD(0x97, 0x3C),
  652. _INIT_DCS_CMD(0x98, 0x02),
  653. _INIT_DCS_CMD(0x99, 0x95),
  654. _INIT_DCS_CMD(0x9A, 0x06),
  655. _INIT_DCS_CMD(0x9B, 0x00),
  656. _INIT_DCS_CMD(0x9C, 0x0B),
  657. _INIT_DCS_CMD(0x9D, 0x0A),
  658. _INIT_DCS_CMD(0x9E, 0x90),
  659. _INIT_DCS_CMD(0xFF, 0xF0),
  660. _INIT_DCS_CMD(0xFB, 0x01),
  661. _INIT_DCS_CMD(0x3A, 0x08),
  662. _INIT_DCS_CMD(0xFF, 0xD0),
  663. _INIT_DCS_CMD(0xFB, 0x01),
  664. _INIT_DCS_CMD(0x00, 0x33),
  665. _INIT_DCS_CMD(0x08, 0x01),
  666. _INIT_DCS_CMD(0x09, 0xBF),
  667. _INIT_DCS_CMD(0x2F, 0x33),
  668. _INIT_DCS_CMD(0xFF, 0x23),
  669. _INIT_DCS_CMD(0xFB, 0x01),
  670. _INIT_DCS_CMD(0x00, 0x80),
  671. _INIT_DCS_CMD(0x07, 0x00),
  672. _INIT_DCS_CMD(0xFF, 0x20),
  673. _INIT_DCS_CMD(0xFB, 0x01),
  674. _INIT_DCS_CMD(0x30, 0x00),
  675. _INIT_DCS_CMD(0xFF, 0x24),
  676. _INIT_DCS_CMD(0x5C, 0x88),
  677. _INIT_DCS_CMD(0x5D, 0x08),
  678. _INIT_DCS_CMD(0xFF, 0x10),
  679. _INIT_DCS_CMD(0xB9, 0x01),
  680. _INIT_DCS_CMD(0xFF, 0x20),
  681. _INIT_DCS_CMD(0x18, 0x40),
  682. _INIT_DCS_CMD(0xFF, 0x10),
  683. _INIT_DCS_CMD(0xB9, 0x02),
  684. _INIT_DCS_CMD(0xFF, 0x10),
  685. _INIT_DCS_CMD(0xFB, 0x01),
  686. _INIT_DCS_CMD(0xBB, 0x13),
  687. _INIT_DCS_CMD(0x3B, 0x03, 0x96, 0x1A, 0x04, 0x04),
  688. _INIT_DCS_CMD(0x35, 0x00),
  689. _INIT_DCS_CMD(0x51, 0x0F, 0xFF),
  690. _INIT_DCS_CMD(0x53, 0x24),
  691. _INIT_DELAY_CMD(100),
  692. _INIT_DCS_CMD(0x11),
  693. _INIT_DELAY_CMD(200),
  694. _INIT_DCS_CMD(0x29),
  695. _INIT_DELAY_CMD(100),
  696. {},
  697. };
  698. static const struct panel_init_cmd boe_init_cmd[] = {
  699. _INIT_DELAY_CMD(24),
  700. _INIT_DCS_CMD(0xB0, 0x05),
  701. _INIT_DCS_CMD(0xB1, 0xE5),
  702. _INIT_DCS_CMD(0xB3, 0x52),
  703. _INIT_DCS_CMD(0xB0, 0x00),
  704. _INIT_DCS_CMD(0xB3, 0x88),
  705. _INIT_DCS_CMD(0xB0, 0x04),
  706. _INIT_DCS_CMD(0xB8, 0x00),
  707. _INIT_DCS_CMD(0xB0, 0x00),
  708. _INIT_DCS_CMD(0xB6, 0x03),
  709. _INIT_DCS_CMD(0xBA, 0x8B),
  710. _INIT_DCS_CMD(0xBF, 0x1A),
  711. _INIT_DCS_CMD(0xC0, 0x0F),
  712. _INIT_DCS_CMD(0xC2, 0x0C),
  713. _INIT_DCS_CMD(0xC3, 0x02),
  714. _INIT_DCS_CMD(0xC4, 0x0C),
  715. _INIT_DCS_CMD(0xC5, 0x02),
  716. _INIT_DCS_CMD(0xB0, 0x01),
  717. _INIT_DCS_CMD(0xE0, 0x26),
  718. _INIT_DCS_CMD(0xE1, 0x26),
  719. _INIT_DCS_CMD(0xDC, 0x00),
  720. _INIT_DCS_CMD(0xDD, 0x00),
  721. _INIT_DCS_CMD(0xCC, 0x26),
  722. _INIT_DCS_CMD(0xCD, 0x26),
  723. _INIT_DCS_CMD(0xC8, 0x00),
  724. _INIT_DCS_CMD(0xC9, 0x00),
  725. _INIT_DCS_CMD(0xD2, 0x03),
  726. _INIT_DCS_CMD(0xD3, 0x03),
  727. _INIT_DCS_CMD(0xE6, 0x04),
  728. _INIT_DCS_CMD(0xE7, 0x04),
  729. _INIT_DCS_CMD(0xC4, 0x09),
  730. _INIT_DCS_CMD(0xC5, 0x09),
  731. _INIT_DCS_CMD(0xD8, 0x0A),
  732. _INIT_DCS_CMD(0xD9, 0x0A),
  733. _INIT_DCS_CMD(0xC2, 0x0B),
  734. _INIT_DCS_CMD(0xC3, 0x0B),
  735. _INIT_DCS_CMD(0xD6, 0x0C),
  736. _INIT_DCS_CMD(0xD7, 0x0C),
  737. _INIT_DCS_CMD(0xC0, 0x05),
  738. _INIT_DCS_CMD(0xC1, 0x05),
  739. _INIT_DCS_CMD(0xD4, 0x06),
  740. _INIT_DCS_CMD(0xD5, 0x06),
  741. _INIT_DCS_CMD(0xCA, 0x07),
  742. _INIT_DCS_CMD(0xCB, 0x07),
  743. _INIT_DCS_CMD(0xDE, 0x08),
  744. _INIT_DCS_CMD(0xDF, 0x08),
  745. _INIT_DCS_CMD(0xB0, 0x02),
  746. _INIT_DCS_CMD(0xC0, 0x00),
  747. _INIT_DCS_CMD(0xC1, 0x0D),
  748. _INIT_DCS_CMD(0xC2, 0x17),
  749. _INIT_DCS_CMD(0xC3, 0x26),
  750. _INIT_DCS_CMD(0xC4, 0x31),
  751. _INIT_DCS_CMD(0xC5, 0x1C),
  752. _INIT_DCS_CMD(0xC6, 0x2C),
  753. _INIT_DCS_CMD(0xC7, 0x33),
  754. _INIT_DCS_CMD(0xC8, 0x31),
  755. _INIT_DCS_CMD(0xC9, 0x37),
  756. _INIT_DCS_CMD(0xCA, 0x37),
  757. _INIT_DCS_CMD(0xCB, 0x37),
  758. _INIT_DCS_CMD(0xCC, 0x39),
  759. _INIT_DCS_CMD(0xCD, 0x2E),
  760. _INIT_DCS_CMD(0xCE, 0x2F),
  761. _INIT_DCS_CMD(0xCF, 0x2F),
  762. _INIT_DCS_CMD(0xD0, 0x07),
  763. _INIT_DCS_CMD(0xD2, 0x00),
  764. _INIT_DCS_CMD(0xD3, 0x0D),
  765. _INIT_DCS_CMD(0xD4, 0x17),
  766. _INIT_DCS_CMD(0xD5, 0x26),
  767. _INIT_DCS_CMD(0xD6, 0x31),
  768. _INIT_DCS_CMD(0xD7, 0x3F),
  769. _INIT_DCS_CMD(0xD8, 0x3F),
  770. _INIT_DCS_CMD(0xD9, 0x3F),
  771. _INIT_DCS_CMD(0xDA, 0x3F),
  772. _INIT_DCS_CMD(0xDB, 0x37),
  773. _INIT_DCS_CMD(0xDC, 0x37),
  774. _INIT_DCS_CMD(0xDD, 0x37),
  775. _INIT_DCS_CMD(0xDE, 0x39),
  776. _INIT_DCS_CMD(0xDF, 0x2E),
  777. _INIT_DCS_CMD(0xE0, 0x2F),
  778. _INIT_DCS_CMD(0xE1, 0x2F),
  779. _INIT_DCS_CMD(0xE2, 0x07),
  780. _INIT_DCS_CMD(0xB0, 0x03),
  781. _INIT_DCS_CMD(0xC8, 0x0B),
  782. _INIT_DCS_CMD(0xC9, 0x07),
  783. _INIT_DCS_CMD(0xC3, 0x00),
  784. _INIT_DCS_CMD(0xE7, 0x00),
  785. _INIT_DCS_CMD(0xC5, 0x2A),
  786. _INIT_DCS_CMD(0xDE, 0x2A),
  787. _INIT_DCS_CMD(0xCA, 0x43),
  788. _INIT_DCS_CMD(0xC9, 0x07),
  789. _INIT_DCS_CMD(0xE4, 0xC0),
  790. _INIT_DCS_CMD(0xE5, 0x0D),
  791. _INIT_DCS_CMD(0xCB, 0x00),
  792. _INIT_DCS_CMD(0xB0, 0x06),
  793. _INIT_DCS_CMD(0xB8, 0xA5),
  794. _INIT_DCS_CMD(0xC0, 0xA5),
  795. _INIT_DCS_CMD(0xC7, 0x0F),
  796. _INIT_DCS_CMD(0xD5, 0x32),
  797. _INIT_DCS_CMD(0xB8, 0x00),
  798. _INIT_DCS_CMD(0xC0, 0x00),
  799. _INIT_DCS_CMD(0xBC, 0x00),
  800. _INIT_DCS_CMD(0xB0, 0x07),
  801. _INIT_DCS_CMD(0xB1, 0x00),
  802. _INIT_DCS_CMD(0xB2, 0x02),
  803. _INIT_DCS_CMD(0xB3, 0x0F),
  804. _INIT_DCS_CMD(0xB4, 0x25),
  805. _INIT_DCS_CMD(0xB5, 0x39),
  806. _INIT_DCS_CMD(0xB6, 0x4E),
  807. _INIT_DCS_CMD(0xB7, 0x72),
  808. _INIT_DCS_CMD(0xB8, 0x97),
  809. _INIT_DCS_CMD(0xB9, 0xDC),
  810. _INIT_DCS_CMD(0xBA, 0x22),
  811. _INIT_DCS_CMD(0xBB, 0xA4),
  812. _INIT_DCS_CMD(0xBC, 0x2B),
  813. _INIT_DCS_CMD(0xBD, 0x2F),
  814. _INIT_DCS_CMD(0xBE, 0xA9),
  815. _INIT_DCS_CMD(0xBF, 0x25),
  816. _INIT_DCS_CMD(0xC0, 0x61),
  817. _INIT_DCS_CMD(0xC1, 0x97),
  818. _INIT_DCS_CMD(0xC2, 0xB2),
  819. _INIT_DCS_CMD(0xC3, 0xCD),
  820. _INIT_DCS_CMD(0xC4, 0xD9),
  821. _INIT_DCS_CMD(0xC5, 0xE7),
  822. _INIT_DCS_CMD(0xC6, 0xF4),
  823. _INIT_DCS_CMD(0xC7, 0xFA),
  824. _INIT_DCS_CMD(0xC8, 0xFC),
  825. _INIT_DCS_CMD(0xC9, 0x00),
  826. _INIT_DCS_CMD(0xCA, 0x00),
  827. _INIT_DCS_CMD(0xCB, 0x16),
  828. _INIT_DCS_CMD(0xCC, 0xAF),
  829. _INIT_DCS_CMD(0xCD, 0xFF),
  830. _INIT_DCS_CMD(0xCE, 0xFF),
  831. _INIT_DCS_CMD(0xB0, 0x08),
  832. _INIT_DCS_CMD(0xB1, 0x04),
  833. _INIT_DCS_CMD(0xB2, 0x05),
  834. _INIT_DCS_CMD(0xB3, 0x11),
  835. _INIT_DCS_CMD(0xB4, 0x24),
  836. _INIT_DCS_CMD(0xB5, 0x39),
  837. _INIT_DCS_CMD(0xB6, 0x4F),
  838. _INIT_DCS_CMD(0xB7, 0x72),
  839. _INIT_DCS_CMD(0xB8, 0x98),
  840. _INIT_DCS_CMD(0xB9, 0xDC),
  841. _INIT_DCS_CMD(0xBA, 0x23),
  842. _INIT_DCS_CMD(0xBB, 0xA6),
  843. _INIT_DCS_CMD(0xBC, 0x2C),
  844. _INIT_DCS_CMD(0xBD, 0x30),
  845. _INIT_DCS_CMD(0xBE, 0xAA),
  846. _INIT_DCS_CMD(0xBF, 0x26),
  847. _INIT_DCS_CMD(0xC0, 0x62),
  848. _INIT_DCS_CMD(0xC1, 0x9B),
  849. _INIT_DCS_CMD(0xC2, 0xB5),
  850. _INIT_DCS_CMD(0xC3, 0xCF),
  851. _INIT_DCS_CMD(0xC4, 0xDB),
  852. _INIT_DCS_CMD(0xC5, 0xE8),
  853. _INIT_DCS_CMD(0xC6, 0xF5),
  854. _INIT_DCS_CMD(0xC7, 0xFA),
  855. _INIT_DCS_CMD(0xC8, 0xFC),
  856. _INIT_DCS_CMD(0xC9, 0x00),
  857. _INIT_DCS_CMD(0xCA, 0x00),
  858. _INIT_DCS_CMD(0xCB, 0x16),
  859. _INIT_DCS_CMD(0xCC, 0xAF),
  860. _INIT_DCS_CMD(0xCD, 0xFF),
  861. _INIT_DCS_CMD(0xCE, 0xFF),
  862. _INIT_DCS_CMD(0xB0, 0x09),
  863. _INIT_DCS_CMD(0xB1, 0x04),
  864. _INIT_DCS_CMD(0xB2, 0x02),
  865. _INIT_DCS_CMD(0xB3, 0x16),
  866. _INIT_DCS_CMD(0xB4, 0x24),
  867. _INIT_DCS_CMD(0xB5, 0x3B),
  868. _INIT_DCS_CMD(0xB6, 0x4F),
  869. _INIT_DCS_CMD(0xB7, 0x73),
  870. _INIT_DCS_CMD(0xB8, 0x99),
  871. _INIT_DCS_CMD(0xB9, 0xE0),
  872. _INIT_DCS_CMD(0xBA, 0x26),
  873. _INIT_DCS_CMD(0xBB, 0xAD),
  874. _INIT_DCS_CMD(0xBC, 0x36),
  875. _INIT_DCS_CMD(0xBD, 0x3A),
  876. _INIT_DCS_CMD(0xBE, 0xAE),
  877. _INIT_DCS_CMD(0xBF, 0x2A),
  878. _INIT_DCS_CMD(0xC0, 0x66),
  879. _INIT_DCS_CMD(0xC1, 0x9E),
  880. _INIT_DCS_CMD(0xC2, 0xB8),
  881. _INIT_DCS_CMD(0xC3, 0xD1),
  882. _INIT_DCS_CMD(0xC4, 0xDD),
  883. _INIT_DCS_CMD(0xC5, 0xE9),
  884. _INIT_DCS_CMD(0xC6, 0xF6),
  885. _INIT_DCS_CMD(0xC7, 0xFA),
  886. _INIT_DCS_CMD(0xC8, 0xFC),
  887. _INIT_DCS_CMD(0xC9, 0x00),
  888. _INIT_DCS_CMD(0xCA, 0x00),
  889. _INIT_DCS_CMD(0xCB, 0x16),
  890. _INIT_DCS_CMD(0xCC, 0xAF),
  891. _INIT_DCS_CMD(0xCD, 0xFF),
  892. _INIT_DCS_CMD(0xCE, 0xFF),
  893. _INIT_DCS_CMD(0xB0, 0x0A),
  894. _INIT_DCS_CMD(0xB1, 0x00),
  895. _INIT_DCS_CMD(0xB2, 0x02),
  896. _INIT_DCS_CMD(0xB3, 0x0F),
  897. _INIT_DCS_CMD(0xB4, 0x25),
  898. _INIT_DCS_CMD(0xB5, 0x39),
  899. _INIT_DCS_CMD(0xB6, 0x4E),
  900. _INIT_DCS_CMD(0xB7, 0x72),
  901. _INIT_DCS_CMD(0xB8, 0x97),
  902. _INIT_DCS_CMD(0xB9, 0xDC),
  903. _INIT_DCS_CMD(0xBA, 0x22),
  904. _INIT_DCS_CMD(0xBB, 0xA4),
  905. _INIT_DCS_CMD(0xBC, 0x2B),
  906. _INIT_DCS_CMD(0xBD, 0x2F),
  907. _INIT_DCS_CMD(0xBE, 0xA9),
  908. _INIT_DCS_CMD(0xBF, 0x25),
  909. _INIT_DCS_CMD(0xC0, 0x61),
  910. _INIT_DCS_CMD(0xC1, 0x97),
  911. _INIT_DCS_CMD(0xC2, 0xB2),
  912. _INIT_DCS_CMD(0xC3, 0xCD),
  913. _INIT_DCS_CMD(0xC4, 0xD9),
  914. _INIT_DCS_CMD(0xC5, 0xE7),
  915. _INIT_DCS_CMD(0xC6, 0xF4),
  916. _INIT_DCS_CMD(0xC7, 0xFA),
  917. _INIT_DCS_CMD(0xC8, 0xFC),
  918. _INIT_DCS_CMD(0xC9, 0x00),
  919. _INIT_DCS_CMD(0xCA, 0x00),
  920. _INIT_DCS_CMD(0xCB, 0x16),
  921. _INIT_DCS_CMD(0xCC, 0xAF),
  922. _INIT_DCS_CMD(0xCD, 0xFF),
  923. _INIT_DCS_CMD(0xCE, 0xFF),
  924. _INIT_DCS_CMD(0xB0, 0x0B),
  925. _INIT_DCS_CMD(0xB1, 0x04),
  926. _INIT_DCS_CMD(0xB2, 0x05),
  927. _INIT_DCS_CMD(0xB3, 0x11),
  928. _INIT_DCS_CMD(0xB4, 0x24),
  929. _INIT_DCS_CMD(0xB5, 0x39),
  930. _INIT_DCS_CMD(0xB6, 0x4F),
  931. _INIT_DCS_CMD(0xB7, 0x72),
  932. _INIT_DCS_CMD(0xB8, 0x98),
  933. _INIT_DCS_CMD(0xB9, 0xDC),
  934. _INIT_DCS_CMD(0xBA, 0x23),
  935. _INIT_DCS_CMD(0xBB, 0xA6),
  936. _INIT_DCS_CMD(0xBC, 0x2C),
  937. _INIT_DCS_CMD(0xBD, 0x30),
  938. _INIT_DCS_CMD(0xBE, 0xAA),
  939. _INIT_DCS_CMD(0xBF, 0x26),
  940. _INIT_DCS_CMD(0xC0, 0x62),
  941. _INIT_DCS_CMD(0xC1, 0x9B),
  942. _INIT_DCS_CMD(0xC2, 0xB5),
  943. _INIT_DCS_CMD(0xC3, 0xCF),
  944. _INIT_DCS_CMD(0xC4, 0xDB),
  945. _INIT_DCS_CMD(0xC5, 0xE8),
  946. _INIT_DCS_CMD(0xC6, 0xF5),
  947. _INIT_DCS_CMD(0xC7, 0xFA),
  948. _INIT_DCS_CMD(0xC8, 0xFC),
  949. _INIT_DCS_CMD(0xC9, 0x00),
  950. _INIT_DCS_CMD(0xCA, 0x00),
  951. _INIT_DCS_CMD(0xCB, 0x16),
  952. _INIT_DCS_CMD(0xCC, 0xAF),
  953. _INIT_DCS_CMD(0xCD, 0xFF),
  954. _INIT_DCS_CMD(0xCE, 0xFF),
  955. _INIT_DCS_CMD(0xB0, 0x0C),
  956. _INIT_DCS_CMD(0xB1, 0x04),
  957. _INIT_DCS_CMD(0xB2, 0x02),
  958. _INIT_DCS_CMD(0xB3, 0x16),
  959. _INIT_DCS_CMD(0xB4, 0x24),
  960. _INIT_DCS_CMD(0xB5, 0x3B),
  961. _INIT_DCS_CMD(0xB6, 0x4F),
  962. _INIT_DCS_CMD(0xB7, 0x73),
  963. _INIT_DCS_CMD(0xB8, 0x99),
  964. _INIT_DCS_CMD(0xB9, 0xE0),
  965. _INIT_DCS_CMD(0xBA, 0x26),
  966. _INIT_DCS_CMD(0xBB, 0xAD),
  967. _INIT_DCS_CMD(0xBC, 0x36),
  968. _INIT_DCS_CMD(0xBD, 0x3A),
  969. _INIT_DCS_CMD(0xBE, 0xAE),
  970. _INIT_DCS_CMD(0xBF, 0x2A),
  971. _INIT_DCS_CMD(0xC0, 0x66),
  972. _INIT_DCS_CMD(0xC1, 0x9E),
  973. _INIT_DCS_CMD(0xC2, 0xB8),
  974. _INIT_DCS_CMD(0xC3, 0xD1),
  975. _INIT_DCS_CMD(0xC4, 0xDD),
  976. _INIT_DCS_CMD(0xC5, 0xE9),
  977. _INIT_DCS_CMD(0xC6, 0xF6),
  978. _INIT_DCS_CMD(0xC7, 0xFA),
  979. _INIT_DCS_CMD(0xC8, 0xFC),
  980. _INIT_DCS_CMD(0xC9, 0x00),
  981. _INIT_DCS_CMD(0xCA, 0x00),
  982. _INIT_DCS_CMD(0xCB, 0x16),
  983. _INIT_DCS_CMD(0xCC, 0xAF),
  984. _INIT_DCS_CMD(0xCD, 0xFF),
  985. _INIT_DCS_CMD(0xCE, 0xFF),
  986. _INIT_DCS_CMD(0xB0, 0x00),
  987. _INIT_DCS_CMD(0xB3, 0x08),
  988. _INIT_DCS_CMD(0xB0, 0x04),
  989. _INIT_DCS_CMD(0xB8, 0x68),
  990. _INIT_DELAY_CMD(150),
  991. {},
  992. };
  993. static const struct panel_init_cmd auo_kd101n80_45na_init_cmd[] = {
  994. _INIT_DELAY_CMD(24),
  995. _INIT_DCS_CMD(0x11),
  996. _INIT_DELAY_CMD(120),
  997. _INIT_DCS_CMD(0x29),
  998. _INIT_DELAY_CMD(120),
  999. {},
  1000. };
  1001. static const struct panel_init_cmd auo_b101uan08_3_init_cmd[] = {
  1002. _INIT_DELAY_CMD(24),
  1003. _INIT_DCS_CMD(0xB0, 0x01),
  1004. _INIT_DCS_CMD(0xC0, 0x48),
  1005. _INIT_DCS_CMD(0xC1, 0x48),
  1006. _INIT_DCS_CMD(0xC2, 0x47),
  1007. _INIT_DCS_CMD(0xC3, 0x47),
  1008. _INIT_DCS_CMD(0xC4, 0x46),
  1009. _INIT_DCS_CMD(0xC5, 0x46),
  1010. _INIT_DCS_CMD(0xC6, 0x45),
  1011. _INIT_DCS_CMD(0xC7, 0x45),
  1012. _INIT_DCS_CMD(0xC8, 0x64),
  1013. _INIT_DCS_CMD(0xC9, 0x64),
  1014. _INIT_DCS_CMD(0xCA, 0x4F),
  1015. _INIT_DCS_CMD(0xCB, 0x4F),
  1016. _INIT_DCS_CMD(0xCC, 0x40),
  1017. _INIT_DCS_CMD(0xCD, 0x40),
  1018. _INIT_DCS_CMD(0xCE, 0x66),
  1019. _INIT_DCS_CMD(0xCF, 0x66),
  1020. _INIT_DCS_CMD(0xD0, 0x4F),
  1021. _INIT_DCS_CMD(0xD1, 0x4F),
  1022. _INIT_DCS_CMD(0xD2, 0x41),
  1023. _INIT_DCS_CMD(0xD3, 0x41),
  1024. _INIT_DCS_CMD(0xD4, 0x48),
  1025. _INIT_DCS_CMD(0xD5, 0x48),
  1026. _INIT_DCS_CMD(0xD6, 0x47),
  1027. _INIT_DCS_CMD(0xD7, 0x47),
  1028. _INIT_DCS_CMD(0xD8, 0x46),
  1029. _INIT_DCS_CMD(0xD9, 0x46),
  1030. _INIT_DCS_CMD(0xDA, 0x45),
  1031. _INIT_DCS_CMD(0xDB, 0x45),
  1032. _INIT_DCS_CMD(0xDC, 0x64),
  1033. _INIT_DCS_CMD(0xDD, 0x64),
  1034. _INIT_DCS_CMD(0xDE, 0x4F),
  1035. _INIT_DCS_CMD(0xDF, 0x4F),
  1036. _INIT_DCS_CMD(0xE0, 0x40),
  1037. _INIT_DCS_CMD(0xE1, 0x40),
  1038. _INIT_DCS_CMD(0xE2, 0x66),
  1039. _INIT_DCS_CMD(0xE3, 0x66),
  1040. _INIT_DCS_CMD(0xE4, 0x4F),
  1041. _INIT_DCS_CMD(0xE5, 0x4F),
  1042. _INIT_DCS_CMD(0xE6, 0x41),
  1043. _INIT_DCS_CMD(0xE7, 0x41),
  1044. _INIT_DELAY_CMD(150),
  1045. {},
  1046. };
  1047. static inline struct boe_panel *to_boe_panel(struct drm_panel *panel)
  1048. {
  1049. return container_of(panel, struct boe_panel, base);
  1050. }
  1051. static int boe_panel_init_dcs_cmd(struct boe_panel *boe)
  1052. {
  1053. struct mipi_dsi_device *dsi = boe->dsi;
  1054. struct drm_panel *panel = &boe->base;
  1055. int i, err = 0;
  1056. if (boe->desc->init_cmds) {
  1057. const struct panel_init_cmd *init_cmds = boe->desc->init_cmds;
  1058. for (i = 0; init_cmds[i].len != 0; i++) {
  1059. const struct panel_init_cmd *cmd = &init_cmds[i];
  1060. switch (cmd->type) {
  1061. case DELAY_CMD:
  1062. msleep(cmd->data[0]);
  1063. err = 0;
  1064. break;
  1065. case INIT_DCS_CMD:
  1066. err = mipi_dsi_dcs_write(dsi, cmd->data[0],
  1067. cmd->len <= 1 ? NULL :
  1068. &cmd->data[1],
  1069. cmd->len - 1);
  1070. break;
  1071. default:
  1072. err = -EINVAL;
  1073. }
  1074. if (err < 0) {
  1075. dev_err(panel->dev,
  1076. "failed to write command %u\n", i);
  1077. return err;
  1078. }
  1079. }
  1080. }
  1081. return 0;
  1082. }
  1083. static int boe_panel_enter_sleep_mode(struct boe_panel *boe)
  1084. {
  1085. struct mipi_dsi_device *dsi = boe->dsi;
  1086. int ret;
  1087. dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
  1088. ret = mipi_dsi_dcs_set_display_off(dsi);
  1089. if (ret < 0)
  1090. return ret;
  1091. ret = mipi_dsi_dcs_enter_sleep_mode(dsi);
  1092. if (ret < 0)
  1093. return ret;
  1094. return 0;
  1095. }
  1096. static int boe_panel_disable(struct drm_panel *panel)
  1097. {
  1098. struct boe_panel *boe = to_boe_panel(panel);
  1099. int ret;
  1100. ret = boe_panel_enter_sleep_mode(boe);
  1101. if (ret < 0) {
  1102. dev_err(panel->dev, "failed to set panel off: %d\n", ret);
  1103. return ret;
  1104. }
  1105. msleep(150);
  1106. return 0;
  1107. }
  1108. static int boe_panel_unprepare(struct drm_panel *panel)
  1109. {
  1110. struct boe_panel *boe = to_boe_panel(panel);
  1111. if (!boe->prepared)
  1112. return 0;
  1113. if (boe->desc->discharge_on_disable) {
  1114. regulator_disable(boe->avee);
  1115. regulator_disable(boe->avdd);
  1116. usleep_range(5000, 7000);
  1117. gpiod_set_value(boe->enable_gpio, 0);
  1118. usleep_range(5000, 7000);
  1119. regulator_disable(boe->pp1800);
  1120. regulator_disable(boe->pp3300);
  1121. } else {
  1122. gpiod_set_value(boe->enable_gpio, 0);
  1123. usleep_range(1000, 2000);
  1124. regulator_disable(boe->avee);
  1125. regulator_disable(boe->avdd);
  1126. usleep_range(5000, 7000);
  1127. regulator_disable(boe->pp1800);
  1128. regulator_disable(boe->pp3300);
  1129. }
  1130. boe->prepared = false;
  1131. return 0;
  1132. }
  1133. static int boe_panel_prepare(struct drm_panel *panel)
  1134. {
  1135. struct boe_panel *boe = to_boe_panel(panel);
  1136. int ret;
  1137. if (boe->prepared)
  1138. return 0;
  1139. gpiod_set_value(boe->enable_gpio, 0);
  1140. usleep_range(1000, 1500);
  1141. ret = regulator_enable(boe->pp3300);
  1142. if (ret < 0)
  1143. return ret;
  1144. ret = regulator_enable(boe->pp1800);
  1145. if (ret < 0)
  1146. return ret;
  1147. usleep_range(3000, 5000);
  1148. ret = regulator_enable(boe->avdd);
  1149. if (ret < 0)
  1150. goto poweroff1v8;
  1151. ret = regulator_enable(boe->avee);
  1152. if (ret < 0)
  1153. goto poweroffavdd;
  1154. usleep_range(10000, 11000);
  1155. if (boe->desc->lp11_before_reset) {
  1156. mipi_dsi_dcs_nop(boe->dsi);
  1157. usleep_range(1000, 2000);
  1158. }
  1159. gpiod_set_value(boe->enable_gpio, 1);
  1160. usleep_range(1000, 2000);
  1161. gpiod_set_value(boe->enable_gpio, 0);
  1162. usleep_range(1000, 2000);
  1163. gpiod_set_value(boe->enable_gpio, 1);
  1164. usleep_range(6000, 10000);
  1165. ret = boe_panel_init_dcs_cmd(boe);
  1166. if (ret < 0) {
  1167. dev_err(panel->dev, "failed to init panel: %d\n", ret);
  1168. goto poweroff;
  1169. }
  1170. boe->prepared = true;
  1171. return 0;
  1172. poweroff:
  1173. regulator_disable(boe->avee);
  1174. poweroffavdd:
  1175. regulator_disable(boe->avdd);
  1176. poweroff1v8:
  1177. usleep_range(5000, 7000);
  1178. regulator_disable(boe->pp1800);
  1179. gpiod_set_value(boe->enable_gpio, 0);
  1180. return ret;
  1181. }
  1182. static int boe_panel_enable(struct drm_panel *panel)
  1183. {
  1184. msleep(130);
  1185. return 0;
  1186. }
  1187. static const struct drm_display_mode boe_tv110c9m_default_mode = {
  1188. .clock = 166594,
  1189. .hdisplay = 1200,
  1190. .hsync_start = 1200 + 40,
  1191. .hsync_end = 1200 + 40 + 8,
  1192. .htotal = 1200 + 40 + 8 + 28,
  1193. .vdisplay = 2000,
  1194. .vsync_start = 2000 + 26,
  1195. .vsync_end = 2000 + 26 + 2,
  1196. .vtotal = 2000 + 26 + 2 + 148,
  1197. .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
  1198. };
  1199. static const struct panel_desc boe_tv110c9m_desc = {
  1200. .modes = &boe_tv110c9m_default_mode,
  1201. .bpc = 8,
  1202. .size = {
  1203. .width_mm = 143,
  1204. .height_mm = 238,
  1205. },
  1206. .lanes = 4,
  1207. .format = MIPI_DSI_FMT_RGB888,
  1208. .mode_flags = MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_VIDEO
  1209. | MIPI_DSI_MODE_VIDEO_HSE
  1210. | MIPI_DSI_CLOCK_NON_CONTINUOUS
  1211. | MIPI_DSI_MODE_VIDEO_BURST,
  1212. .init_cmds = boe_tv110c9m_init_cmd,
  1213. };
  1214. static const struct drm_display_mode inx_hj110iz_default_mode = {
  1215. .clock = 166594,
  1216. .hdisplay = 1200,
  1217. .hsync_start = 1200 + 40,
  1218. .hsync_end = 1200 + 40 + 8,
  1219. .htotal = 1200 + 40 + 8 + 28,
  1220. .vdisplay = 2000,
  1221. .vsync_start = 2000 + 26,
  1222. .vsync_end = 2000 + 26 + 1,
  1223. .vtotal = 2000 + 26 + 1 + 149,
  1224. .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
  1225. };
  1226. static const struct panel_desc inx_hj110iz_desc = {
  1227. .modes = &inx_hj110iz_default_mode,
  1228. .bpc = 8,
  1229. .size = {
  1230. .width_mm = 143,
  1231. .height_mm = 238,
  1232. },
  1233. .lanes = 4,
  1234. .format = MIPI_DSI_FMT_RGB888,
  1235. .mode_flags = MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_VIDEO
  1236. | MIPI_DSI_MODE_VIDEO_HSE
  1237. | MIPI_DSI_CLOCK_NON_CONTINUOUS
  1238. | MIPI_DSI_MODE_VIDEO_BURST,
  1239. .init_cmds = inx_hj110iz_init_cmd,
  1240. };
  1241. static const struct drm_display_mode boe_tv101wum_nl6_default_mode = {
  1242. .clock = 159425,
  1243. .hdisplay = 1200,
  1244. .hsync_start = 1200 + 100,
  1245. .hsync_end = 1200 + 100 + 40,
  1246. .htotal = 1200 + 100 + 40 + 24,
  1247. .vdisplay = 1920,
  1248. .vsync_start = 1920 + 10,
  1249. .vsync_end = 1920 + 10 + 14,
  1250. .vtotal = 1920 + 10 + 14 + 4,
  1251. };
  1252. static const struct panel_desc boe_tv101wum_nl6_desc = {
  1253. .modes = &boe_tv101wum_nl6_default_mode,
  1254. .bpc = 8,
  1255. .size = {
  1256. .width_mm = 135,
  1257. .height_mm = 216,
  1258. },
  1259. .lanes = 4,
  1260. .format = MIPI_DSI_FMT_RGB888,
  1261. .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
  1262. MIPI_DSI_MODE_LPM,
  1263. .init_cmds = boe_init_cmd,
  1264. .discharge_on_disable = false,
  1265. };
  1266. static const struct drm_display_mode auo_kd101n80_45na_default_mode = {
  1267. .clock = 157000,
  1268. .hdisplay = 1200,
  1269. .hsync_start = 1200 + 60,
  1270. .hsync_end = 1200 + 60 + 24,
  1271. .htotal = 1200 + 60 + 24 + 56,
  1272. .vdisplay = 1920,
  1273. .vsync_start = 1920 + 16,
  1274. .vsync_end = 1920 + 16 + 4,
  1275. .vtotal = 1920 + 16 + 4 + 16,
  1276. };
  1277. static const struct panel_desc auo_kd101n80_45na_desc = {
  1278. .modes = &auo_kd101n80_45na_default_mode,
  1279. .bpc = 8,
  1280. .size = {
  1281. .width_mm = 135,
  1282. .height_mm = 216,
  1283. },
  1284. .lanes = 4,
  1285. .format = MIPI_DSI_FMT_RGB888,
  1286. .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
  1287. MIPI_DSI_MODE_LPM,
  1288. .init_cmds = auo_kd101n80_45na_init_cmd,
  1289. .discharge_on_disable = true,
  1290. };
  1291. static const struct drm_display_mode boe_tv101wum_n53_default_mode = {
  1292. .clock = 159916,
  1293. .hdisplay = 1200,
  1294. .hsync_start = 1200 + 80,
  1295. .hsync_end = 1200 + 80 + 24,
  1296. .htotal = 1200 + 80 + 24 + 60,
  1297. .vdisplay = 1920,
  1298. .vsync_start = 1920 + 20,
  1299. .vsync_end = 1920 + 20 + 4,
  1300. .vtotal = 1920 + 20 + 4 + 10,
  1301. .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
  1302. };
  1303. static const struct panel_desc boe_tv101wum_n53_desc = {
  1304. .modes = &boe_tv101wum_n53_default_mode,
  1305. .bpc = 8,
  1306. .size = {
  1307. .width_mm = 135,
  1308. .height_mm = 216,
  1309. },
  1310. .lanes = 4,
  1311. .format = MIPI_DSI_FMT_RGB888,
  1312. .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
  1313. MIPI_DSI_MODE_LPM,
  1314. .init_cmds = boe_init_cmd,
  1315. };
  1316. static const struct drm_display_mode auo_b101uan08_3_default_mode = {
  1317. .clock = 159667,
  1318. .hdisplay = 1200,
  1319. .hsync_start = 1200 + 60,
  1320. .hsync_end = 1200 + 60 + 4,
  1321. .htotal = 1200 + 60 + 4 + 80,
  1322. .vdisplay = 1920,
  1323. .vsync_start = 1920 + 34,
  1324. .vsync_end = 1920 + 34 + 2,
  1325. .vtotal = 1920 + 34 + 2 + 24,
  1326. .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
  1327. };
  1328. static const struct panel_desc auo_b101uan08_3_desc = {
  1329. .modes = &auo_b101uan08_3_default_mode,
  1330. .bpc = 8,
  1331. .size = {
  1332. .width_mm = 135,
  1333. .height_mm = 216,
  1334. },
  1335. .lanes = 4,
  1336. .format = MIPI_DSI_FMT_RGB888,
  1337. .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
  1338. MIPI_DSI_MODE_LPM,
  1339. .init_cmds = auo_b101uan08_3_init_cmd,
  1340. .lp11_before_reset = true,
  1341. };
  1342. static const struct drm_display_mode boe_tv105wum_nw0_default_mode = {
  1343. .clock = 159916,
  1344. .hdisplay = 1200,
  1345. .hsync_start = 1200 + 80,
  1346. .hsync_end = 1200 + 80 + 24,
  1347. .htotal = 1200 + 80 + 24 + 60,
  1348. .vdisplay = 1920,
  1349. .vsync_start = 1920 + 20,
  1350. .vsync_end = 1920 + 20 + 4,
  1351. .vtotal = 1920 + 20 + 4 + 10,
  1352. .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
  1353. };
  1354. static const struct panel_desc boe_tv105wum_nw0_desc = {
  1355. .modes = &boe_tv105wum_nw0_default_mode,
  1356. .bpc = 8,
  1357. .size = {
  1358. .width_mm = 141,
  1359. .height_mm = 226,
  1360. },
  1361. .lanes = 4,
  1362. .format = MIPI_DSI_FMT_RGB888,
  1363. .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
  1364. MIPI_DSI_MODE_LPM,
  1365. .init_cmds = boe_init_cmd,
  1366. .lp11_before_reset = true,
  1367. };
  1368. static int boe_panel_get_modes(struct drm_panel *panel,
  1369. struct drm_connector *connector)
  1370. {
  1371. struct boe_panel *boe = to_boe_panel(panel);
  1372. const struct drm_display_mode *m = boe->desc->modes;
  1373. struct drm_display_mode *mode;
  1374. mode = drm_mode_duplicate(connector->dev, m);
  1375. if (!mode) {
  1376. dev_err(panel->dev, "failed to add mode %ux%u@%u\n",
  1377. m->hdisplay, m->vdisplay, drm_mode_vrefresh(m));
  1378. return -ENOMEM;
  1379. }
  1380. mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
  1381. drm_mode_set_name(mode);
  1382. drm_mode_probed_add(connector, mode);
  1383. connector->display_info.width_mm = boe->desc->size.width_mm;
  1384. connector->display_info.height_mm = boe->desc->size.height_mm;
  1385. connector->display_info.bpc = boe->desc->bpc;
  1386. /*
  1387. * TODO: Remove once all drm drivers call
  1388. * drm_connector_set_orientation_from_panel()
  1389. */
  1390. drm_connector_set_panel_orientation(connector, boe->orientation);
  1391. return 1;
  1392. }
  1393. static enum drm_panel_orientation boe_panel_get_orientation(struct drm_panel *panel)
  1394. {
  1395. struct boe_panel *boe = to_boe_panel(panel);
  1396. return boe->orientation;
  1397. }
  1398. static const struct drm_panel_funcs boe_panel_funcs = {
  1399. .disable = boe_panel_disable,
  1400. .unprepare = boe_panel_unprepare,
  1401. .prepare = boe_panel_prepare,
  1402. .enable = boe_panel_enable,
  1403. .get_modes = boe_panel_get_modes,
  1404. .get_orientation = boe_panel_get_orientation,
  1405. };
  1406. static int boe_panel_add(struct boe_panel *boe)
  1407. {
  1408. struct device *dev = &boe->dsi->dev;
  1409. int err;
  1410. boe->avdd = devm_regulator_get(dev, "avdd");
  1411. if (IS_ERR(boe->avdd))
  1412. return PTR_ERR(boe->avdd);
  1413. boe->avee = devm_regulator_get(dev, "avee");
  1414. if (IS_ERR(boe->avee))
  1415. return PTR_ERR(boe->avee);
  1416. boe->pp3300 = devm_regulator_get(dev, "pp3300");
  1417. if (IS_ERR(boe->pp3300))
  1418. return PTR_ERR(boe->pp3300);
  1419. boe->pp1800 = devm_regulator_get(dev, "pp1800");
  1420. if (IS_ERR(boe->pp1800))
  1421. return PTR_ERR(boe->pp1800);
  1422. boe->enable_gpio = devm_gpiod_get(dev, "enable", GPIOD_OUT_LOW);
  1423. if (IS_ERR(boe->enable_gpio)) {
  1424. dev_err(dev, "cannot get reset-gpios %ld\n",
  1425. PTR_ERR(boe->enable_gpio));
  1426. return PTR_ERR(boe->enable_gpio);
  1427. }
  1428. gpiod_set_value(boe->enable_gpio, 0);
  1429. drm_panel_init(&boe->base, dev, &boe_panel_funcs,
  1430. DRM_MODE_CONNECTOR_DSI);
  1431. err = of_drm_get_panel_orientation(dev->of_node, &boe->orientation);
  1432. if (err < 0) {
  1433. dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, err);
  1434. return err;
  1435. }
  1436. err = drm_panel_of_backlight(&boe->base);
  1437. if (err)
  1438. return err;
  1439. boe->base.funcs = &boe_panel_funcs;
  1440. boe->base.dev = &boe->dsi->dev;
  1441. drm_panel_add(&boe->base);
  1442. return 0;
  1443. }
  1444. static int boe_panel_probe(struct mipi_dsi_device *dsi)
  1445. {
  1446. struct boe_panel *boe;
  1447. int ret;
  1448. const struct panel_desc *desc;
  1449. boe = devm_kzalloc(&dsi->dev, sizeof(*boe), GFP_KERNEL);
  1450. if (!boe)
  1451. return -ENOMEM;
  1452. desc = of_device_get_match_data(&dsi->dev);
  1453. dsi->lanes = desc->lanes;
  1454. dsi->format = desc->format;
  1455. dsi->mode_flags = desc->mode_flags;
  1456. boe->desc = desc;
  1457. boe->dsi = dsi;
  1458. ret = boe_panel_add(boe);
  1459. if (ret < 0)
  1460. return ret;
  1461. mipi_dsi_set_drvdata(dsi, boe);
  1462. ret = mipi_dsi_attach(dsi);
  1463. if (ret)
  1464. drm_panel_remove(&boe->base);
  1465. return ret;
  1466. }
  1467. static void boe_panel_shutdown(struct mipi_dsi_device *dsi)
  1468. {
  1469. struct boe_panel *boe = mipi_dsi_get_drvdata(dsi);
  1470. drm_panel_disable(&boe->base);
  1471. drm_panel_unprepare(&boe->base);
  1472. }
  1473. static void boe_panel_remove(struct mipi_dsi_device *dsi)
  1474. {
  1475. struct boe_panel *boe = mipi_dsi_get_drvdata(dsi);
  1476. int ret;
  1477. boe_panel_shutdown(dsi);
  1478. ret = mipi_dsi_detach(dsi);
  1479. if (ret < 0)
  1480. dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", ret);
  1481. if (boe->base.dev)
  1482. drm_panel_remove(&boe->base);
  1483. }
  1484. static const struct of_device_id boe_of_match[] = {
  1485. { .compatible = "boe,tv101wum-nl6",
  1486. .data = &boe_tv101wum_nl6_desc
  1487. },
  1488. { .compatible = "auo,kd101n80-45na",
  1489. .data = &auo_kd101n80_45na_desc
  1490. },
  1491. { .compatible = "boe,tv101wum-n53",
  1492. .data = &boe_tv101wum_n53_desc
  1493. },
  1494. { .compatible = "auo,b101uan08.3",
  1495. .data = &auo_b101uan08_3_desc
  1496. },
  1497. { .compatible = "boe,tv105wum-nw0",
  1498. .data = &boe_tv105wum_nw0_desc
  1499. },
  1500. { .compatible = "boe,tv110c9m-ll3",
  1501. .data = &boe_tv110c9m_desc
  1502. },
  1503. { .compatible = "innolux,hj110iz-01a",
  1504. .data = &inx_hj110iz_desc
  1505. },
  1506. { /* sentinel */ }
  1507. };
  1508. MODULE_DEVICE_TABLE(of, boe_of_match);
  1509. static struct mipi_dsi_driver boe_panel_driver = {
  1510. .driver = {
  1511. .name = "panel-boe-tv101wum-nl6",
  1512. .of_match_table = boe_of_match,
  1513. },
  1514. .probe = boe_panel_probe,
  1515. .remove = boe_panel_remove,
  1516. .shutdown = boe_panel_shutdown,
  1517. };
  1518. module_mipi_dsi_driver(boe_panel_driver);
  1519. MODULE_AUTHOR("Jitao Shi <[email protected]>");
  1520. MODULE_DESCRIPTION("BOE tv101wum-nl6 1200x1920 video mode panel driver");
  1521. MODULE_LICENSE("GPL v2");