hdmi4.c 18 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * HDMI interface DSS driver for TI's OMAP4 family of SoCs.
  4. *
  5. * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com/
  6. * Authors: Yong Zhi
  7. * Mythri pk <[email protected]>
  8. */
  9. #define DSS_SUBSYS_NAME "HDMI"
  10. #include <linux/kernel.h>
  11. #include <linux/module.h>
  12. #include <linux/err.h>
  13. #include <linux/io.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/mutex.h>
  16. #include <linux/delay.h>
  17. #include <linux/string.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/pm_runtime.h>
  20. #include <linux/clk.h>
  21. #include <linux/regulator/consumer.h>
  22. #include <linux/component.h>
  23. #include <linux/of.h>
  24. #include <linux/of_graph.h>
  25. #include <sound/omap-hdmi-audio.h>
  26. #include <media/cec.h>
  27. #include <drm/drm_atomic.h>
  28. #include <drm/drm_atomic_state_helper.h>
  29. #include <drm/drm_edid.h>
  30. #include "omapdss.h"
  31. #include "hdmi4_core.h"
  32. #include "hdmi4_cec.h"
  33. #include "dss.h"
  34. #include "hdmi.h"
  35. static int hdmi_runtime_get(struct omap_hdmi *hdmi)
  36. {
  37. int r;
  38. DSSDBG("hdmi_runtime_get\n");
  39. r = pm_runtime_get_sync(&hdmi->pdev->dev);
  40. if (WARN_ON(r < 0)) {
  41. pm_runtime_put_noidle(&hdmi->pdev->dev);
  42. return r;
  43. }
  44. return 0;
  45. }
  46. static void hdmi_runtime_put(struct omap_hdmi *hdmi)
  47. {
  48. int r;
  49. DSSDBG("hdmi_runtime_put\n");
  50. r = pm_runtime_put_sync(&hdmi->pdev->dev);
  51. WARN_ON(r < 0 && r != -ENOSYS);
  52. }
  53. static irqreturn_t hdmi_irq_handler(int irq, void *data)
  54. {
  55. struct omap_hdmi *hdmi = data;
  56. struct hdmi_wp_data *wp = &hdmi->wp;
  57. u32 irqstatus;
  58. irqstatus = hdmi_wp_get_irqstatus(wp);
  59. hdmi_wp_set_irqstatus(wp, irqstatus);
  60. if ((irqstatus & HDMI_IRQ_LINK_CONNECT) &&
  61. irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
  62. /*
  63. * If we get both connect and disconnect interrupts at the same
  64. * time, turn off the PHY, clear interrupts, and restart, which
  65. * raises connect interrupt if a cable is connected, or nothing
  66. * if cable is not connected.
  67. */
  68. hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
  69. hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT |
  70. HDMI_IRQ_LINK_DISCONNECT);
  71. hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
  72. } else if (irqstatus & HDMI_IRQ_LINK_CONNECT) {
  73. hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
  74. } else if (irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
  75. hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
  76. }
  77. if (irqstatus & HDMI_IRQ_CORE) {
  78. u32 intr4 = hdmi_read_reg(hdmi->core.base, HDMI_CORE_SYS_INTR4);
  79. hdmi_write_reg(hdmi->core.base, HDMI_CORE_SYS_INTR4, intr4);
  80. if (intr4 & 8)
  81. hdmi4_cec_irq(&hdmi->core);
  82. }
  83. return IRQ_HANDLED;
  84. }
  85. static int hdmi_power_on_core(struct omap_hdmi *hdmi)
  86. {
  87. int r;
  88. if (hdmi->core.core_pwr_cnt++)
  89. return 0;
  90. r = regulator_enable(hdmi->vdda_reg);
  91. if (r)
  92. goto err_reg_enable;
  93. r = hdmi_runtime_get(hdmi);
  94. if (r)
  95. goto err_runtime_get;
  96. hdmi4_core_powerdown_disable(&hdmi->core);
  97. /* Make selection of HDMI in DSS */
  98. dss_select_hdmi_venc_clk_source(hdmi->dss, DSS_HDMI_M_PCLK);
  99. hdmi->core_enabled = true;
  100. return 0;
  101. err_runtime_get:
  102. regulator_disable(hdmi->vdda_reg);
  103. err_reg_enable:
  104. hdmi->core.core_pwr_cnt--;
  105. return r;
  106. }
  107. static void hdmi_power_off_core(struct omap_hdmi *hdmi)
  108. {
  109. if (--hdmi->core.core_pwr_cnt)
  110. return;
  111. hdmi->core_enabled = false;
  112. hdmi_runtime_put(hdmi);
  113. regulator_disable(hdmi->vdda_reg);
  114. }
  115. static int hdmi_power_on_full(struct omap_hdmi *hdmi)
  116. {
  117. int r;
  118. const struct videomode *vm;
  119. struct hdmi_wp_data *wp = &hdmi->wp;
  120. struct dss_pll_clock_info hdmi_cinfo = { 0 };
  121. unsigned int pc;
  122. r = hdmi_power_on_core(hdmi);
  123. if (r)
  124. return r;
  125. /* disable and clear irqs */
  126. hdmi_wp_clear_irqenable(wp, ~HDMI_IRQ_CORE);
  127. hdmi_wp_set_irqstatus(wp, ~HDMI_IRQ_CORE);
  128. vm = &hdmi->cfg.vm;
  129. DSSDBG("hdmi_power_on hactive= %d vactive = %d\n", vm->hactive,
  130. vm->vactive);
  131. pc = vm->pixelclock;
  132. if (vm->flags & DISPLAY_FLAGS_DOUBLECLK)
  133. pc *= 2;
  134. /* DSS_HDMI_TCLK is bitclk / 10 */
  135. pc *= 10;
  136. dss_pll_calc_b(&hdmi->pll.pll, clk_get_rate(hdmi->pll.pll.clkin),
  137. pc, &hdmi_cinfo);
  138. r = dss_pll_enable(&hdmi->pll.pll);
  139. if (r) {
  140. DSSERR("Failed to enable PLL\n");
  141. goto err_pll_enable;
  142. }
  143. r = dss_pll_set_config(&hdmi->pll.pll, &hdmi_cinfo);
  144. if (r) {
  145. DSSERR("Failed to configure PLL\n");
  146. goto err_pll_cfg;
  147. }
  148. r = hdmi_phy_configure(&hdmi->phy, hdmi_cinfo.clkdco,
  149. hdmi_cinfo.clkout[0]);
  150. if (r) {
  151. DSSDBG("Failed to configure PHY\n");
  152. goto err_phy_cfg;
  153. }
  154. r = hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
  155. if (r)
  156. goto err_phy_pwr;
  157. hdmi4_configure(&hdmi->core, &hdmi->wp, &hdmi->cfg);
  158. r = dss_mgr_enable(&hdmi->output);
  159. if (r)
  160. goto err_mgr_enable;
  161. r = hdmi_wp_video_start(&hdmi->wp);
  162. if (r)
  163. goto err_vid_enable;
  164. hdmi_wp_set_irqenable(wp,
  165. HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT);
  166. return 0;
  167. err_vid_enable:
  168. dss_mgr_disable(&hdmi->output);
  169. err_mgr_enable:
  170. hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_OFF);
  171. err_phy_pwr:
  172. err_phy_cfg:
  173. err_pll_cfg:
  174. dss_pll_disable(&hdmi->pll.pll);
  175. err_pll_enable:
  176. hdmi_power_off_core(hdmi);
  177. return -EIO;
  178. }
  179. static void hdmi_power_off_full(struct omap_hdmi *hdmi)
  180. {
  181. hdmi_wp_clear_irqenable(&hdmi->wp, ~HDMI_IRQ_CORE);
  182. hdmi_wp_video_stop(&hdmi->wp);
  183. dss_mgr_disable(&hdmi->output);
  184. hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_OFF);
  185. dss_pll_disable(&hdmi->pll.pll);
  186. hdmi_power_off_core(hdmi);
  187. }
  188. static int hdmi_dump_regs(struct seq_file *s, void *p)
  189. {
  190. struct omap_hdmi *hdmi = s->private;
  191. mutex_lock(&hdmi->lock);
  192. if (hdmi_runtime_get(hdmi)) {
  193. mutex_unlock(&hdmi->lock);
  194. return 0;
  195. }
  196. hdmi_wp_dump(&hdmi->wp, s);
  197. hdmi_pll_dump(&hdmi->pll, s);
  198. hdmi_phy_dump(&hdmi->phy, s);
  199. hdmi4_core_dump(&hdmi->core, s);
  200. hdmi_runtime_put(hdmi);
  201. mutex_unlock(&hdmi->lock);
  202. return 0;
  203. }
  204. static void hdmi_start_audio_stream(struct omap_hdmi *hd)
  205. {
  206. hdmi_wp_audio_enable(&hd->wp, true);
  207. hdmi4_audio_start(&hd->core, &hd->wp);
  208. }
  209. static void hdmi_stop_audio_stream(struct omap_hdmi *hd)
  210. {
  211. hdmi4_audio_stop(&hd->core, &hd->wp);
  212. hdmi_wp_audio_enable(&hd->wp, false);
  213. }
  214. int hdmi4_core_enable(struct hdmi_core_data *core)
  215. {
  216. struct omap_hdmi *hdmi = container_of(core, struct omap_hdmi, core);
  217. int r = 0;
  218. DSSDBG("ENTER omapdss_hdmi4_core_enable\n");
  219. mutex_lock(&hdmi->lock);
  220. r = hdmi_power_on_core(hdmi);
  221. if (r) {
  222. DSSERR("failed to power on device\n");
  223. goto err0;
  224. }
  225. mutex_unlock(&hdmi->lock);
  226. return 0;
  227. err0:
  228. mutex_unlock(&hdmi->lock);
  229. return r;
  230. }
  231. void hdmi4_core_disable(struct hdmi_core_data *core)
  232. {
  233. struct omap_hdmi *hdmi = container_of(core, struct omap_hdmi, core);
  234. DSSDBG("Enter omapdss_hdmi4_core_disable\n");
  235. mutex_lock(&hdmi->lock);
  236. hdmi_power_off_core(hdmi);
  237. mutex_unlock(&hdmi->lock);
  238. }
  239. /* -----------------------------------------------------------------------------
  240. * DRM Bridge Operations
  241. */
  242. static int hdmi4_bridge_attach(struct drm_bridge *bridge,
  243. enum drm_bridge_attach_flags flags)
  244. {
  245. struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
  246. if (!(flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR))
  247. return -EINVAL;
  248. return drm_bridge_attach(bridge->encoder, hdmi->output.next_bridge,
  249. bridge, flags);
  250. }
  251. static void hdmi4_bridge_mode_set(struct drm_bridge *bridge,
  252. const struct drm_display_mode *mode,
  253. const struct drm_display_mode *adjusted_mode)
  254. {
  255. struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
  256. mutex_lock(&hdmi->lock);
  257. drm_display_mode_to_videomode(adjusted_mode, &hdmi->cfg.vm);
  258. dispc_set_tv_pclk(hdmi->dss->dispc, adjusted_mode->clock * 1000);
  259. mutex_unlock(&hdmi->lock);
  260. }
  261. static void hdmi4_bridge_enable(struct drm_bridge *bridge,
  262. struct drm_bridge_state *bridge_state)
  263. {
  264. struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
  265. struct drm_atomic_state *state = bridge_state->base.state;
  266. struct drm_connector_state *conn_state;
  267. struct drm_connector *connector;
  268. struct drm_crtc_state *crtc_state;
  269. unsigned long flags;
  270. int ret;
  271. /*
  272. * None of these should fail, as the bridge can't be enabled without a
  273. * valid CRTC to connector path with fully populated new states.
  274. */
  275. connector = drm_atomic_get_new_connector_for_encoder(state,
  276. bridge->encoder);
  277. if (WARN_ON(!connector))
  278. return;
  279. conn_state = drm_atomic_get_new_connector_state(state, connector);
  280. if (WARN_ON(!conn_state))
  281. return;
  282. crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);
  283. if (WARN_ON(!crtc_state))
  284. return;
  285. hdmi->cfg.hdmi_dvi_mode = connector->display_info.is_hdmi
  286. ? HDMI_HDMI : HDMI_DVI;
  287. if (connector->display_info.is_hdmi) {
  288. const struct drm_display_mode *mode;
  289. struct hdmi_avi_infoframe avi;
  290. mode = &crtc_state->adjusted_mode;
  291. ret = drm_hdmi_avi_infoframe_from_display_mode(&avi, connector,
  292. mode);
  293. if (ret == 0)
  294. hdmi->cfg.infoframe = avi;
  295. }
  296. mutex_lock(&hdmi->lock);
  297. ret = hdmi_power_on_full(hdmi);
  298. if (ret) {
  299. DSSERR("failed to power on device\n");
  300. goto done;
  301. }
  302. if (hdmi->audio_configured) {
  303. ret = hdmi4_audio_config(&hdmi->core, &hdmi->wp,
  304. &hdmi->audio_config,
  305. hdmi->cfg.vm.pixelclock);
  306. if (ret) {
  307. DSSERR("Error restoring audio configuration: %d", ret);
  308. hdmi->audio_abort_cb(&hdmi->pdev->dev);
  309. hdmi->audio_configured = false;
  310. }
  311. }
  312. spin_lock_irqsave(&hdmi->audio_playing_lock, flags);
  313. if (hdmi->audio_configured && hdmi->audio_playing)
  314. hdmi_start_audio_stream(hdmi);
  315. hdmi->display_enabled = true;
  316. spin_unlock_irqrestore(&hdmi->audio_playing_lock, flags);
  317. done:
  318. mutex_unlock(&hdmi->lock);
  319. }
  320. static void hdmi4_bridge_disable(struct drm_bridge *bridge,
  321. struct drm_bridge_state *bridge_state)
  322. {
  323. struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
  324. unsigned long flags;
  325. mutex_lock(&hdmi->lock);
  326. spin_lock_irqsave(&hdmi->audio_playing_lock, flags);
  327. hdmi_stop_audio_stream(hdmi);
  328. hdmi->display_enabled = false;
  329. spin_unlock_irqrestore(&hdmi->audio_playing_lock, flags);
  330. hdmi_power_off_full(hdmi);
  331. mutex_unlock(&hdmi->lock);
  332. }
  333. static void hdmi4_bridge_hpd_notify(struct drm_bridge *bridge,
  334. enum drm_connector_status status)
  335. {
  336. struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
  337. if (status == connector_status_disconnected)
  338. hdmi4_cec_set_phys_addr(&hdmi->core, CEC_PHYS_ADDR_INVALID);
  339. }
  340. static struct edid *hdmi4_bridge_get_edid(struct drm_bridge *bridge,
  341. struct drm_connector *connector)
  342. {
  343. struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
  344. struct edid *edid = NULL;
  345. unsigned int cec_addr;
  346. bool need_enable;
  347. int r;
  348. need_enable = hdmi->core_enabled == false;
  349. if (need_enable) {
  350. r = hdmi4_core_enable(&hdmi->core);
  351. if (r)
  352. return NULL;
  353. }
  354. mutex_lock(&hdmi->lock);
  355. r = hdmi_runtime_get(hdmi);
  356. BUG_ON(r);
  357. r = hdmi4_core_ddc_init(&hdmi->core);
  358. if (r)
  359. goto done;
  360. edid = drm_do_get_edid(connector, hdmi4_core_ddc_read, &hdmi->core);
  361. done:
  362. hdmi_runtime_put(hdmi);
  363. mutex_unlock(&hdmi->lock);
  364. if (edid && edid->extensions) {
  365. unsigned int len = (edid->extensions + 1) * EDID_LENGTH;
  366. cec_addr = cec_get_edid_phys_addr((u8 *)edid, len, NULL);
  367. } else {
  368. cec_addr = CEC_PHYS_ADDR_INVALID;
  369. }
  370. hdmi4_cec_set_phys_addr(&hdmi->core, cec_addr);
  371. if (need_enable)
  372. hdmi4_core_disable(&hdmi->core);
  373. return edid;
  374. }
  375. static const struct drm_bridge_funcs hdmi4_bridge_funcs = {
  376. .attach = hdmi4_bridge_attach,
  377. .mode_set = hdmi4_bridge_mode_set,
  378. .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state,
  379. .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,
  380. .atomic_reset = drm_atomic_helper_bridge_reset,
  381. .atomic_enable = hdmi4_bridge_enable,
  382. .atomic_disable = hdmi4_bridge_disable,
  383. .hpd_notify = hdmi4_bridge_hpd_notify,
  384. .get_edid = hdmi4_bridge_get_edid,
  385. };
  386. static void hdmi4_bridge_init(struct omap_hdmi *hdmi)
  387. {
  388. hdmi->bridge.funcs = &hdmi4_bridge_funcs;
  389. hdmi->bridge.of_node = hdmi->pdev->dev.of_node;
  390. hdmi->bridge.ops = DRM_BRIDGE_OP_EDID;
  391. hdmi->bridge.type = DRM_MODE_CONNECTOR_HDMIA;
  392. drm_bridge_add(&hdmi->bridge);
  393. }
  394. static void hdmi4_bridge_cleanup(struct omap_hdmi *hdmi)
  395. {
  396. drm_bridge_remove(&hdmi->bridge);
  397. }
  398. /* -----------------------------------------------------------------------------
  399. * Audio Callbacks
  400. */
  401. static int hdmi_audio_startup(struct device *dev,
  402. void (*abort_cb)(struct device *dev))
  403. {
  404. struct omap_hdmi *hd = dev_get_drvdata(dev);
  405. mutex_lock(&hd->lock);
  406. WARN_ON(hd->audio_abort_cb != NULL);
  407. hd->audio_abort_cb = abort_cb;
  408. mutex_unlock(&hd->lock);
  409. return 0;
  410. }
  411. static int hdmi_audio_shutdown(struct device *dev)
  412. {
  413. struct omap_hdmi *hd = dev_get_drvdata(dev);
  414. mutex_lock(&hd->lock);
  415. hd->audio_abort_cb = NULL;
  416. hd->audio_configured = false;
  417. hd->audio_playing = false;
  418. mutex_unlock(&hd->lock);
  419. return 0;
  420. }
  421. static int hdmi_audio_start(struct device *dev)
  422. {
  423. struct omap_hdmi *hd = dev_get_drvdata(dev);
  424. unsigned long flags;
  425. spin_lock_irqsave(&hd->audio_playing_lock, flags);
  426. if (hd->display_enabled) {
  427. if (!hdmi_mode_has_audio(&hd->cfg))
  428. DSSERR("%s: Video mode does not support audio\n",
  429. __func__);
  430. hdmi_start_audio_stream(hd);
  431. }
  432. hd->audio_playing = true;
  433. spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
  434. return 0;
  435. }
  436. static void hdmi_audio_stop(struct device *dev)
  437. {
  438. struct omap_hdmi *hd = dev_get_drvdata(dev);
  439. unsigned long flags;
  440. WARN_ON(!hdmi_mode_has_audio(&hd->cfg));
  441. spin_lock_irqsave(&hd->audio_playing_lock, flags);
  442. if (hd->display_enabled)
  443. hdmi_stop_audio_stream(hd);
  444. hd->audio_playing = false;
  445. spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
  446. }
  447. static int hdmi_audio_config(struct device *dev,
  448. struct omap_dss_audio *dss_audio)
  449. {
  450. struct omap_hdmi *hd = dev_get_drvdata(dev);
  451. int ret = 0;
  452. mutex_lock(&hd->lock);
  453. if (hd->display_enabled) {
  454. ret = hdmi4_audio_config(&hd->core, &hd->wp, dss_audio,
  455. hd->cfg.vm.pixelclock);
  456. if (ret)
  457. goto out;
  458. }
  459. hd->audio_configured = true;
  460. hd->audio_config = *dss_audio;
  461. out:
  462. mutex_unlock(&hd->lock);
  463. return ret;
  464. }
  465. static const struct omap_hdmi_audio_ops hdmi_audio_ops = {
  466. .audio_startup = hdmi_audio_startup,
  467. .audio_shutdown = hdmi_audio_shutdown,
  468. .audio_start = hdmi_audio_start,
  469. .audio_stop = hdmi_audio_stop,
  470. .audio_config = hdmi_audio_config,
  471. };
  472. static int hdmi_audio_register(struct omap_hdmi *hdmi)
  473. {
  474. struct omap_hdmi_audio_pdata pdata = {
  475. .dev = &hdmi->pdev->dev,
  476. .version = 4,
  477. .audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi->wp),
  478. .ops = &hdmi_audio_ops,
  479. };
  480. hdmi->audio_pdev = platform_device_register_data(
  481. &hdmi->pdev->dev, "omap-hdmi-audio", PLATFORM_DEVID_AUTO,
  482. &pdata, sizeof(pdata));
  483. if (IS_ERR(hdmi->audio_pdev))
  484. return PTR_ERR(hdmi->audio_pdev);
  485. return 0;
  486. }
  487. /* -----------------------------------------------------------------------------
  488. * Component Bind & Unbind
  489. */
  490. static int hdmi4_bind(struct device *dev, struct device *master, void *data)
  491. {
  492. struct dss_device *dss = dss_get_device(master);
  493. struct omap_hdmi *hdmi = dev_get_drvdata(dev);
  494. int r;
  495. hdmi->dss = dss;
  496. r = hdmi_runtime_get(hdmi);
  497. if (r)
  498. return r;
  499. r = hdmi_pll_init(dss, hdmi->pdev, &hdmi->pll, &hdmi->wp);
  500. if (r)
  501. goto err_runtime_put;
  502. r = hdmi4_cec_init(hdmi->pdev, &hdmi->core, &hdmi->wp);
  503. if (r)
  504. goto err_pll_uninit;
  505. r = hdmi_audio_register(hdmi);
  506. if (r) {
  507. DSSERR("Registering HDMI audio failed\n");
  508. goto err_cec_uninit;
  509. }
  510. hdmi->debugfs = dss_debugfs_create_file(dss, "hdmi", hdmi_dump_regs,
  511. hdmi);
  512. hdmi_runtime_put(hdmi);
  513. return 0;
  514. err_cec_uninit:
  515. hdmi4_cec_uninit(&hdmi->core);
  516. err_pll_uninit:
  517. hdmi_pll_uninit(&hdmi->pll);
  518. err_runtime_put:
  519. hdmi_runtime_put(hdmi);
  520. return r;
  521. }
  522. static void hdmi4_unbind(struct device *dev, struct device *master, void *data)
  523. {
  524. struct omap_hdmi *hdmi = dev_get_drvdata(dev);
  525. dss_debugfs_remove_file(hdmi->debugfs);
  526. if (hdmi->audio_pdev)
  527. platform_device_unregister(hdmi->audio_pdev);
  528. hdmi4_cec_uninit(&hdmi->core);
  529. hdmi_pll_uninit(&hdmi->pll);
  530. }
  531. static const struct component_ops hdmi4_component_ops = {
  532. .bind = hdmi4_bind,
  533. .unbind = hdmi4_unbind,
  534. };
  535. /* -----------------------------------------------------------------------------
  536. * Probe & Remove, Suspend & Resume
  537. */
  538. static int hdmi4_init_output(struct omap_hdmi *hdmi)
  539. {
  540. struct omap_dss_device *out = &hdmi->output;
  541. int r;
  542. hdmi4_bridge_init(hdmi);
  543. out->dev = &hdmi->pdev->dev;
  544. out->id = OMAP_DSS_OUTPUT_HDMI;
  545. out->type = OMAP_DISPLAY_TYPE_HDMI;
  546. out->name = "hdmi.0";
  547. out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT;
  548. out->of_port = 0;
  549. r = omapdss_device_init_output(out, &hdmi->bridge);
  550. if (r < 0) {
  551. hdmi4_bridge_cleanup(hdmi);
  552. return r;
  553. }
  554. omapdss_device_register(out);
  555. return 0;
  556. }
  557. static void hdmi4_uninit_output(struct omap_hdmi *hdmi)
  558. {
  559. struct omap_dss_device *out = &hdmi->output;
  560. omapdss_device_unregister(out);
  561. omapdss_device_cleanup_output(out);
  562. hdmi4_bridge_cleanup(hdmi);
  563. }
  564. static int hdmi4_probe_of(struct omap_hdmi *hdmi)
  565. {
  566. struct platform_device *pdev = hdmi->pdev;
  567. struct device_node *node = pdev->dev.of_node;
  568. struct device_node *ep;
  569. int r;
  570. ep = of_graph_get_endpoint_by_regs(node, 0, 0);
  571. if (!ep)
  572. return 0;
  573. r = hdmi_parse_lanes_of(pdev, ep, &hdmi->phy);
  574. of_node_put(ep);
  575. return r;
  576. }
  577. static int hdmi4_probe(struct platform_device *pdev)
  578. {
  579. struct omap_hdmi *hdmi;
  580. int irq;
  581. int r;
  582. hdmi = kzalloc(sizeof(*hdmi), GFP_KERNEL);
  583. if (!hdmi)
  584. return -ENOMEM;
  585. hdmi->pdev = pdev;
  586. dev_set_drvdata(&pdev->dev, hdmi);
  587. mutex_init(&hdmi->lock);
  588. spin_lock_init(&hdmi->audio_playing_lock);
  589. r = hdmi4_probe_of(hdmi);
  590. if (r)
  591. goto err_free;
  592. r = hdmi_wp_init(pdev, &hdmi->wp, 4);
  593. if (r)
  594. goto err_free;
  595. r = hdmi_phy_init(pdev, &hdmi->phy, 4);
  596. if (r)
  597. goto err_free;
  598. r = hdmi4_core_init(pdev, &hdmi->core);
  599. if (r)
  600. goto err_free;
  601. irq = platform_get_irq(pdev, 0);
  602. if (irq < 0) {
  603. DSSERR("platform_get_irq failed\n");
  604. r = -ENODEV;
  605. goto err_free;
  606. }
  607. r = devm_request_threaded_irq(&pdev->dev, irq,
  608. NULL, hdmi_irq_handler,
  609. IRQF_ONESHOT, "OMAP HDMI", hdmi);
  610. if (r) {
  611. DSSERR("HDMI IRQ request failed\n");
  612. goto err_free;
  613. }
  614. hdmi->vdda_reg = devm_regulator_get(&pdev->dev, "vdda");
  615. if (IS_ERR(hdmi->vdda_reg)) {
  616. r = PTR_ERR(hdmi->vdda_reg);
  617. if (r != -EPROBE_DEFER)
  618. DSSERR("can't get VDDA regulator\n");
  619. goto err_free;
  620. }
  621. pm_runtime_enable(&pdev->dev);
  622. r = hdmi4_init_output(hdmi);
  623. if (r)
  624. goto err_pm_disable;
  625. r = component_add(&pdev->dev, &hdmi4_component_ops);
  626. if (r)
  627. goto err_uninit_output;
  628. return 0;
  629. err_uninit_output:
  630. hdmi4_uninit_output(hdmi);
  631. err_pm_disable:
  632. pm_runtime_disable(&pdev->dev);
  633. err_free:
  634. kfree(hdmi);
  635. return r;
  636. }
  637. static int hdmi4_remove(struct platform_device *pdev)
  638. {
  639. struct omap_hdmi *hdmi = platform_get_drvdata(pdev);
  640. component_del(&pdev->dev, &hdmi4_component_ops);
  641. hdmi4_uninit_output(hdmi);
  642. pm_runtime_disable(&pdev->dev);
  643. kfree(hdmi);
  644. return 0;
  645. }
  646. static const struct of_device_id hdmi_of_match[] = {
  647. { .compatible = "ti,omap4-hdmi", },
  648. {},
  649. };
  650. struct platform_driver omapdss_hdmi4hw_driver = {
  651. .probe = hdmi4_probe,
  652. .remove = hdmi4_remove,
  653. .driver = {
  654. .name = "omapdss_hdmi",
  655. .of_match_table = hdmi_of_match,
  656. .suppress_bind_attrs = true,
  657. },
  658. };