nouveau_dmem.c 20 KB

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  1. /*
  2. * Copyright 2018 Red Hat Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. */
  22. #include "nouveau_dmem.h"
  23. #include "nouveau_drv.h"
  24. #include "nouveau_chan.h"
  25. #include "nouveau_dma.h"
  26. #include "nouveau_mem.h"
  27. #include "nouveau_bo.h"
  28. #include "nouveau_svm.h"
  29. #include <nvif/class.h>
  30. #include <nvif/object.h>
  31. #include <nvif/push906f.h>
  32. #include <nvif/if000c.h>
  33. #include <nvif/if500b.h>
  34. #include <nvif/if900b.h>
  35. #include <nvif/if000c.h>
  36. #include <nvhw/class/cla0b5.h>
  37. #include <linux/sched/mm.h>
  38. #include <linux/hmm.h>
  39. #include <linux/memremap.h>
  40. #include <linux/migrate.h>
  41. /*
  42. * FIXME: this is ugly right now we are using TTM to allocate vram and we pin
  43. * it in vram while in use. We likely want to overhaul memory management for
  44. * nouveau to be more page like (not necessarily with system page size but a
  45. * bigger page size) at lowest level and have some shim layer on top that would
  46. * provide the same functionality as TTM.
  47. */
  48. #define DMEM_CHUNK_SIZE (2UL << 20)
  49. #define DMEM_CHUNK_NPAGES (DMEM_CHUNK_SIZE >> PAGE_SHIFT)
  50. enum nouveau_aper {
  51. NOUVEAU_APER_VIRT,
  52. NOUVEAU_APER_VRAM,
  53. NOUVEAU_APER_HOST,
  54. };
  55. typedef int (*nouveau_migrate_copy_t)(struct nouveau_drm *drm, u64 npages,
  56. enum nouveau_aper, u64 dst_addr,
  57. enum nouveau_aper, u64 src_addr);
  58. typedef int (*nouveau_clear_page_t)(struct nouveau_drm *drm, u32 length,
  59. enum nouveau_aper, u64 dst_addr);
  60. struct nouveau_dmem_chunk {
  61. struct list_head list;
  62. struct nouveau_bo *bo;
  63. struct nouveau_drm *drm;
  64. unsigned long callocated;
  65. struct dev_pagemap pagemap;
  66. };
  67. struct nouveau_dmem_migrate {
  68. nouveau_migrate_copy_t copy_func;
  69. nouveau_clear_page_t clear_func;
  70. struct nouveau_channel *chan;
  71. };
  72. struct nouveau_dmem {
  73. struct nouveau_drm *drm;
  74. struct nouveau_dmem_migrate migrate;
  75. struct list_head chunks;
  76. struct mutex mutex;
  77. struct page *free_pages;
  78. spinlock_t lock;
  79. };
  80. static struct nouveau_dmem_chunk *nouveau_page_to_chunk(struct page *page)
  81. {
  82. return container_of(page->pgmap, struct nouveau_dmem_chunk, pagemap);
  83. }
  84. static struct nouveau_drm *page_to_drm(struct page *page)
  85. {
  86. struct nouveau_dmem_chunk *chunk = nouveau_page_to_chunk(page);
  87. return chunk->drm;
  88. }
  89. unsigned long nouveau_dmem_page_addr(struct page *page)
  90. {
  91. struct nouveau_dmem_chunk *chunk = nouveau_page_to_chunk(page);
  92. unsigned long off = (page_to_pfn(page) << PAGE_SHIFT) -
  93. chunk->pagemap.range.start;
  94. return chunk->bo->offset + off;
  95. }
  96. static void nouveau_dmem_page_free(struct page *page)
  97. {
  98. struct nouveau_dmem_chunk *chunk = nouveau_page_to_chunk(page);
  99. struct nouveau_dmem *dmem = chunk->drm->dmem;
  100. spin_lock(&dmem->lock);
  101. page->zone_device_data = dmem->free_pages;
  102. dmem->free_pages = page;
  103. WARN_ON(!chunk->callocated);
  104. chunk->callocated--;
  105. /*
  106. * FIXME when chunk->callocated reach 0 we should add the chunk to
  107. * a reclaim list so that it can be freed in case of memory pressure.
  108. */
  109. spin_unlock(&dmem->lock);
  110. }
  111. static void nouveau_dmem_fence_done(struct nouveau_fence **fence)
  112. {
  113. if (fence) {
  114. nouveau_fence_wait(*fence, true, false);
  115. nouveau_fence_unref(fence);
  116. } else {
  117. /*
  118. * FIXME wait for channel to be IDLE before calling finalizing
  119. * the hmem object.
  120. */
  121. }
  122. }
  123. static int nouveau_dmem_copy_one(struct nouveau_drm *drm, struct page *spage,
  124. struct page *dpage, dma_addr_t *dma_addr)
  125. {
  126. struct device *dev = drm->dev->dev;
  127. lock_page(dpage);
  128. *dma_addr = dma_map_page(dev, dpage, 0, PAGE_SIZE, DMA_BIDIRECTIONAL);
  129. if (dma_mapping_error(dev, *dma_addr))
  130. return -EIO;
  131. if (drm->dmem->migrate.copy_func(drm, 1, NOUVEAU_APER_HOST, *dma_addr,
  132. NOUVEAU_APER_VRAM, nouveau_dmem_page_addr(spage))) {
  133. dma_unmap_page(dev, *dma_addr, PAGE_SIZE, DMA_BIDIRECTIONAL);
  134. return -EIO;
  135. }
  136. return 0;
  137. }
  138. static vm_fault_t nouveau_dmem_migrate_to_ram(struct vm_fault *vmf)
  139. {
  140. struct nouveau_drm *drm = page_to_drm(vmf->page);
  141. struct nouveau_dmem *dmem = drm->dmem;
  142. struct nouveau_fence *fence;
  143. struct nouveau_svmm *svmm;
  144. struct page *spage, *dpage;
  145. unsigned long src = 0, dst = 0;
  146. dma_addr_t dma_addr = 0;
  147. vm_fault_t ret = 0;
  148. struct migrate_vma args = {
  149. .vma = vmf->vma,
  150. .start = vmf->address,
  151. .end = vmf->address + PAGE_SIZE,
  152. .src = &src,
  153. .dst = &dst,
  154. .pgmap_owner = drm->dev,
  155. .fault_page = vmf->page,
  156. .flags = MIGRATE_VMA_SELECT_DEVICE_PRIVATE,
  157. };
  158. /*
  159. * FIXME what we really want is to find some heuristic to migrate more
  160. * than just one page on CPU fault. When such fault happens it is very
  161. * likely that more surrounding page will CPU fault too.
  162. */
  163. if (migrate_vma_setup(&args) < 0)
  164. return VM_FAULT_SIGBUS;
  165. if (!args.cpages)
  166. return 0;
  167. spage = migrate_pfn_to_page(src);
  168. if (!spage || !(src & MIGRATE_PFN_MIGRATE))
  169. goto done;
  170. dpage = alloc_page_vma(GFP_HIGHUSER, vmf->vma, vmf->address);
  171. if (!dpage)
  172. goto done;
  173. dst = migrate_pfn(page_to_pfn(dpage));
  174. svmm = spage->zone_device_data;
  175. mutex_lock(&svmm->mutex);
  176. nouveau_svmm_invalidate(svmm, args.start, args.end);
  177. ret = nouveau_dmem_copy_one(drm, spage, dpage, &dma_addr);
  178. mutex_unlock(&svmm->mutex);
  179. if (ret) {
  180. ret = VM_FAULT_SIGBUS;
  181. goto done;
  182. }
  183. nouveau_fence_new(dmem->migrate.chan, false, &fence);
  184. migrate_vma_pages(&args);
  185. nouveau_dmem_fence_done(&fence);
  186. dma_unmap_page(drm->dev->dev, dma_addr, PAGE_SIZE, DMA_BIDIRECTIONAL);
  187. done:
  188. migrate_vma_finalize(&args);
  189. return ret;
  190. }
  191. static const struct dev_pagemap_ops nouveau_dmem_pagemap_ops = {
  192. .page_free = nouveau_dmem_page_free,
  193. .migrate_to_ram = nouveau_dmem_migrate_to_ram,
  194. };
  195. static int
  196. nouveau_dmem_chunk_alloc(struct nouveau_drm *drm, struct page **ppage)
  197. {
  198. struct nouveau_dmem_chunk *chunk;
  199. struct resource *res;
  200. struct page *page;
  201. void *ptr;
  202. unsigned long i, pfn_first;
  203. int ret;
  204. chunk = kzalloc(sizeof(*chunk), GFP_KERNEL);
  205. if (chunk == NULL) {
  206. ret = -ENOMEM;
  207. goto out;
  208. }
  209. /* Allocate unused physical address space for device private pages. */
  210. res = request_free_mem_region(&iomem_resource, DMEM_CHUNK_SIZE,
  211. "nouveau_dmem");
  212. if (IS_ERR(res)) {
  213. ret = PTR_ERR(res);
  214. goto out_free;
  215. }
  216. chunk->drm = drm;
  217. chunk->pagemap.type = MEMORY_DEVICE_PRIVATE;
  218. chunk->pagemap.range.start = res->start;
  219. chunk->pagemap.range.end = res->end;
  220. chunk->pagemap.nr_range = 1;
  221. chunk->pagemap.ops = &nouveau_dmem_pagemap_ops;
  222. chunk->pagemap.owner = drm->dev;
  223. ret = nouveau_bo_new(&drm->client, DMEM_CHUNK_SIZE, 0,
  224. NOUVEAU_GEM_DOMAIN_VRAM, 0, 0, NULL, NULL,
  225. &chunk->bo);
  226. if (ret)
  227. goto out_release;
  228. ret = nouveau_bo_pin(chunk->bo, NOUVEAU_GEM_DOMAIN_VRAM, false);
  229. if (ret)
  230. goto out_bo_free;
  231. ptr = memremap_pages(&chunk->pagemap, numa_node_id());
  232. if (IS_ERR(ptr)) {
  233. ret = PTR_ERR(ptr);
  234. goto out_bo_unpin;
  235. }
  236. mutex_lock(&drm->dmem->mutex);
  237. list_add(&chunk->list, &drm->dmem->chunks);
  238. mutex_unlock(&drm->dmem->mutex);
  239. pfn_first = chunk->pagemap.range.start >> PAGE_SHIFT;
  240. page = pfn_to_page(pfn_first);
  241. spin_lock(&drm->dmem->lock);
  242. for (i = 0; i < DMEM_CHUNK_NPAGES - 1; ++i, ++page) {
  243. page->zone_device_data = drm->dmem->free_pages;
  244. drm->dmem->free_pages = page;
  245. }
  246. *ppage = page;
  247. chunk->callocated++;
  248. spin_unlock(&drm->dmem->lock);
  249. NV_INFO(drm, "DMEM: registered %ldMB of device memory\n",
  250. DMEM_CHUNK_SIZE >> 20);
  251. return 0;
  252. out_bo_unpin:
  253. nouveau_bo_unpin(chunk->bo);
  254. out_bo_free:
  255. nouveau_bo_ref(NULL, &chunk->bo);
  256. out_release:
  257. release_mem_region(chunk->pagemap.range.start, range_len(&chunk->pagemap.range));
  258. out_free:
  259. kfree(chunk);
  260. out:
  261. return ret;
  262. }
  263. static struct page *
  264. nouveau_dmem_page_alloc_locked(struct nouveau_drm *drm)
  265. {
  266. struct nouveau_dmem_chunk *chunk;
  267. struct page *page = NULL;
  268. int ret;
  269. spin_lock(&drm->dmem->lock);
  270. if (drm->dmem->free_pages) {
  271. page = drm->dmem->free_pages;
  272. drm->dmem->free_pages = page->zone_device_data;
  273. chunk = nouveau_page_to_chunk(page);
  274. chunk->callocated++;
  275. spin_unlock(&drm->dmem->lock);
  276. } else {
  277. spin_unlock(&drm->dmem->lock);
  278. ret = nouveau_dmem_chunk_alloc(drm, &page);
  279. if (ret)
  280. return NULL;
  281. }
  282. zone_device_page_init(page);
  283. return page;
  284. }
  285. static void
  286. nouveau_dmem_page_free_locked(struct nouveau_drm *drm, struct page *page)
  287. {
  288. unlock_page(page);
  289. put_page(page);
  290. }
  291. void
  292. nouveau_dmem_resume(struct nouveau_drm *drm)
  293. {
  294. struct nouveau_dmem_chunk *chunk;
  295. int ret;
  296. if (drm->dmem == NULL)
  297. return;
  298. mutex_lock(&drm->dmem->mutex);
  299. list_for_each_entry(chunk, &drm->dmem->chunks, list) {
  300. ret = nouveau_bo_pin(chunk->bo, NOUVEAU_GEM_DOMAIN_VRAM, false);
  301. /* FIXME handle pin failure */
  302. WARN_ON(ret);
  303. }
  304. mutex_unlock(&drm->dmem->mutex);
  305. }
  306. void
  307. nouveau_dmem_suspend(struct nouveau_drm *drm)
  308. {
  309. struct nouveau_dmem_chunk *chunk;
  310. if (drm->dmem == NULL)
  311. return;
  312. mutex_lock(&drm->dmem->mutex);
  313. list_for_each_entry(chunk, &drm->dmem->chunks, list)
  314. nouveau_bo_unpin(chunk->bo);
  315. mutex_unlock(&drm->dmem->mutex);
  316. }
  317. /*
  318. * Evict all pages mapping a chunk.
  319. */
  320. static void
  321. nouveau_dmem_evict_chunk(struct nouveau_dmem_chunk *chunk)
  322. {
  323. unsigned long i, npages = range_len(&chunk->pagemap.range) >> PAGE_SHIFT;
  324. unsigned long *src_pfns, *dst_pfns;
  325. dma_addr_t *dma_addrs;
  326. struct nouveau_fence *fence;
  327. src_pfns = kcalloc(npages, sizeof(*src_pfns), GFP_KERNEL);
  328. dst_pfns = kcalloc(npages, sizeof(*dst_pfns), GFP_KERNEL);
  329. dma_addrs = kcalloc(npages, sizeof(*dma_addrs), GFP_KERNEL);
  330. migrate_device_range(src_pfns, chunk->pagemap.range.start >> PAGE_SHIFT,
  331. npages);
  332. for (i = 0; i < npages; i++) {
  333. if (src_pfns[i] & MIGRATE_PFN_MIGRATE) {
  334. struct page *dpage;
  335. /*
  336. * _GFP_NOFAIL because the GPU is going away and there
  337. * is nothing sensible we can do if we can't copy the
  338. * data back.
  339. */
  340. dpage = alloc_page(GFP_HIGHUSER | __GFP_NOFAIL);
  341. dst_pfns[i] = migrate_pfn(page_to_pfn(dpage));
  342. nouveau_dmem_copy_one(chunk->drm,
  343. migrate_pfn_to_page(src_pfns[i]), dpage,
  344. &dma_addrs[i]);
  345. }
  346. }
  347. nouveau_fence_new(chunk->drm->dmem->migrate.chan, false, &fence);
  348. migrate_device_pages(src_pfns, dst_pfns, npages);
  349. nouveau_dmem_fence_done(&fence);
  350. migrate_device_finalize(src_pfns, dst_pfns, npages);
  351. kfree(src_pfns);
  352. kfree(dst_pfns);
  353. for (i = 0; i < npages; i++)
  354. dma_unmap_page(chunk->drm->dev->dev, dma_addrs[i], PAGE_SIZE, DMA_BIDIRECTIONAL);
  355. kfree(dma_addrs);
  356. }
  357. void
  358. nouveau_dmem_fini(struct nouveau_drm *drm)
  359. {
  360. struct nouveau_dmem_chunk *chunk, *tmp;
  361. if (drm->dmem == NULL)
  362. return;
  363. mutex_lock(&drm->dmem->mutex);
  364. list_for_each_entry_safe(chunk, tmp, &drm->dmem->chunks, list) {
  365. nouveau_dmem_evict_chunk(chunk);
  366. nouveau_bo_unpin(chunk->bo);
  367. nouveau_bo_ref(NULL, &chunk->bo);
  368. WARN_ON(chunk->callocated);
  369. list_del(&chunk->list);
  370. memunmap_pages(&chunk->pagemap);
  371. release_mem_region(chunk->pagemap.range.start,
  372. range_len(&chunk->pagemap.range));
  373. kfree(chunk);
  374. }
  375. mutex_unlock(&drm->dmem->mutex);
  376. }
  377. static int
  378. nvc0b5_migrate_copy(struct nouveau_drm *drm, u64 npages,
  379. enum nouveau_aper dst_aper, u64 dst_addr,
  380. enum nouveau_aper src_aper, u64 src_addr)
  381. {
  382. struct nvif_push *push = drm->dmem->migrate.chan->chan.push;
  383. u32 launch_dma = 0;
  384. int ret;
  385. ret = PUSH_WAIT(push, 13);
  386. if (ret)
  387. return ret;
  388. if (src_aper != NOUVEAU_APER_VIRT) {
  389. switch (src_aper) {
  390. case NOUVEAU_APER_VRAM:
  391. PUSH_IMMD(push, NVA0B5, SET_SRC_PHYS_MODE,
  392. NVDEF(NVA0B5, SET_SRC_PHYS_MODE, TARGET, LOCAL_FB));
  393. break;
  394. case NOUVEAU_APER_HOST:
  395. PUSH_IMMD(push, NVA0B5, SET_SRC_PHYS_MODE,
  396. NVDEF(NVA0B5, SET_SRC_PHYS_MODE, TARGET, COHERENT_SYSMEM));
  397. break;
  398. default:
  399. return -EINVAL;
  400. }
  401. launch_dma |= NVDEF(NVA0B5, LAUNCH_DMA, SRC_TYPE, PHYSICAL);
  402. }
  403. if (dst_aper != NOUVEAU_APER_VIRT) {
  404. switch (dst_aper) {
  405. case NOUVEAU_APER_VRAM:
  406. PUSH_IMMD(push, NVA0B5, SET_DST_PHYS_MODE,
  407. NVDEF(NVA0B5, SET_DST_PHYS_MODE, TARGET, LOCAL_FB));
  408. break;
  409. case NOUVEAU_APER_HOST:
  410. PUSH_IMMD(push, NVA0B5, SET_DST_PHYS_MODE,
  411. NVDEF(NVA0B5, SET_DST_PHYS_MODE, TARGET, COHERENT_SYSMEM));
  412. break;
  413. default:
  414. return -EINVAL;
  415. }
  416. launch_dma |= NVDEF(NVA0B5, LAUNCH_DMA, DST_TYPE, PHYSICAL);
  417. }
  418. PUSH_MTHD(push, NVA0B5, OFFSET_IN_UPPER,
  419. NVVAL(NVA0B5, OFFSET_IN_UPPER, UPPER, upper_32_bits(src_addr)),
  420. OFFSET_IN_LOWER, lower_32_bits(src_addr),
  421. OFFSET_OUT_UPPER,
  422. NVVAL(NVA0B5, OFFSET_OUT_UPPER, UPPER, upper_32_bits(dst_addr)),
  423. OFFSET_OUT_LOWER, lower_32_bits(dst_addr),
  424. PITCH_IN, PAGE_SIZE,
  425. PITCH_OUT, PAGE_SIZE,
  426. LINE_LENGTH_IN, PAGE_SIZE,
  427. LINE_COUNT, npages);
  428. PUSH_MTHD(push, NVA0B5, LAUNCH_DMA, launch_dma |
  429. NVDEF(NVA0B5, LAUNCH_DMA, DATA_TRANSFER_TYPE, NON_PIPELINED) |
  430. NVDEF(NVA0B5, LAUNCH_DMA, FLUSH_ENABLE, TRUE) |
  431. NVDEF(NVA0B5, LAUNCH_DMA, SEMAPHORE_TYPE, NONE) |
  432. NVDEF(NVA0B5, LAUNCH_DMA, INTERRUPT_TYPE, NONE) |
  433. NVDEF(NVA0B5, LAUNCH_DMA, SRC_MEMORY_LAYOUT, PITCH) |
  434. NVDEF(NVA0B5, LAUNCH_DMA, DST_MEMORY_LAYOUT, PITCH) |
  435. NVDEF(NVA0B5, LAUNCH_DMA, MULTI_LINE_ENABLE, TRUE) |
  436. NVDEF(NVA0B5, LAUNCH_DMA, REMAP_ENABLE, FALSE) |
  437. NVDEF(NVA0B5, LAUNCH_DMA, BYPASS_L2, USE_PTE_SETTING));
  438. return 0;
  439. }
  440. static int
  441. nvc0b5_migrate_clear(struct nouveau_drm *drm, u32 length,
  442. enum nouveau_aper dst_aper, u64 dst_addr)
  443. {
  444. struct nvif_push *push = drm->dmem->migrate.chan->chan.push;
  445. u32 launch_dma = 0;
  446. int ret;
  447. ret = PUSH_WAIT(push, 12);
  448. if (ret)
  449. return ret;
  450. switch (dst_aper) {
  451. case NOUVEAU_APER_VRAM:
  452. PUSH_IMMD(push, NVA0B5, SET_DST_PHYS_MODE,
  453. NVDEF(NVA0B5, SET_DST_PHYS_MODE, TARGET, LOCAL_FB));
  454. break;
  455. case NOUVEAU_APER_HOST:
  456. PUSH_IMMD(push, NVA0B5, SET_DST_PHYS_MODE,
  457. NVDEF(NVA0B5, SET_DST_PHYS_MODE, TARGET, COHERENT_SYSMEM));
  458. break;
  459. default:
  460. return -EINVAL;
  461. }
  462. launch_dma |= NVDEF(NVA0B5, LAUNCH_DMA, DST_TYPE, PHYSICAL);
  463. PUSH_MTHD(push, NVA0B5, SET_REMAP_CONST_A, 0,
  464. SET_REMAP_CONST_B, 0,
  465. SET_REMAP_COMPONENTS,
  466. NVDEF(NVA0B5, SET_REMAP_COMPONENTS, DST_X, CONST_A) |
  467. NVDEF(NVA0B5, SET_REMAP_COMPONENTS, DST_Y, CONST_B) |
  468. NVDEF(NVA0B5, SET_REMAP_COMPONENTS, COMPONENT_SIZE, FOUR) |
  469. NVDEF(NVA0B5, SET_REMAP_COMPONENTS, NUM_DST_COMPONENTS, TWO));
  470. PUSH_MTHD(push, NVA0B5, OFFSET_OUT_UPPER,
  471. NVVAL(NVA0B5, OFFSET_OUT_UPPER, UPPER, upper_32_bits(dst_addr)),
  472. OFFSET_OUT_LOWER, lower_32_bits(dst_addr));
  473. PUSH_MTHD(push, NVA0B5, LINE_LENGTH_IN, length >> 3);
  474. PUSH_MTHD(push, NVA0B5, LAUNCH_DMA, launch_dma |
  475. NVDEF(NVA0B5, LAUNCH_DMA, DATA_TRANSFER_TYPE, NON_PIPELINED) |
  476. NVDEF(NVA0B5, LAUNCH_DMA, FLUSH_ENABLE, TRUE) |
  477. NVDEF(NVA0B5, LAUNCH_DMA, SEMAPHORE_TYPE, NONE) |
  478. NVDEF(NVA0B5, LAUNCH_DMA, INTERRUPT_TYPE, NONE) |
  479. NVDEF(NVA0B5, LAUNCH_DMA, SRC_MEMORY_LAYOUT, PITCH) |
  480. NVDEF(NVA0B5, LAUNCH_DMA, DST_MEMORY_LAYOUT, PITCH) |
  481. NVDEF(NVA0B5, LAUNCH_DMA, MULTI_LINE_ENABLE, FALSE) |
  482. NVDEF(NVA0B5, LAUNCH_DMA, REMAP_ENABLE, TRUE) |
  483. NVDEF(NVA0B5, LAUNCH_DMA, BYPASS_L2, USE_PTE_SETTING));
  484. return 0;
  485. }
  486. static int
  487. nouveau_dmem_migrate_init(struct nouveau_drm *drm)
  488. {
  489. switch (drm->ttm.copy.oclass) {
  490. case PASCAL_DMA_COPY_A:
  491. case PASCAL_DMA_COPY_B:
  492. case VOLTA_DMA_COPY_A:
  493. case TURING_DMA_COPY_A:
  494. drm->dmem->migrate.copy_func = nvc0b5_migrate_copy;
  495. drm->dmem->migrate.clear_func = nvc0b5_migrate_clear;
  496. drm->dmem->migrate.chan = drm->ttm.chan;
  497. return 0;
  498. default:
  499. break;
  500. }
  501. return -ENODEV;
  502. }
  503. void
  504. nouveau_dmem_init(struct nouveau_drm *drm)
  505. {
  506. int ret;
  507. /* This only make sense on PASCAL or newer */
  508. if (drm->client.device.info.family < NV_DEVICE_INFO_V0_PASCAL)
  509. return;
  510. if (!(drm->dmem = kzalloc(sizeof(*drm->dmem), GFP_KERNEL)))
  511. return;
  512. drm->dmem->drm = drm;
  513. mutex_init(&drm->dmem->mutex);
  514. INIT_LIST_HEAD(&drm->dmem->chunks);
  515. mutex_init(&drm->dmem->mutex);
  516. spin_lock_init(&drm->dmem->lock);
  517. /* Initialize migration dma helpers before registering memory */
  518. ret = nouveau_dmem_migrate_init(drm);
  519. if (ret) {
  520. kfree(drm->dmem);
  521. drm->dmem = NULL;
  522. }
  523. }
  524. static unsigned long nouveau_dmem_migrate_copy_one(struct nouveau_drm *drm,
  525. struct nouveau_svmm *svmm, unsigned long src,
  526. dma_addr_t *dma_addr, u64 *pfn)
  527. {
  528. struct device *dev = drm->dev->dev;
  529. struct page *dpage, *spage;
  530. unsigned long paddr;
  531. spage = migrate_pfn_to_page(src);
  532. if (!(src & MIGRATE_PFN_MIGRATE))
  533. goto out;
  534. dpage = nouveau_dmem_page_alloc_locked(drm);
  535. if (!dpage)
  536. goto out;
  537. paddr = nouveau_dmem_page_addr(dpage);
  538. if (spage) {
  539. *dma_addr = dma_map_page(dev, spage, 0, page_size(spage),
  540. DMA_BIDIRECTIONAL);
  541. if (dma_mapping_error(dev, *dma_addr))
  542. goto out_free_page;
  543. if (drm->dmem->migrate.copy_func(drm, 1,
  544. NOUVEAU_APER_VRAM, paddr, NOUVEAU_APER_HOST, *dma_addr))
  545. goto out_dma_unmap;
  546. } else {
  547. *dma_addr = DMA_MAPPING_ERROR;
  548. if (drm->dmem->migrate.clear_func(drm, page_size(dpage),
  549. NOUVEAU_APER_VRAM, paddr))
  550. goto out_free_page;
  551. }
  552. dpage->zone_device_data = svmm;
  553. *pfn = NVIF_VMM_PFNMAP_V0_V | NVIF_VMM_PFNMAP_V0_VRAM |
  554. ((paddr >> PAGE_SHIFT) << NVIF_VMM_PFNMAP_V0_ADDR_SHIFT);
  555. if (src & MIGRATE_PFN_WRITE)
  556. *pfn |= NVIF_VMM_PFNMAP_V0_W;
  557. return migrate_pfn(page_to_pfn(dpage));
  558. out_dma_unmap:
  559. dma_unmap_page(dev, *dma_addr, PAGE_SIZE, DMA_BIDIRECTIONAL);
  560. out_free_page:
  561. nouveau_dmem_page_free_locked(drm, dpage);
  562. out:
  563. *pfn = NVIF_VMM_PFNMAP_V0_NONE;
  564. return 0;
  565. }
  566. static void nouveau_dmem_migrate_chunk(struct nouveau_drm *drm,
  567. struct nouveau_svmm *svmm, struct migrate_vma *args,
  568. dma_addr_t *dma_addrs, u64 *pfns)
  569. {
  570. struct nouveau_fence *fence;
  571. unsigned long addr = args->start, nr_dma = 0, i;
  572. for (i = 0; addr < args->end; i++) {
  573. args->dst[i] = nouveau_dmem_migrate_copy_one(drm, svmm,
  574. args->src[i], dma_addrs + nr_dma, pfns + i);
  575. if (!dma_mapping_error(drm->dev->dev, dma_addrs[nr_dma]))
  576. nr_dma++;
  577. addr += PAGE_SIZE;
  578. }
  579. nouveau_fence_new(drm->dmem->migrate.chan, false, &fence);
  580. migrate_vma_pages(args);
  581. nouveau_dmem_fence_done(&fence);
  582. nouveau_pfns_map(svmm, args->vma->vm_mm, args->start, pfns, i);
  583. while (nr_dma--) {
  584. dma_unmap_page(drm->dev->dev, dma_addrs[nr_dma], PAGE_SIZE,
  585. DMA_BIDIRECTIONAL);
  586. }
  587. migrate_vma_finalize(args);
  588. }
  589. int
  590. nouveau_dmem_migrate_vma(struct nouveau_drm *drm,
  591. struct nouveau_svmm *svmm,
  592. struct vm_area_struct *vma,
  593. unsigned long start,
  594. unsigned long end)
  595. {
  596. unsigned long npages = (end - start) >> PAGE_SHIFT;
  597. unsigned long max = min(SG_MAX_SINGLE_ALLOC, npages);
  598. dma_addr_t *dma_addrs;
  599. struct migrate_vma args = {
  600. .vma = vma,
  601. .start = start,
  602. .pgmap_owner = drm->dev,
  603. .flags = MIGRATE_VMA_SELECT_SYSTEM,
  604. };
  605. unsigned long i;
  606. u64 *pfns;
  607. int ret = -ENOMEM;
  608. if (drm->dmem == NULL)
  609. return -ENODEV;
  610. args.src = kcalloc(max, sizeof(*args.src), GFP_KERNEL);
  611. if (!args.src)
  612. goto out;
  613. args.dst = kcalloc(max, sizeof(*args.dst), GFP_KERNEL);
  614. if (!args.dst)
  615. goto out_free_src;
  616. dma_addrs = kmalloc_array(max, sizeof(*dma_addrs), GFP_KERNEL);
  617. if (!dma_addrs)
  618. goto out_free_dst;
  619. pfns = nouveau_pfns_alloc(max);
  620. if (!pfns)
  621. goto out_free_dma;
  622. for (i = 0; i < npages; i += max) {
  623. if (args.start + (max << PAGE_SHIFT) > end)
  624. args.end = end;
  625. else
  626. args.end = args.start + (max << PAGE_SHIFT);
  627. ret = migrate_vma_setup(&args);
  628. if (ret)
  629. goto out_free_pfns;
  630. if (args.cpages)
  631. nouveau_dmem_migrate_chunk(drm, svmm, &args, dma_addrs,
  632. pfns);
  633. args.start = args.end;
  634. }
  635. ret = 0;
  636. out_free_pfns:
  637. nouveau_pfns_free(pfns);
  638. out_free_dma:
  639. kfree(dma_addrs);
  640. out_free_dst:
  641. kfree(args.dst);
  642. out_free_src:
  643. kfree(args.src);
  644. out:
  645. return ret;
  646. }