mga_irq.c 4.8 KB

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  1. /* mga_irq.c -- IRQ handling for radeon -*- linux-c -*-
  2. */
  3. /*
  4. * Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
  5. *
  6. * The Weather Channel (TM) funded Tungsten Graphics to develop the
  7. * initial release of the Radeon 8500 driver under the XFree86 license.
  8. * This notice must be preserved.
  9. *
  10. * Permission is hereby granted, free of charge, to any person obtaining a
  11. * copy of this software and associated documentation files (the "Software"),
  12. * to deal in the Software without restriction, including without limitation
  13. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  14. * and/or sell copies of the Software, and to permit persons to whom the
  15. * Software is furnished to do so, subject to the following conditions:
  16. *
  17. * The above copyright notice and this permission notice (including the next
  18. * paragraph) shall be included in all copies or substantial portions of the
  19. * Software.
  20. *
  21. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  22. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  23. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  24. * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  25. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  26. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  27. * DEALINGS IN THE SOFTWARE.
  28. *
  29. * Authors:
  30. * Keith Whitwell <[email protected]>
  31. * Eric Anholt <[email protected]>
  32. */
  33. #include "mga_drv.h"
  34. u32 mga_get_vblank_counter(struct drm_device *dev, unsigned int pipe)
  35. {
  36. const drm_mga_private_t *const dev_priv =
  37. (drm_mga_private_t *) dev->dev_private;
  38. if (pipe != 0)
  39. return 0;
  40. return atomic_read(&dev_priv->vbl_received);
  41. }
  42. irqreturn_t mga_driver_irq_handler(int irq, void *arg)
  43. {
  44. struct drm_device *dev = (struct drm_device *) arg;
  45. drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
  46. int status;
  47. int handled = 0;
  48. status = MGA_READ(MGA_STATUS);
  49. /* VBLANK interrupt */
  50. if (status & MGA_VLINEPEN) {
  51. MGA_WRITE(MGA_ICLEAR, MGA_VLINEICLR);
  52. atomic_inc(&dev_priv->vbl_received);
  53. drm_handle_vblank(dev, 0);
  54. handled = 1;
  55. }
  56. /* SOFTRAP interrupt */
  57. if (status & MGA_SOFTRAPEN) {
  58. const u32 prim_start = MGA_READ(MGA_PRIMADDRESS);
  59. const u32 prim_end = MGA_READ(MGA_PRIMEND);
  60. MGA_WRITE(MGA_ICLEAR, MGA_SOFTRAPICLR);
  61. /* In addition to clearing the interrupt-pending bit, we
  62. * have to write to MGA_PRIMEND to re-start the DMA operation.
  63. */
  64. if ((prim_start & ~0x03) != (prim_end & ~0x03))
  65. MGA_WRITE(MGA_PRIMEND, prim_end);
  66. atomic_inc(&dev_priv->last_fence_retired);
  67. wake_up(&dev_priv->fence_queue);
  68. handled = 1;
  69. }
  70. if (handled)
  71. return IRQ_HANDLED;
  72. return IRQ_NONE;
  73. }
  74. int mga_enable_vblank(struct drm_device *dev, unsigned int pipe)
  75. {
  76. drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
  77. if (pipe != 0) {
  78. DRM_ERROR("tried to enable vblank on non-existent crtc %u\n",
  79. pipe);
  80. return 0;
  81. }
  82. MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN);
  83. return 0;
  84. }
  85. void mga_disable_vblank(struct drm_device *dev, unsigned int pipe)
  86. {
  87. if (pipe != 0) {
  88. DRM_ERROR("tried to disable vblank on non-existent crtc %u\n",
  89. pipe);
  90. }
  91. /* Do *NOT* disable the vertical refresh interrupt. MGA doesn't have
  92. * a nice hardware counter that tracks the number of refreshes when
  93. * the interrupt is disabled, and the kernel doesn't know the refresh
  94. * rate to calculate an estimate.
  95. */
  96. /* MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN); */
  97. }
  98. void mga_driver_fence_wait(struct drm_device *dev, unsigned int *sequence)
  99. {
  100. drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
  101. unsigned int cur_fence;
  102. /* Assume that the user has missed the current sequence number
  103. * by about a day rather than she wants to wait for years
  104. * using fences.
  105. */
  106. wait_event_timeout(dev_priv->fence_queue,
  107. (((cur_fence = atomic_read(&dev_priv->last_fence_retired))
  108. - *sequence) <= (1 << 23)),
  109. msecs_to_jiffies(3000));
  110. *sequence = cur_fence;
  111. }
  112. void mga_driver_irq_preinstall(struct drm_device *dev)
  113. {
  114. drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
  115. /* Disable *all* interrupts */
  116. MGA_WRITE(MGA_IEN, 0);
  117. /* Clear bits if they're already high */
  118. MGA_WRITE(MGA_ICLEAR, ~0);
  119. }
  120. int mga_driver_irq_postinstall(struct drm_device *dev)
  121. {
  122. drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
  123. init_waitqueue_head(&dev_priv->fence_queue);
  124. /* Turn on soft trap interrupt. Vertical blank interrupts are enabled
  125. * in mga_enable_vblank.
  126. */
  127. MGA_WRITE(MGA_IEN, MGA_SOFTRAPEN);
  128. return 0;
  129. }
  130. void mga_driver_irq_uninstall(struct drm_device *dev)
  131. {
  132. drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
  133. if (!dev_priv)
  134. return;
  135. /* Disable *all* interrupts */
  136. MGA_WRITE(MGA_IEN, 0);
  137. dev->irq_enabled = false;
  138. }