dcss-blkctl.c 1.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright 2019 NXP.
  4. */
  5. #include <linux/device.h>
  6. #include <linux/of.h>
  7. #include <linux/slab.h>
  8. #include "dcss-dev.h"
  9. #define DCSS_BLKCTL_RESET_CTRL 0x00
  10. #define B_CLK_RESETN BIT(0)
  11. #define APB_CLK_RESETN BIT(1)
  12. #define P_CLK_RESETN BIT(2)
  13. #define RTR_CLK_RESETN BIT(4)
  14. #define DCSS_BLKCTL_CONTROL0 0x10
  15. #define HDMI_MIPI_CLK_SEL BIT(0)
  16. #define DISPMIX_REFCLK_SEL_POS 4
  17. #define DISPMIX_REFCLK_SEL_MASK GENMASK(5, 4)
  18. #define DISPMIX_PIXCLK_SEL BIT(8)
  19. #define HDMI_SRC_SECURE_EN BIT(16)
  20. struct dcss_blkctl {
  21. struct dcss_dev *dcss;
  22. void __iomem *base_reg;
  23. };
  24. void dcss_blkctl_cfg(struct dcss_blkctl *blkctl)
  25. {
  26. if (blkctl->dcss->hdmi_output)
  27. dcss_writel(0, blkctl->base_reg + DCSS_BLKCTL_CONTROL0);
  28. else
  29. dcss_writel(DISPMIX_PIXCLK_SEL,
  30. blkctl->base_reg + DCSS_BLKCTL_CONTROL0);
  31. dcss_set(B_CLK_RESETN | APB_CLK_RESETN | P_CLK_RESETN | RTR_CLK_RESETN,
  32. blkctl->base_reg + DCSS_BLKCTL_RESET_CTRL);
  33. }
  34. int dcss_blkctl_init(struct dcss_dev *dcss, unsigned long blkctl_base)
  35. {
  36. struct dcss_blkctl *blkctl;
  37. blkctl = kzalloc(sizeof(*blkctl), GFP_KERNEL);
  38. if (!blkctl)
  39. return -ENOMEM;
  40. blkctl->base_reg = ioremap(blkctl_base, SZ_4K);
  41. if (!blkctl->base_reg) {
  42. dev_err(dcss->dev, "unable to remap BLK CTRL base\n");
  43. kfree(blkctl);
  44. return -ENOMEM;
  45. }
  46. dcss->blkctl = blkctl;
  47. blkctl->dcss = dcss;
  48. dcss_blkctl_cfg(blkctl);
  49. return 0;
  50. }
  51. void dcss_blkctl_exit(struct dcss_blkctl *blkctl)
  52. {
  53. if (blkctl->base_reg)
  54. iounmap(blkctl->base_reg);
  55. kfree(blkctl);
  56. }