i915_active.h 8.3 KB

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  1. /*
  2. * SPDX-License-Identifier: MIT
  3. *
  4. * Copyright © 2019 Intel Corporation
  5. */
  6. #ifndef _I915_ACTIVE_H_
  7. #define _I915_ACTIVE_H_
  8. #include <linux/lockdep.h>
  9. #include "i915_active_types.h"
  10. #include "i915_request.h"
  11. struct i915_request;
  12. struct intel_engine_cs;
  13. struct intel_timeline;
  14. /*
  15. * We treat requests as fences. This is not be to confused with our
  16. * "fence registers" but pipeline synchronisation objects ala GL_ARB_sync.
  17. * We use the fences to synchronize access from the CPU with activity on the
  18. * GPU, for example, we should not rewrite an object's PTE whilst the GPU
  19. * is reading them. We also track fences at a higher level to provide
  20. * implicit synchronisation around GEM objects, e.g. set-domain will wait
  21. * for outstanding GPU rendering before marking the object ready for CPU
  22. * access, or a pageflip will wait until the GPU is complete before showing
  23. * the frame on the scanout.
  24. *
  25. * In order to use a fence, the object must track the fence it needs to
  26. * serialise with. For example, GEM objects want to track both read and
  27. * write access so that we can perform concurrent read operations between
  28. * the CPU and GPU engines, as well as waiting for all rendering to
  29. * complete, or waiting for the last GPU user of a "fence register". The
  30. * object then embeds a #i915_active_fence to track the most recent (in
  31. * retirement order) request relevant for the desired mode of access.
  32. * The #i915_active_fence is updated with i915_active_fence_set() to
  33. * track the most recent fence request, typically this is done as part of
  34. * i915_vma_move_to_active().
  35. *
  36. * When the #i915_active_fence completes (is retired), it will
  37. * signal its completion to the owner through a callback as well as mark
  38. * itself as idle (i915_active_fence.request == NULL). The owner
  39. * can then perform any action, such as delayed freeing of an active
  40. * resource including itself.
  41. */
  42. void i915_active_noop(struct dma_fence *fence, struct dma_fence_cb *cb);
  43. /**
  44. * __i915_active_fence_init - prepares the activity tracker for use
  45. * @active - the active tracker
  46. * @fence - initial fence to track, can be NULL
  47. * @func - a callback when then the tracker is retired (becomes idle),
  48. * can be NULL
  49. *
  50. * i915_active_fence_init() prepares the embedded @active struct for use as
  51. * an activity tracker, that is for tracking the last known active fence
  52. * associated with it. When the last fence becomes idle, when it is retired
  53. * after completion, the optional callback @func is invoked.
  54. */
  55. static inline void
  56. __i915_active_fence_init(struct i915_active_fence *active,
  57. void *fence,
  58. dma_fence_func_t fn)
  59. {
  60. RCU_INIT_POINTER(active->fence, fence);
  61. active->cb.func = fn ?: i915_active_noop;
  62. }
  63. #define INIT_ACTIVE_FENCE(A) \
  64. __i915_active_fence_init((A), NULL, NULL)
  65. struct dma_fence *
  66. __i915_active_fence_set(struct i915_active_fence *active,
  67. struct dma_fence *fence);
  68. /**
  69. * i915_active_fence_set - updates the tracker to watch the current fence
  70. * @active - the active tracker
  71. * @rq - the request to watch
  72. *
  73. * i915_active_fence_set() watches the given @rq for completion. While
  74. * that @rq is busy, the @active reports busy. When that @rq is signaled
  75. * (or else retired) the @active tracker is updated to report idle.
  76. */
  77. int __must_check
  78. i915_active_fence_set(struct i915_active_fence *active,
  79. struct i915_request *rq);
  80. /**
  81. * i915_active_fence_get - return a reference to the active fence
  82. * @active - the active tracker
  83. *
  84. * i915_active_fence_get() returns a reference to the active fence,
  85. * or NULL if the active tracker is idle. The reference is obtained under RCU,
  86. * so no locking is required by the caller.
  87. *
  88. * The reference should be freed with dma_fence_put().
  89. */
  90. static inline struct dma_fence *
  91. i915_active_fence_get(struct i915_active_fence *active)
  92. {
  93. struct dma_fence *fence;
  94. rcu_read_lock();
  95. fence = dma_fence_get_rcu_safe(&active->fence);
  96. rcu_read_unlock();
  97. return fence;
  98. }
  99. /**
  100. * i915_active_fence_isset - report whether the active tracker is assigned
  101. * @active - the active tracker
  102. *
  103. * i915_active_fence_isset() returns true if the active tracker is currently
  104. * assigned to a fence. Due to the lazy retiring, that fence may be idle
  105. * and this may report stale information.
  106. */
  107. static inline bool
  108. i915_active_fence_isset(const struct i915_active_fence *active)
  109. {
  110. return rcu_access_pointer(active->fence);
  111. }
  112. /*
  113. * GPU activity tracking
  114. *
  115. * Each set of commands submitted to the GPU compromises a single request that
  116. * signals a fence upon completion. struct i915_request combines the
  117. * command submission, scheduling and fence signaling roles. If we want to see
  118. * if a particular task is complete, we need to grab the fence (struct
  119. * i915_request) for that task and check or wait for it to be signaled. More
  120. * often though we want to track the status of a bunch of tasks, for example
  121. * to wait for the GPU to finish accessing some memory across a variety of
  122. * different command pipelines from different clients. We could choose to
  123. * track every single request associated with the task, but knowing that
  124. * each request belongs to an ordered timeline (later requests within a
  125. * timeline must wait for earlier requests), we need only track the
  126. * latest request in each timeline to determine the overall status of the
  127. * task.
  128. *
  129. * struct i915_active provides this tracking across timelines. It builds a
  130. * composite shared-fence, and is updated as new work is submitted to the task,
  131. * forming a snapshot of the current status. It should be embedded into the
  132. * different resources that need to track their associated GPU activity to
  133. * provide a callback when that GPU activity has ceased, or otherwise to
  134. * provide a serialisation point either for request submission or for CPU
  135. * synchronisation.
  136. */
  137. void __i915_active_init(struct i915_active *ref,
  138. int (*active)(struct i915_active *ref),
  139. void (*retire)(struct i915_active *ref),
  140. unsigned long flags,
  141. struct lock_class_key *mkey,
  142. struct lock_class_key *wkey);
  143. /* Specialise each class of i915_active to avoid impossible lockdep cycles. */
  144. #define i915_active_init(ref, active, retire, flags) do { \
  145. static struct lock_class_key __mkey; \
  146. static struct lock_class_key __wkey; \
  147. \
  148. __i915_active_init(ref, active, retire, flags, &__mkey, &__wkey); \
  149. } while (0)
  150. int i915_active_add_request(struct i915_active *ref, struct i915_request *rq);
  151. struct dma_fence *
  152. i915_active_set_exclusive(struct i915_active *ref, struct dma_fence *f);
  153. int __i915_active_wait(struct i915_active *ref, int state);
  154. static inline int i915_active_wait(struct i915_active *ref)
  155. {
  156. return __i915_active_wait(ref, TASK_INTERRUPTIBLE);
  157. }
  158. int i915_sw_fence_await_active(struct i915_sw_fence *fence,
  159. struct i915_active *ref,
  160. unsigned int flags);
  161. int i915_request_await_active(struct i915_request *rq,
  162. struct i915_active *ref,
  163. unsigned int flags);
  164. #define I915_ACTIVE_AWAIT_EXCL BIT(0)
  165. #define I915_ACTIVE_AWAIT_ACTIVE BIT(1)
  166. #define I915_ACTIVE_AWAIT_BARRIER BIT(2)
  167. int i915_active_acquire(struct i915_active *ref);
  168. int i915_active_acquire_for_context(struct i915_active *ref, u64 idx);
  169. bool i915_active_acquire_if_busy(struct i915_active *ref);
  170. void i915_active_release(struct i915_active *ref);
  171. static inline void __i915_active_acquire(struct i915_active *ref)
  172. {
  173. GEM_BUG_ON(!atomic_read(&ref->count));
  174. atomic_inc(&ref->count);
  175. }
  176. static inline bool
  177. i915_active_is_idle(const struct i915_active *ref)
  178. {
  179. return !atomic_read(&ref->count);
  180. }
  181. void i915_active_fini(struct i915_active *ref);
  182. int i915_active_acquire_preallocate_barrier(struct i915_active *ref,
  183. struct intel_engine_cs *engine);
  184. void i915_active_acquire_barrier(struct i915_active *ref);
  185. void i915_request_add_active_barriers(struct i915_request *rq);
  186. void i915_active_print(struct i915_active *ref, struct drm_printer *m);
  187. void i915_active_unlock_wait(struct i915_active *ref);
  188. struct i915_active *i915_active_create(void);
  189. struct i915_active *i915_active_get(struct i915_active *ref);
  190. void i915_active_put(struct i915_active *ref);
  191. static inline int __i915_request_await_exclusive(struct i915_request *rq,
  192. struct i915_active *active)
  193. {
  194. struct dma_fence *fence;
  195. int err = 0;
  196. fence = i915_active_fence_get(&active->excl);
  197. if (fence) {
  198. err = i915_request_await_dma_fence(rq, fence);
  199. dma_fence_put(fence);
  200. }
  201. return err;
  202. }
  203. void i915_active_module_exit(void);
  204. int i915_active_module_init(void);
  205. #endif /* _I915_ACTIVE_H_ */