vgpu.c 15 KB

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  1. /*
  2. * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21. * SOFTWARE.
  22. *
  23. * Authors:
  24. * Eddie Dong <[email protected]>
  25. * Kevin Tian <[email protected]>
  26. *
  27. * Contributors:
  28. * Ping Gao <[email protected]>
  29. * Zhi Wang <[email protected]>
  30. * Bing Niu <[email protected]>
  31. *
  32. */
  33. #include "i915_drv.h"
  34. #include "gvt.h"
  35. #include "i915_pvinfo.h"
  36. void populate_pvinfo_page(struct intel_vgpu *vgpu)
  37. {
  38. struct drm_i915_private *i915 = vgpu->gvt->gt->i915;
  39. /* setup the ballooning information */
  40. vgpu_vreg64_t(vgpu, vgtif_reg(magic)) = VGT_MAGIC;
  41. vgpu_vreg_t(vgpu, vgtif_reg(version_major)) = 1;
  42. vgpu_vreg_t(vgpu, vgtif_reg(version_minor)) = 0;
  43. vgpu_vreg_t(vgpu, vgtif_reg(display_ready)) = 0;
  44. vgpu_vreg_t(vgpu, vgtif_reg(vgt_id)) = vgpu->id;
  45. vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) = VGT_CAPS_FULL_PPGTT;
  46. vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) |= VGT_CAPS_HWSP_EMULATION;
  47. vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) |= VGT_CAPS_HUGE_GTT;
  48. vgpu_vreg_t(vgpu, vgtif_reg(avail_rs.mappable_gmadr.base)) =
  49. vgpu_aperture_gmadr_base(vgpu);
  50. vgpu_vreg_t(vgpu, vgtif_reg(avail_rs.mappable_gmadr.size)) =
  51. vgpu_aperture_sz(vgpu);
  52. vgpu_vreg_t(vgpu, vgtif_reg(avail_rs.nonmappable_gmadr.base)) =
  53. vgpu_hidden_gmadr_base(vgpu);
  54. vgpu_vreg_t(vgpu, vgtif_reg(avail_rs.nonmappable_gmadr.size)) =
  55. vgpu_hidden_sz(vgpu);
  56. vgpu_vreg_t(vgpu, vgtif_reg(avail_rs.fence_num)) = vgpu_fence_sz(vgpu);
  57. vgpu_vreg_t(vgpu, vgtif_reg(cursor_x_hot)) = UINT_MAX;
  58. vgpu_vreg_t(vgpu, vgtif_reg(cursor_y_hot)) = UINT_MAX;
  59. gvt_dbg_core("Populate PVINFO PAGE for vGPU %d\n", vgpu->id);
  60. gvt_dbg_core("aperture base [GMADR] 0x%llx size 0x%llx\n",
  61. vgpu_aperture_gmadr_base(vgpu), vgpu_aperture_sz(vgpu));
  62. gvt_dbg_core("hidden base [GMADR] 0x%llx size=0x%llx\n",
  63. vgpu_hidden_gmadr_base(vgpu), vgpu_hidden_sz(vgpu));
  64. gvt_dbg_core("fence size %d\n", vgpu_fence_sz(vgpu));
  65. drm_WARN_ON(&i915->drm, sizeof(struct vgt_if) != VGT_PVINFO_SIZE);
  66. }
  67. /*
  68. * vGPU type name is defined as GVTg_Vx_y which contains the physical GPU
  69. * generation type (e.g V4 as BDW server, V5 as SKL server).
  70. *
  71. * Depening on the physical SKU resource, we might see vGPU types like
  72. * GVTg_V4_8, GVTg_V4_4, GVTg_V4_2, etc. We can create different types of
  73. * vGPU on same physical GPU depending on available resource. Each vGPU
  74. * type will have a different number of avail_instance to indicate how
  75. * many vGPU instance can be created for this type.
  76. */
  77. #define VGPU_MAX_WEIGHT 16
  78. #define VGPU_WEIGHT(vgpu_num) \
  79. (VGPU_MAX_WEIGHT / (vgpu_num))
  80. static const struct intel_vgpu_config intel_vgpu_configs[] = {
  81. { MB_TO_BYTES(64), MB_TO_BYTES(384), 4, VGPU_WEIGHT(8), GVT_EDID_1024_768, "8" },
  82. { MB_TO_BYTES(128), MB_TO_BYTES(512), 4, VGPU_WEIGHT(4), GVT_EDID_1920_1200, "4" },
  83. { MB_TO_BYTES(256), MB_TO_BYTES(1024), 4, VGPU_WEIGHT(2), GVT_EDID_1920_1200, "2" },
  84. { MB_TO_BYTES(512), MB_TO_BYTES(2048), 4, VGPU_WEIGHT(1), GVT_EDID_1920_1200, "1" },
  85. };
  86. /**
  87. * intel_gvt_init_vgpu_types - initialize vGPU type list
  88. * @gvt : GVT device
  89. *
  90. * Initialize vGPU type list based on available resource.
  91. *
  92. */
  93. int intel_gvt_init_vgpu_types(struct intel_gvt *gvt)
  94. {
  95. unsigned int low_avail = gvt_aperture_sz(gvt) - HOST_LOW_GM_SIZE;
  96. unsigned int high_avail = gvt_hidden_sz(gvt) - HOST_HIGH_GM_SIZE;
  97. unsigned int num_types = ARRAY_SIZE(intel_vgpu_configs);
  98. unsigned int i;
  99. gvt->types = kcalloc(num_types, sizeof(struct intel_vgpu_type),
  100. GFP_KERNEL);
  101. if (!gvt->types)
  102. return -ENOMEM;
  103. gvt->mdev_types = kcalloc(num_types, sizeof(*gvt->mdev_types),
  104. GFP_KERNEL);
  105. if (!gvt->mdev_types)
  106. goto out_free_types;
  107. for (i = 0; i < num_types; ++i) {
  108. const struct intel_vgpu_config *conf = &intel_vgpu_configs[i];
  109. if (low_avail / conf->low_mm == 0)
  110. break;
  111. if (conf->weight < 1 || conf->weight > VGPU_MAX_WEIGHT)
  112. goto out_free_mdev_types;
  113. sprintf(gvt->types[i].name, "GVTg_V%u_%s",
  114. GRAPHICS_VER(gvt->gt->i915) == 8 ? 4 : 5, conf->name);
  115. gvt->types[i].conf = conf;
  116. gvt_dbg_core("type[%d]: %s avail %u low %u high %u fence %u weight %u res %s\n",
  117. i, gvt->types[i].name,
  118. min(low_avail / conf->low_mm,
  119. high_avail / conf->high_mm),
  120. conf->low_mm, conf->high_mm, conf->fence,
  121. conf->weight, vgpu_edid_str(conf->edid));
  122. gvt->mdev_types[i] = &gvt->types[i].type;
  123. gvt->mdev_types[i]->sysfs_name = gvt->types[i].name;
  124. }
  125. gvt->num_types = i;
  126. return 0;
  127. out_free_mdev_types:
  128. kfree(gvt->mdev_types);
  129. out_free_types:
  130. kfree(gvt->types);
  131. return -EINVAL;
  132. }
  133. void intel_gvt_clean_vgpu_types(struct intel_gvt *gvt)
  134. {
  135. kfree(gvt->mdev_types);
  136. kfree(gvt->types);
  137. }
  138. /**
  139. * intel_gvt_active_vgpu - activate a virtual GPU
  140. * @vgpu: virtual GPU
  141. *
  142. * This function is called when user wants to activate a virtual GPU.
  143. *
  144. */
  145. void intel_gvt_activate_vgpu(struct intel_vgpu *vgpu)
  146. {
  147. mutex_lock(&vgpu->vgpu_lock);
  148. vgpu->active = true;
  149. mutex_unlock(&vgpu->vgpu_lock);
  150. }
  151. /**
  152. * intel_gvt_deactive_vgpu - deactivate a virtual GPU
  153. * @vgpu: virtual GPU
  154. *
  155. * This function is called when user wants to deactivate a virtual GPU.
  156. * The virtual GPU will be stopped.
  157. *
  158. */
  159. void intel_gvt_deactivate_vgpu(struct intel_vgpu *vgpu)
  160. {
  161. mutex_lock(&vgpu->vgpu_lock);
  162. vgpu->active = false;
  163. if (atomic_read(&vgpu->submission.running_workload_num)) {
  164. mutex_unlock(&vgpu->vgpu_lock);
  165. intel_gvt_wait_vgpu_idle(vgpu);
  166. mutex_lock(&vgpu->vgpu_lock);
  167. }
  168. intel_vgpu_stop_schedule(vgpu);
  169. mutex_unlock(&vgpu->vgpu_lock);
  170. }
  171. /**
  172. * intel_gvt_release_vgpu - release a virtual GPU
  173. * @vgpu: virtual GPU
  174. *
  175. * This function is called when user wants to release a virtual GPU.
  176. * The virtual GPU will be stopped and all runtime information will be
  177. * destroyed.
  178. *
  179. */
  180. void intel_gvt_release_vgpu(struct intel_vgpu *vgpu)
  181. {
  182. intel_gvt_deactivate_vgpu(vgpu);
  183. mutex_lock(&vgpu->vgpu_lock);
  184. vgpu->d3_entered = false;
  185. intel_vgpu_clean_workloads(vgpu, ALL_ENGINES);
  186. intel_vgpu_dmabuf_cleanup(vgpu);
  187. mutex_unlock(&vgpu->vgpu_lock);
  188. }
  189. /**
  190. * intel_gvt_destroy_vgpu - destroy a virtual GPU
  191. * @vgpu: virtual GPU
  192. *
  193. * This function is called when user wants to destroy a virtual GPU.
  194. *
  195. */
  196. void intel_gvt_destroy_vgpu(struct intel_vgpu *vgpu)
  197. {
  198. struct intel_gvt *gvt = vgpu->gvt;
  199. struct drm_i915_private *i915 = gvt->gt->i915;
  200. drm_WARN(&i915->drm, vgpu->active, "vGPU is still active!\n");
  201. /*
  202. * remove idr first so later clean can judge if need to stop
  203. * service if no active vgpu.
  204. */
  205. mutex_lock(&gvt->lock);
  206. idr_remove(&gvt->vgpu_idr, vgpu->id);
  207. mutex_unlock(&gvt->lock);
  208. mutex_lock(&vgpu->vgpu_lock);
  209. intel_gvt_debugfs_remove_vgpu(vgpu);
  210. intel_vgpu_clean_sched_policy(vgpu);
  211. intel_vgpu_clean_submission(vgpu);
  212. intel_vgpu_clean_display(vgpu);
  213. intel_vgpu_clean_opregion(vgpu);
  214. intel_vgpu_reset_ggtt(vgpu, true);
  215. intel_vgpu_clean_gtt(vgpu);
  216. intel_vgpu_detach_regions(vgpu);
  217. intel_vgpu_free_resource(vgpu);
  218. intel_vgpu_clean_mmio(vgpu);
  219. intel_vgpu_dmabuf_cleanup(vgpu);
  220. mutex_unlock(&vgpu->vgpu_lock);
  221. }
  222. #define IDLE_VGPU_IDR 0
  223. /**
  224. * intel_gvt_create_idle_vgpu - create an idle virtual GPU
  225. * @gvt: GVT device
  226. *
  227. * This function is called when user wants to create an idle virtual GPU.
  228. *
  229. * Returns:
  230. * pointer to intel_vgpu, error pointer if failed.
  231. */
  232. struct intel_vgpu *intel_gvt_create_idle_vgpu(struct intel_gvt *gvt)
  233. {
  234. struct intel_vgpu *vgpu;
  235. enum intel_engine_id i;
  236. int ret;
  237. vgpu = vzalloc(sizeof(*vgpu));
  238. if (!vgpu)
  239. return ERR_PTR(-ENOMEM);
  240. vgpu->id = IDLE_VGPU_IDR;
  241. vgpu->gvt = gvt;
  242. mutex_init(&vgpu->vgpu_lock);
  243. for (i = 0; i < I915_NUM_ENGINES; i++)
  244. INIT_LIST_HEAD(&vgpu->submission.workload_q_head[i]);
  245. ret = intel_vgpu_init_sched_policy(vgpu);
  246. if (ret)
  247. goto out_free_vgpu;
  248. vgpu->active = false;
  249. return vgpu;
  250. out_free_vgpu:
  251. vfree(vgpu);
  252. return ERR_PTR(ret);
  253. }
  254. /**
  255. * intel_gvt_destroy_vgpu - destroy an idle virtual GPU
  256. * @vgpu: virtual GPU
  257. *
  258. * This function is called when user wants to destroy an idle virtual GPU.
  259. *
  260. */
  261. void intel_gvt_destroy_idle_vgpu(struct intel_vgpu *vgpu)
  262. {
  263. mutex_lock(&vgpu->vgpu_lock);
  264. intel_vgpu_clean_sched_policy(vgpu);
  265. mutex_unlock(&vgpu->vgpu_lock);
  266. vfree(vgpu);
  267. }
  268. int intel_gvt_create_vgpu(struct intel_vgpu *vgpu,
  269. const struct intel_vgpu_config *conf)
  270. {
  271. struct intel_gvt *gvt = vgpu->gvt;
  272. struct drm_i915_private *dev_priv = gvt->gt->i915;
  273. int ret;
  274. gvt_dbg_core("low %u MB high %u MB fence %u\n",
  275. BYTES_TO_MB(conf->low_mm), BYTES_TO_MB(conf->high_mm),
  276. conf->fence);
  277. mutex_lock(&gvt->lock);
  278. ret = idr_alloc(&gvt->vgpu_idr, vgpu, IDLE_VGPU_IDR + 1, GVT_MAX_VGPU,
  279. GFP_KERNEL);
  280. if (ret < 0)
  281. goto out_unlock;;
  282. vgpu->id = ret;
  283. vgpu->sched_ctl.weight = conf->weight;
  284. mutex_init(&vgpu->vgpu_lock);
  285. mutex_init(&vgpu->dmabuf_lock);
  286. INIT_LIST_HEAD(&vgpu->dmabuf_obj_list_head);
  287. INIT_RADIX_TREE(&vgpu->page_track_tree, GFP_KERNEL);
  288. idr_init_base(&vgpu->object_idr, 1);
  289. intel_vgpu_init_cfg_space(vgpu, 1);
  290. vgpu->d3_entered = false;
  291. ret = intel_vgpu_init_mmio(vgpu);
  292. if (ret)
  293. goto out_clean_idr;
  294. ret = intel_vgpu_alloc_resource(vgpu, conf);
  295. if (ret)
  296. goto out_clean_vgpu_mmio;
  297. populate_pvinfo_page(vgpu);
  298. ret = intel_vgpu_init_gtt(vgpu);
  299. if (ret)
  300. goto out_clean_vgpu_resource;
  301. ret = intel_vgpu_init_opregion(vgpu);
  302. if (ret)
  303. goto out_clean_gtt;
  304. ret = intel_vgpu_init_display(vgpu, conf->edid);
  305. if (ret)
  306. goto out_clean_opregion;
  307. ret = intel_vgpu_setup_submission(vgpu);
  308. if (ret)
  309. goto out_clean_display;
  310. ret = intel_vgpu_init_sched_policy(vgpu);
  311. if (ret)
  312. goto out_clean_submission;
  313. intel_gvt_debugfs_add_vgpu(vgpu);
  314. ret = intel_gvt_set_opregion(vgpu);
  315. if (ret)
  316. goto out_clean_sched_policy;
  317. if (IS_BROADWELL(dev_priv) || IS_BROXTON(dev_priv))
  318. ret = intel_gvt_set_edid(vgpu, PORT_B);
  319. else
  320. ret = intel_gvt_set_edid(vgpu, PORT_D);
  321. if (ret)
  322. goto out_clean_sched_policy;
  323. intel_gvt_update_reg_whitelist(vgpu);
  324. mutex_unlock(&gvt->lock);
  325. return 0;
  326. out_clean_sched_policy:
  327. intel_vgpu_clean_sched_policy(vgpu);
  328. out_clean_submission:
  329. intel_vgpu_clean_submission(vgpu);
  330. out_clean_display:
  331. intel_vgpu_clean_display(vgpu);
  332. out_clean_opregion:
  333. intel_vgpu_clean_opregion(vgpu);
  334. out_clean_gtt:
  335. intel_vgpu_clean_gtt(vgpu);
  336. out_clean_vgpu_resource:
  337. intel_vgpu_free_resource(vgpu);
  338. out_clean_vgpu_mmio:
  339. intel_vgpu_clean_mmio(vgpu);
  340. out_clean_idr:
  341. idr_remove(&gvt->vgpu_idr, vgpu->id);
  342. out_unlock:
  343. mutex_unlock(&gvt->lock);
  344. return ret;
  345. }
  346. /**
  347. * intel_gvt_reset_vgpu_locked - reset a virtual GPU by DMLR or GT reset
  348. * @vgpu: virtual GPU
  349. * @dmlr: vGPU Device Model Level Reset or GT Reset
  350. * @engine_mask: engines to reset for GT reset
  351. *
  352. * This function is called when user wants to reset a virtual GPU through
  353. * device model reset or GT reset. The caller should hold the vgpu lock.
  354. *
  355. * vGPU Device Model Level Reset (DMLR) simulates the PCI level reset to reset
  356. * the whole vGPU to default state as when it is created. This vGPU function
  357. * is required both for functionary and security concerns.The ultimate goal
  358. * of vGPU FLR is that reuse a vGPU instance by virtual machines. When we
  359. * assign a vGPU to a virtual machine we must isse such reset first.
  360. *
  361. * Full GT Reset and Per-Engine GT Reset are soft reset flow for GPU engines
  362. * (Render, Blitter, Video, Video Enhancement). It is defined by GPU Spec.
  363. * Unlike the FLR, GT reset only reset particular resource of a vGPU per
  364. * the reset request. Guest driver can issue a GT reset by programming the
  365. * virtual GDRST register to reset specific virtual GPU engine or all
  366. * engines.
  367. *
  368. * The parameter dev_level is to identify if we will do DMLR or GT reset.
  369. * The parameter engine_mask is to specific the engines that need to be
  370. * resetted. If value ALL_ENGINES is given for engine_mask, it means
  371. * the caller requests a full GT reset that we will reset all virtual
  372. * GPU engines. For FLR, engine_mask is ignored.
  373. */
  374. void intel_gvt_reset_vgpu_locked(struct intel_vgpu *vgpu, bool dmlr,
  375. intel_engine_mask_t engine_mask)
  376. {
  377. struct intel_gvt *gvt = vgpu->gvt;
  378. struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler;
  379. intel_engine_mask_t resetting_eng = dmlr ? ALL_ENGINES : engine_mask;
  380. gvt_dbg_core("------------------------------------------\n");
  381. gvt_dbg_core("resseting vgpu%d, dmlr %d, engine_mask %08x\n",
  382. vgpu->id, dmlr, engine_mask);
  383. vgpu->resetting_eng = resetting_eng;
  384. intel_vgpu_stop_schedule(vgpu);
  385. /*
  386. * The current_vgpu will set to NULL after stopping the
  387. * scheduler when the reset is triggered by current vgpu.
  388. */
  389. if (scheduler->current_vgpu == NULL) {
  390. mutex_unlock(&vgpu->vgpu_lock);
  391. intel_gvt_wait_vgpu_idle(vgpu);
  392. mutex_lock(&vgpu->vgpu_lock);
  393. }
  394. intel_vgpu_reset_submission(vgpu, resetting_eng);
  395. /* full GPU reset or device model level reset */
  396. if (engine_mask == ALL_ENGINES || dmlr) {
  397. intel_vgpu_select_submission_ops(vgpu, ALL_ENGINES, 0);
  398. if (engine_mask == ALL_ENGINES)
  399. intel_vgpu_invalidate_ppgtt(vgpu);
  400. /*fence will not be reset during virtual reset */
  401. if (dmlr) {
  402. if(!vgpu->d3_entered) {
  403. intel_vgpu_invalidate_ppgtt(vgpu);
  404. intel_vgpu_destroy_all_ppgtt_mm(vgpu);
  405. }
  406. intel_vgpu_reset_ggtt(vgpu, true);
  407. intel_vgpu_reset_resource(vgpu);
  408. }
  409. intel_vgpu_reset_mmio(vgpu, dmlr);
  410. populate_pvinfo_page(vgpu);
  411. if (dmlr) {
  412. intel_vgpu_reset_display(vgpu);
  413. intel_vgpu_reset_cfg_space(vgpu);
  414. /* only reset the failsafe mode when dmlr reset */
  415. vgpu->failsafe = false;
  416. /*
  417. * PCI_D0 is set before dmlr, so reset d3_entered here
  418. * after done using.
  419. */
  420. if(vgpu->d3_entered)
  421. vgpu->d3_entered = false;
  422. else
  423. vgpu->pv_notified = false;
  424. }
  425. }
  426. vgpu->resetting_eng = 0;
  427. gvt_dbg_core("reset vgpu%d done\n", vgpu->id);
  428. gvt_dbg_core("------------------------------------------\n");
  429. }
  430. /**
  431. * intel_gvt_reset_vgpu - reset a virtual GPU (Function Level)
  432. * @vgpu: virtual GPU
  433. *
  434. * This function is called when user wants to reset a virtual GPU.
  435. *
  436. */
  437. void intel_gvt_reset_vgpu(struct intel_vgpu *vgpu)
  438. {
  439. mutex_lock(&vgpu->vgpu_lock);
  440. intel_gvt_reset_vgpu_locked(vgpu, true, 0);
  441. mutex_unlock(&vgpu->vgpu_lock);
  442. }