opregion.c 12 KB

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  1. /*
  2. * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21. * SOFTWARE.
  22. */
  23. #include <linux/acpi.h>
  24. #include "i915_drv.h"
  25. #include "gvt.h"
  26. /*
  27. * Note: Only for GVT-g virtual VBT generation, other usage must
  28. * not do like this.
  29. */
  30. #define _INTEL_BIOS_PRIVATE
  31. #include "display/intel_vbt_defs.h"
  32. #define OPREGION_SIGNATURE "IntelGraphicsMem"
  33. #define MBOX_VBT (1<<3)
  34. /* device handle */
  35. #define DEVICE_TYPE_CRT 0x01
  36. #define DEVICE_TYPE_EFP1 0x04
  37. #define DEVICE_TYPE_EFP2 0x40
  38. #define DEVICE_TYPE_EFP3 0x20
  39. #define DEVICE_TYPE_EFP4 0x10
  40. struct opregion_header {
  41. u8 signature[16];
  42. u32 size;
  43. u32 opregion_ver;
  44. u8 bios_ver[32];
  45. u8 vbios_ver[16];
  46. u8 driver_ver[16];
  47. u32 mboxes;
  48. u32 driver_model;
  49. u32 pcon;
  50. u8 dver[32];
  51. u8 rsvd[124];
  52. } __packed;
  53. struct bdb_data_header {
  54. u8 id;
  55. u16 size; /* data size */
  56. } __packed;
  57. /* For supporting windows guest with opregion, here hardcode the emulated
  58. * bdb header version as '186', and the corresponding child_device_config
  59. * length should be '33' but not '38'.
  60. */
  61. struct efp_child_device_config {
  62. u16 handle;
  63. u16 device_type;
  64. u16 device_class;
  65. u8 i2c_speed;
  66. u8 dp_onboard_redriver; /* 158 */
  67. u8 dp_ondock_redriver; /* 158 */
  68. u8 hdmi_level_shifter_value:4; /* 169 */
  69. u8 hdmi_max_data_rate:4; /* 204 */
  70. u16 dtd_buf_ptr; /* 161 */
  71. u8 edidless_efp:1; /* 161 */
  72. u8 compression_enable:1; /* 198 */
  73. u8 compression_method:1; /* 198 */
  74. u8 ganged_edp:1; /* 202 */
  75. u8 skip0:4;
  76. u8 compression_structure_index:4; /* 198 */
  77. u8 skip1:4;
  78. u8 slave_port; /* 202 */
  79. u8 skip2;
  80. u8 dvo_port;
  81. u8 i2c_pin; /* for add-in card */
  82. u8 slave_addr; /* for add-in card */
  83. u8 ddc_pin;
  84. u16 edid_ptr;
  85. u8 dvo_config;
  86. u8 efp_docked_port:1; /* 158 */
  87. u8 lane_reversal:1; /* 184 */
  88. u8 onboard_lspcon:1; /* 192 */
  89. u8 iboost_enable:1; /* 196 */
  90. u8 hpd_invert:1; /* BXT 196 */
  91. u8 slip3:3;
  92. u8 hdmi_compat:1;
  93. u8 dp_compat:1;
  94. u8 tmds_compat:1;
  95. u8 skip4:5;
  96. u8 aux_channel;
  97. u8 dongle_detect;
  98. u8 pipe_cap:2;
  99. u8 sdvo_stall:1; /* 158 */
  100. u8 hpd_status:2;
  101. u8 integrated_encoder:1;
  102. u8 skip5:2;
  103. u8 dvo_wiring;
  104. u8 mipi_bridge_type; /* 171 */
  105. u16 device_class_ext;
  106. u8 dvo_function;
  107. } __packed;
  108. struct vbt {
  109. /* header->bdb_offset point to bdb_header offset */
  110. struct vbt_header header;
  111. struct bdb_header bdb_header;
  112. struct bdb_data_header general_features_header;
  113. struct bdb_general_features general_features;
  114. struct bdb_data_header general_definitions_header;
  115. struct bdb_general_definitions general_definitions;
  116. struct efp_child_device_config child0;
  117. struct efp_child_device_config child1;
  118. struct efp_child_device_config child2;
  119. struct efp_child_device_config child3;
  120. struct bdb_data_header driver_features_header;
  121. struct bdb_driver_features driver_features;
  122. };
  123. static void virt_vbt_generation(struct vbt *v)
  124. {
  125. int num_child;
  126. memset(v, 0, sizeof(struct vbt));
  127. v->header.signature[0] = '$';
  128. v->header.signature[1] = 'V';
  129. v->header.signature[2] = 'B';
  130. v->header.signature[3] = 'T';
  131. /* there's features depending on version! */
  132. v->header.version = 155;
  133. v->header.header_size = sizeof(v->header);
  134. v->header.vbt_size = sizeof(struct vbt);
  135. v->header.bdb_offset = offsetof(struct vbt, bdb_header);
  136. strcpy(&v->bdb_header.signature[0], "BIOS_DATA_BLOCK");
  137. v->bdb_header.version = 186; /* child_dev_size = 33 */
  138. v->bdb_header.header_size = sizeof(v->bdb_header);
  139. v->bdb_header.bdb_size = sizeof(struct vbt) - sizeof(struct vbt_header);
  140. /* general features */
  141. v->general_features_header.id = BDB_GENERAL_FEATURES;
  142. v->general_features_header.size = sizeof(struct bdb_general_features);
  143. v->general_features.int_crt_support = 0;
  144. v->general_features.int_tv_support = 0;
  145. /* child device */
  146. num_child = 4; /* each port has one child */
  147. v->general_definitions.child_dev_size =
  148. sizeof(struct efp_child_device_config);
  149. v->general_definitions_header.id = BDB_GENERAL_DEFINITIONS;
  150. /* size will include child devices */
  151. v->general_definitions_header.size =
  152. sizeof(struct bdb_general_definitions) +
  153. num_child * v->general_definitions.child_dev_size;
  154. /* portA */
  155. v->child0.handle = DEVICE_TYPE_EFP1;
  156. v->child0.device_type = DEVICE_TYPE_DP;
  157. v->child0.dvo_port = DVO_PORT_DPA;
  158. v->child0.aux_channel = DP_AUX_A;
  159. v->child0.dp_compat = true;
  160. v->child0.integrated_encoder = true;
  161. /* portB */
  162. v->child1.handle = DEVICE_TYPE_EFP2;
  163. v->child1.device_type = DEVICE_TYPE_DP;
  164. v->child1.dvo_port = DVO_PORT_DPB;
  165. v->child1.aux_channel = DP_AUX_B;
  166. v->child1.dp_compat = true;
  167. v->child1.integrated_encoder = true;
  168. /* portC */
  169. v->child2.handle = DEVICE_TYPE_EFP3;
  170. v->child2.device_type = DEVICE_TYPE_DP;
  171. v->child2.dvo_port = DVO_PORT_DPC;
  172. v->child2.aux_channel = DP_AUX_C;
  173. v->child2.dp_compat = true;
  174. v->child2.integrated_encoder = true;
  175. /* portD */
  176. v->child3.handle = DEVICE_TYPE_EFP4;
  177. v->child3.device_type = DEVICE_TYPE_DP;
  178. v->child3.dvo_port = DVO_PORT_DPD;
  179. v->child3.aux_channel = DP_AUX_D;
  180. v->child3.dp_compat = true;
  181. v->child3.integrated_encoder = true;
  182. /* driver features */
  183. v->driver_features_header.id = BDB_DRIVER_FEATURES;
  184. v->driver_features_header.size = sizeof(struct bdb_driver_features);
  185. v->driver_features.lvds_config = BDB_DRIVER_FEATURE_NO_LVDS;
  186. }
  187. /**
  188. * intel_vgpu_init_opregion - initialize the stuff used to emulate opregion
  189. * @vgpu: a vGPU
  190. *
  191. * Returns:
  192. * Zero on success, negative error code if failed.
  193. */
  194. int intel_vgpu_init_opregion(struct intel_vgpu *vgpu)
  195. {
  196. u8 *buf;
  197. struct opregion_header *header;
  198. struct vbt v;
  199. const char opregion_signature[16] = OPREGION_SIGNATURE;
  200. gvt_dbg_core("init vgpu%d opregion\n", vgpu->id);
  201. vgpu_opregion(vgpu)->va = (void *)__get_free_pages(GFP_KERNEL |
  202. __GFP_ZERO,
  203. get_order(INTEL_GVT_OPREGION_SIZE));
  204. if (!vgpu_opregion(vgpu)->va) {
  205. gvt_err("fail to get memory for vgpu virt opregion\n");
  206. return -ENOMEM;
  207. }
  208. /* emulated opregion with VBT mailbox only */
  209. buf = (u8 *)vgpu_opregion(vgpu)->va;
  210. header = (struct opregion_header *)buf;
  211. memcpy(header->signature, opregion_signature,
  212. sizeof(opregion_signature));
  213. header->size = 0x8;
  214. header->opregion_ver = 0x02000000;
  215. header->mboxes = MBOX_VBT;
  216. /* for unknown reason, the value in LID field is incorrect
  217. * which block the windows guest, so workaround it by force
  218. * setting it to "OPEN"
  219. */
  220. buf[INTEL_GVT_OPREGION_CLID] = 0x3;
  221. /* emulated vbt from virt vbt generation */
  222. virt_vbt_generation(&v);
  223. memcpy(buf + INTEL_GVT_OPREGION_VBT_OFFSET, &v, sizeof(struct vbt));
  224. return 0;
  225. }
  226. /**
  227. * intel_vgpu_opregion_base_write_handler - Opregion base register write handler
  228. *
  229. * @vgpu: a vGPU
  230. * @gpa: guest physical address of opregion
  231. *
  232. * Returns:
  233. * Zero on success, negative error code if failed.
  234. */
  235. int intel_vgpu_opregion_base_write_handler(struct intel_vgpu *vgpu, u32 gpa)
  236. {
  237. int i;
  238. gvt_dbg_core("emulate opregion from kernel\n");
  239. for (i = 0; i < INTEL_GVT_OPREGION_PAGES; i++)
  240. vgpu_opregion(vgpu)->gfn[i] = (gpa >> PAGE_SHIFT) + i;
  241. return 0;
  242. }
  243. /**
  244. * intel_vgpu_clean_opregion - clean the stuff used to emulate opregion
  245. * @vgpu: a vGPU
  246. *
  247. */
  248. void intel_vgpu_clean_opregion(struct intel_vgpu *vgpu)
  249. {
  250. gvt_dbg_core("vgpu%d: clean vgpu opregion\n", vgpu->id);
  251. if (!vgpu_opregion(vgpu)->va)
  252. return;
  253. /* Guest opregion is released by VFIO */
  254. free_pages((unsigned long)vgpu_opregion(vgpu)->va,
  255. get_order(INTEL_GVT_OPREGION_SIZE));
  256. vgpu_opregion(vgpu)->va = NULL;
  257. }
  258. #define GVT_OPREGION_FUNC(scic) \
  259. ({ \
  260. u32 __ret; \
  261. __ret = (scic & OPREGION_SCIC_FUNC_MASK) >> \
  262. OPREGION_SCIC_FUNC_SHIFT; \
  263. __ret; \
  264. })
  265. #define GVT_OPREGION_SUBFUNC(scic) \
  266. ({ \
  267. u32 __ret; \
  268. __ret = (scic & OPREGION_SCIC_SUBFUNC_MASK) >> \
  269. OPREGION_SCIC_SUBFUNC_SHIFT; \
  270. __ret; \
  271. })
  272. static const char *opregion_func_name(u32 func)
  273. {
  274. const char *name = NULL;
  275. switch (func) {
  276. case 0 ... 3:
  277. case 5:
  278. case 7 ... 15:
  279. name = "Reserved";
  280. break;
  281. case 4:
  282. name = "Get BIOS Data";
  283. break;
  284. case 6:
  285. name = "System BIOS Callbacks";
  286. break;
  287. default:
  288. name = "Unknown";
  289. break;
  290. }
  291. return name;
  292. }
  293. static const char *opregion_subfunc_name(u32 subfunc)
  294. {
  295. const char *name = NULL;
  296. switch (subfunc) {
  297. case 0:
  298. name = "Supported Calls";
  299. break;
  300. case 1:
  301. name = "Requested Callbacks";
  302. break;
  303. case 2 ... 3:
  304. case 8 ... 9:
  305. name = "Reserved";
  306. break;
  307. case 5:
  308. name = "Boot Display";
  309. break;
  310. case 6:
  311. name = "TV-Standard/Video-Connector";
  312. break;
  313. case 7:
  314. name = "Internal Graphics";
  315. break;
  316. case 10:
  317. name = "Spread Spectrum Clocks";
  318. break;
  319. case 11:
  320. name = "Get AKSV";
  321. break;
  322. default:
  323. name = "Unknown";
  324. break;
  325. }
  326. return name;
  327. };
  328. static bool querying_capabilities(u32 scic)
  329. {
  330. u32 func, subfunc;
  331. func = GVT_OPREGION_FUNC(scic);
  332. subfunc = GVT_OPREGION_SUBFUNC(scic);
  333. if ((func == INTEL_GVT_OPREGION_SCIC_F_GETBIOSDATA &&
  334. subfunc == INTEL_GVT_OPREGION_SCIC_SF_SUPPRTEDCALLS)
  335. || (func == INTEL_GVT_OPREGION_SCIC_F_GETBIOSDATA &&
  336. subfunc == INTEL_GVT_OPREGION_SCIC_SF_REQEUSTEDCALLBACKS)
  337. || (func == INTEL_GVT_OPREGION_SCIC_F_GETBIOSCALLBACKS &&
  338. subfunc == INTEL_GVT_OPREGION_SCIC_SF_SUPPRTEDCALLS)) {
  339. return true;
  340. }
  341. return false;
  342. }
  343. /**
  344. * intel_vgpu_emulate_opregion_request - emulating OpRegion request
  345. * @vgpu: a vGPU
  346. * @swsci: SWSCI request
  347. *
  348. * Returns:
  349. * Zero on success, negative error code if failed
  350. */
  351. int intel_vgpu_emulate_opregion_request(struct intel_vgpu *vgpu, u32 swsci)
  352. {
  353. u32 scic, parm;
  354. u32 func, subfunc;
  355. u64 scic_pa = 0, parm_pa = 0;
  356. int ret;
  357. scic_pa = (vgpu_opregion(vgpu)->gfn[0] << PAGE_SHIFT) +
  358. INTEL_GVT_OPREGION_SCIC;
  359. parm_pa = (vgpu_opregion(vgpu)->gfn[0] << PAGE_SHIFT) +
  360. INTEL_GVT_OPREGION_PARM;
  361. ret = intel_gvt_read_gpa(vgpu, scic_pa, &scic, sizeof(scic));
  362. if (ret) {
  363. gvt_vgpu_err("guest opregion read error %d, gpa 0x%llx, len %lu\n",
  364. ret, scic_pa, sizeof(scic));
  365. return ret;
  366. }
  367. ret = intel_gvt_read_gpa(vgpu, parm_pa, &parm, sizeof(parm));
  368. if (ret) {
  369. gvt_vgpu_err("guest opregion read error %d, gpa 0x%llx, len %lu\n",
  370. ret, scic_pa, sizeof(scic));
  371. return ret;
  372. }
  373. if (!(swsci & SWSCI_SCI_SELECT)) {
  374. gvt_vgpu_err("requesting SMI service\n");
  375. return 0;
  376. }
  377. /* ignore non 0->1 trasitions */
  378. if ((vgpu_cfg_space(vgpu)[INTEL_GVT_PCI_SWSCI]
  379. & SWSCI_SCI_TRIGGER) ||
  380. !(swsci & SWSCI_SCI_TRIGGER)) {
  381. return 0;
  382. }
  383. func = GVT_OPREGION_FUNC(scic);
  384. subfunc = GVT_OPREGION_SUBFUNC(scic);
  385. if (!querying_capabilities(scic)) {
  386. gvt_vgpu_err("requesting runtime service: func \"%s\","
  387. " subfunc \"%s\"\n",
  388. opregion_func_name(func),
  389. opregion_subfunc_name(subfunc));
  390. /*
  391. * emulate exit status of function call, '0' means
  392. * "failure, generic, unsupported or unknown cause"
  393. */
  394. scic &= ~OPREGION_SCIC_EXIT_MASK;
  395. goto out;
  396. }
  397. scic = 0;
  398. parm = 0;
  399. out:
  400. ret = intel_gvt_write_gpa(vgpu, scic_pa, &scic, sizeof(scic));
  401. if (ret) {
  402. gvt_vgpu_err("guest opregion write error %d, gpa 0x%llx, len %lu\n",
  403. ret, scic_pa, sizeof(scic));
  404. return ret;
  405. }
  406. ret = intel_gvt_write_gpa(vgpu, parm_pa, &parm, sizeof(parm));
  407. if (ret) {
  408. gvt_vgpu_err("guest opregion write error %d, gpa 0x%llx, len %lu\n",
  409. ret, scic_pa, sizeof(scic));
  410. return ret;
  411. }
  412. return 0;
  413. }