tc358762.c 6.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2020 Marek Vasut <[email protected]>
  4. *
  5. * Based on tc358764.c by
  6. * Andrzej Hajda <[email protected]>
  7. * Maciej Purski <[email protected]>
  8. *
  9. * Based on rpi_touchscreen.c by
  10. * Eric Anholt <[email protected]>
  11. */
  12. #include <linux/delay.h>
  13. #include <linux/module.h>
  14. #include <linux/of_graph.h>
  15. #include <linux/regulator/consumer.h>
  16. #include <video/mipi_display.h>
  17. #include <drm/drm_atomic_helper.h>
  18. #include <drm/drm_crtc.h>
  19. #include <drm/drm_fb_helper.h>
  20. #include <drm/drm_mipi_dsi.h>
  21. #include <drm/drm_of.h>
  22. #include <drm/drm_panel.h>
  23. #include <drm/drm_print.h>
  24. #include <drm/drm_probe_helper.h>
  25. /* PPI layer registers */
  26. #define PPI_STARTPPI 0x0104 /* START control bit */
  27. #define PPI_LPTXTIMECNT 0x0114 /* LPTX timing signal */
  28. #define PPI_D0S_ATMR 0x0144
  29. #define PPI_D1S_ATMR 0x0148
  30. #define PPI_D0S_CLRSIPOCOUNT 0x0164 /* Assertion timer for Lane 0 */
  31. #define PPI_D1S_CLRSIPOCOUNT 0x0168 /* Assertion timer for Lane 1 */
  32. #define PPI_START_FUNCTION 1
  33. /* DSI layer registers */
  34. #define DSI_STARTDSI 0x0204 /* START control bit of DSI-TX */
  35. #define DSI_LANEENABLE 0x0210 /* Enables each lane */
  36. #define DSI_RX_START 1
  37. /* LCDC/DPI Host Registers */
  38. #define LCDCTRL 0x0420
  39. /* SPI Master Registers */
  40. #define SPICMR 0x0450
  41. #define SPITCR 0x0454
  42. /* System Controller Registers */
  43. #define SYSCTRL 0x0464
  44. /* System registers */
  45. #define LPX_PERIOD 3
  46. /* Lane enable PPI and DSI register bits */
  47. #define LANEENABLE_CLEN BIT(0)
  48. #define LANEENABLE_L0EN BIT(1)
  49. #define LANEENABLE_L1EN BIT(2)
  50. struct tc358762 {
  51. struct device *dev;
  52. struct drm_bridge bridge;
  53. struct regulator *regulator;
  54. struct drm_bridge *panel_bridge;
  55. bool pre_enabled;
  56. int error;
  57. };
  58. static int tc358762_clear_error(struct tc358762 *ctx)
  59. {
  60. int ret = ctx->error;
  61. ctx->error = 0;
  62. return ret;
  63. }
  64. static void tc358762_write(struct tc358762 *ctx, u16 addr, u32 val)
  65. {
  66. struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
  67. ssize_t ret;
  68. u8 data[6];
  69. if (ctx->error)
  70. return;
  71. data[0] = addr;
  72. data[1] = addr >> 8;
  73. data[2] = val;
  74. data[3] = val >> 8;
  75. data[4] = val >> 16;
  76. data[5] = val >> 24;
  77. ret = mipi_dsi_generic_write(dsi, data, sizeof(data));
  78. if (ret < 0)
  79. ctx->error = ret;
  80. }
  81. static inline struct tc358762 *bridge_to_tc358762(struct drm_bridge *bridge)
  82. {
  83. return container_of(bridge, struct tc358762, bridge);
  84. }
  85. static int tc358762_init(struct tc358762 *ctx)
  86. {
  87. tc358762_write(ctx, DSI_LANEENABLE,
  88. LANEENABLE_L0EN | LANEENABLE_CLEN);
  89. tc358762_write(ctx, PPI_D0S_CLRSIPOCOUNT, 5);
  90. tc358762_write(ctx, PPI_D1S_CLRSIPOCOUNT, 5);
  91. tc358762_write(ctx, PPI_D0S_ATMR, 0);
  92. tc358762_write(ctx, PPI_D1S_ATMR, 0);
  93. tc358762_write(ctx, PPI_LPTXTIMECNT, LPX_PERIOD);
  94. tc358762_write(ctx, SPICMR, 0x00);
  95. tc358762_write(ctx, LCDCTRL, 0x00100150);
  96. tc358762_write(ctx, SYSCTRL, 0x040f);
  97. msleep(100);
  98. tc358762_write(ctx, PPI_STARTPPI, PPI_START_FUNCTION);
  99. tc358762_write(ctx, DSI_STARTDSI, DSI_RX_START);
  100. msleep(100);
  101. return tc358762_clear_error(ctx);
  102. }
  103. static void tc358762_post_disable(struct drm_bridge *bridge)
  104. {
  105. struct tc358762 *ctx = bridge_to_tc358762(bridge);
  106. int ret;
  107. /*
  108. * The post_disable hook might be called multiple times.
  109. * We want to avoid regulator imbalance below.
  110. */
  111. if (!ctx->pre_enabled)
  112. return;
  113. ctx->pre_enabled = false;
  114. ret = regulator_disable(ctx->regulator);
  115. if (ret < 0)
  116. dev_err(ctx->dev, "error disabling regulators (%d)\n", ret);
  117. }
  118. static void tc358762_pre_enable(struct drm_bridge *bridge)
  119. {
  120. struct tc358762 *ctx = bridge_to_tc358762(bridge);
  121. int ret;
  122. ret = regulator_enable(ctx->regulator);
  123. if (ret < 0)
  124. dev_err(ctx->dev, "error enabling regulators (%d)\n", ret);
  125. ret = tc358762_init(ctx);
  126. if (ret < 0)
  127. dev_err(ctx->dev, "error initializing bridge (%d)\n", ret);
  128. ctx->pre_enabled = true;
  129. }
  130. static int tc358762_attach(struct drm_bridge *bridge,
  131. enum drm_bridge_attach_flags flags)
  132. {
  133. struct tc358762 *ctx = bridge_to_tc358762(bridge);
  134. return drm_bridge_attach(bridge->encoder, ctx->panel_bridge,
  135. bridge, flags);
  136. }
  137. static const struct drm_bridge_funcs tc358762_bridge_funcs = {
  138. .post_disable = tc358762_post_disable,
  139. .pre_enable = tc358762_pre_enable,
  140. .attach = tc358762_attach,
  141. };
  142. static int tc358762_parse_dt(struct tc358762 *ctx)
  143. {
  144. struct drm_bridge *panel_bridge;
  145. struct device *dev = ctx->dev;
  146. panel_bridge = devm_drm_of_get_bridge(dev, dev->of_node, 1, 0);
  147. if (IS_ERR(panel_bridge))
  148. return PTR_ERR(panel_bridge);
  149. ctx->panel_bridge = panel_bridge;
  150. return 0;
  151. }
  152. static int tc358762_configure_regulators(struct tc358762 *ctx)
  153. {
  154. ctx->regulator = devm_regulator_get(ctx->dev, "vddc");
  155. if (IS_ERR(ctx->regulator))
  156. return PTR_ERR(ctx->regulator);
  157. return 0;
  158. }
  159. static int tc358762_probe(struct mipi_dsi_device *dsi)
  160. {
  161. struct device *dev = &dsi->dev;
  162. struct tc358762 *ctx;
  163. int ret;
  164. ctx = devm_kzalloc(dev, sizeof(struct tc358762), GFP_KERNEL);
  165. if (!ctx)
  166. return -ENOMEM;
  167. mipi_dsi_set_drvdata(dsi, ctx);
  168. ctx->dev = dev;
  169. ctx->pre_enabled = false;
  170. /* TODO: Find out how to get dual-lane mode working */
  171. dsi->lanes = 1;
  172. dsi->format = MIPI_DSI_FMT_RGB888;
  173. dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
  174. MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_VIDEO_HSE;
  175. ret = tc358762_parse_dt(ctx);
  176. if (ret < 0)
  177. return ret;
  178. ret = tc358762_configure_regulators(ctx);
  179. if (ret < 0)
  180. return ret;
  181. ctx->bridge.funcs = &tc358762_bridge_funcs;
  182. ctx->bridge.type = DRM_MODE_CONNECTOR_DPI;
  183. ctx->bridge.of_node = dev->of_node;
  184. drm_bridge_add(&ctx->bridge);
  185. ret = mipi_dsi_attach(dsi);
  186. if (ret < 0) {
  187. drm_bridge_remove(&ctx->bridge);
  188. dev_err(dev, "failed to attach dsi\n");
  189. }
  190. return ret;
  191. }
  192. static void tc358762_remove(struct mipi_dsi_device *dsi)
  193. {
  194. struct tc358762 *ctx = mipi_dsi_get_drvdata(dsi);
  195. mipi_dsi_detach(dsi);
  196. drm_bridge_remove(&ctx->bridge);
  197. }
  198. static const struct of_device_id tc358762_of_match[] = {
  199. { .compatible = "toshiba,tc358762" },
  200. { }
  201. };
  202. MODULE_DEVICE_TABLE(of, tc358762_of_match);
  203. static struct mipi_dsi_driver tc358762_driver = {
  204. .probe = tc358762_probe,
  205. .remove = tc358762_remove,
  206. .driver = {
  207. .name = "tc358762",
  208. .of_match_table = tc358762_of_match,
  209. },
  210. };
  211. module_mipi_dsi_driver(tc358762_driver);
  212. MODULE_AUTHOR("Marek Vasut <[email protected]>");
  213. MODULE_DESCRIPTION("MIPI-DSI based Driver for TC358762 DSI/DPI Bridge");
  214. MODULE_LICENSE("GPL v2");