lontium-lt9611uxc.c 26 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2019-2020. Linaro Limited.
  5. */
  6. #include <linux/firmware.h>
  7. #include <linux/gpio/consumer.h>
  8. #include <linux/i2c.h>
  9. #include <linux/interrupt.h>
  10. #include <linux/module.h>
  11. #include <linux/mutex.h>
  12. #include <linux/of_graph.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/regmap.h>
  15. #include <linux/regulator/consumer.h>
  16. #include <linux/wait.h>
  17. #include <linux/workqueue.h>
  18. #include <sound/hdmi-codec.h>
  19. #include <drm/drm_atomic_helper.h>
  20. #include <drm/drm_bridge.h>
  21. #include <drm/drm_mipi_dsi.h>
  22. #include <drm/drm_print.h>
  23. #include <drm/drm_probe_helper.h>
  24. #define EDID_BLOCK_SIZE 128
  25. #define EDID_NUM_BLOCKS 2
  26. struct lt9611uxc {
  27. struct device *dev;
  28. struct drm_bridge bridge;
  29. struct drm_connector connector;
  30. struct regmap *regmap;
  31. /* Protects all accesses to registers by stopping the on-chip MCU */
  32. struct mutex ocm_lock;
  33. struct wait_queue_head wq;
  34. struct work_struct work;
  35. struct device_node *dsi0_node;
  36. struct device_node *dsi1_node;
  37. struct mipi_dsi_device *dsi0;
  38. struct mipi_dsi_device *dsi1;
  39. struct platform_device *audio_pdev;
  40. struct gpio_desc *reset_gpio;
  41. struct gpio_desc *enable_gpio;
  42. struct regulator_bulk_data supplies[2];
  43. struct i2c_client *client;
  44. bool hpd_supported;
  45. bool edid_read;
  46. /* can be accessed from different threads, so protect this with ocm_lock */
  47. bool hdmi_connected;
  48. uint8_t fw_version;
  49. };
  50. #define LT9611_PAGE_CONTROL 0xff
  51. static const struct regmap_range_cfg lt9611uxc_ranges[] = {
  52. {
  53. .name = "register_range",
  54. .range_min = 0,
  55. .range_max = 0xd0ff,
  56. .selector_reg = LT9611_PAGE_CONTROL,
  57. .selector_mask = 0xff,
  58. .selector_shift = 0,
  59. .window_start = 0,
  60. .window_len = 0x100,
  61. },
  62. };
  63. static const struct regmap_config lt9611uxc_regmap_config = {
  64. .reg_bits = 8,
  65. .val_bits = 8,
  66. .max_register = 0xffff,
  67. .ranges = lt9611uxc_ranges,
  68. .num_ranges = ARRAY_SIZE(lt9611uxc_ranges),
  69. };
  70. struct lt9611uxc_mode {
  71. u16 hdisplay;
  72. u16 vdisplay;
  73. u8 vrefresh;
  74. };
  75. /*
  76. * This chip supports only a fixed set of modes.
  77. * Enumerate them here to check whether the mode is supported.
  78. */
  79. static struct lt9611uxc_mode lt9611uxc_modes[] = {
  80. { 1920, 1080, 60 },
  81. { 1920, 1080, 30 },
  82. { 1920, 1080, 25 },
  83. { 1366, 768, 60 },
  84. { 1360, 768, 60 },
  85. { 1280, 1024, 60 },
  86. { 1280, 800, 60 },
  87. { 1280, 720, 60 },
  88. { 1280, 720, 50 },
  89. { 1280, 720, 30 },
  90. { 1152, 864, 60 },
  91. { 1024, 768, 60 },
  92. { 800, 600, 60 },
  93. { 720, 576, 50 },
  94. { 720, 480, 60 },
  95. { 640, 480, 60 },
  96. };
  97. static struct lt9611uxc *bridge_to_lt9611uxc(struct drm_bridge *bridge)
  98. {
  99. return container_of(bridge, struct lt9611uxc, bridge);
  100. }
  101. static struct lt9611uxc *connector_to_lt9611uxc(struct drm_connector *connector)
  102. {
  103. return container_of(connector, struct lt9611uxc, connector);
  104. }
  105. static void lt9611uxc_lock(struct lt9611uxc *lt9611uxc)
  106. {
  107. mutex_lock(&lt9611uxc->ocm_lock);
  108. regmap_write(lt9611uxc->regmap, 0x80ee, 0x01);
  109. }
  110. static void lt9611uxc_unlock(struct lt9611uxc *lt9611uxc)
  111. {
  112. regmap_write(lt9611uxc->regmap, 0x80ee, 0x00);
  113. msleep(50);
  114. mutex_unlock(&lt9611uxc->ocm_lock);
  115. }
  116. static irqreturn_t lt9611uxc_irq_thread_handler(int irq, void *dev_id)
  117. {
  118. struct lt9611uxc *lt9611uxc = dev_id;
  119. unsigned int irq_status = 0;
  120. unsigned int hpd_status = 0;
  121. lt9611uxc_lock(lt9611uxc);
  122. regmap_read(lt9611uxc->regmap, 0xb022, &irq_status);
  123. regmap_read(lt9611uxc->regmap, 0xb023, &hpd_status);
  124. if (irq_status)
  125. regmap_write(lt9611uxc->regmap, 0xb022, 0);
  126. if (irq_status & BIT(0)) {
  127. lt9611uxc->edid_read = !!(hpd_status & BIT(0));
  128. wake_up_all(&lt9611uxc->wq);
  129. }
  130. if (irq_status & BIT(1)) {
  131. lt9611uxc->hdmi_connected = hpd_status & BIT(1);
  132. schedule_work(&lt9611uxc->work);
  133. }
  134. lt9611uxc_unlock(lt9611uxc);
  135. return IRQ_HANDLED;
  136. }
  137. static void lt9611uxc_hpd_work(struct work_struct *work)
  138. {
  139. struct lt9611uxc *lt9611uxc = container_of(work, struct lt9611uxc, work);
  140. bool connected;
  141. if (lt9611uxc->connector.dev) {
  142. if (lt9611uxc->connector.dev->mode_config.funcs)
  143. drm_kms_helper_hotplug_event(lt9611uxc->connector.dev);
  144. } else {
  145. mutex_lock(&lt9611uxc->ocm_lock);
  146. connected = lt9611uxc->hdmi_connected;
  147. mutex_unlock(&lt9611uxc->ocm_lock);
  148. drm_bridge_hpd_notify(&lt9611uxc->bridge,
  149. connected ?
  150. connector_status_connected :
  151. connector_status_disconnected);
  152. }
  153. }
  154. static void lt9611uxc_reset(struct lt9611uxc *lt9611uxc)
  155. {
  156. gpiod_set_value_cansleep(lt9611uxc->reset_gpio, 1);
  157. msleep(20);
  158. gpiod_set_value_cansleep(lt9611uxc->reset_gpio, 0);
  159. msleep(20);
  160. gpiod_set_value_cansleep(lt9611uxc->reset_gpio, 1);
  161. msleep(300);
  162. }
  163. static void lt9611uxc_assert_5v(struct lt9611uxc *lt9611uxc)
  164. {
  165. if (!lt9611uxc->enable_gpio)
  166. return;
  167. gpiod_set_value_cansleep(lt9611uxc->enable_gpio, 1);
  168. msleep(20);
  169. }
  170. static int lt9611uxc_regulator_init(struct lt9611uxc *lt9611uxc)
  171. {
  172. int ret;
  173. lt9611uxc->supplies[0].supply = "vdd";
  174. lt9611uxc->supplies[1].supply = "vcc";
  175. ret = devm_regulator_bulk_get(lt9611uxc->dev, 2, lt9611uxc->supplies);
  176. if (ret < 0)
  177. return ret;
  178. return regulator_set_load(lt9611uxc->supplies[0].consumer, 200000);
  179. }
  180. static int lt9611uxc_regulator_enable(struct lt9611uxc *lt9611uxc)
  181. {
  182. int ret;
  183. ret = regulator_enable(lt9611uxc->supplies[0].consumer);
  184. if (ret < 0)
  185. return ret;
  186. usleep_range(1000, 10000); /* 50000 according to dtsi */
  187. ret = regulator_enable(lt9611uxc->supplies[1].consumer);
  188. if (ret < 0) {
  189. regulator_disable(lt9611uxc->supplies[0].consumer);
  190. return ret;
  191. }
  192. return 0;
  193. }
  194. static struct lt9611uxc_mode *lt9611uxc_find_mode(const struct drm_display_mode *mode)
  195. {
  196. int i;
  197. for (i = 0; i < ARRAY_SIZE(lt9611uxc_modes); i++) {
  198. if (lt9611uxc_modes[i].hdisplay == mode->hdisplay &&
  199. lt9611uxc_modes[i].vdisplay == mode->vdisplay &&
  200. lt9611uxc_modes[i].vrefresh == drm_mode_vrefresh(mode)) {
  201. return &lt9611uxc_modes[i];
  202. }
  203. }
  204. return NULL;
  205. }
  206. static struct mipi_dsi_device *lt9611uxc_attach_dsi(struct lt9611uxc *lt9611uxc,
  207. struct device_node *dsi_node)
  208. {
  209. const struct mipi_dsi_device_info info = { "lt9611uxc", 0, NULL };
  210. struct mipi_dsi_device *dsi;
  211. struct mipi_dsi_host *host;
  212. struct device *dev = lt9611uxc->dev;
  213. int ret;
  214. host = of_find_mipi_dsi_host_by_node(dsi_node);
  215. if (!host) {
  216. dev_err(dev, "failed to find dsi host\n");
  217. return ERR_PTR(-EPROBE_DEFER);
  218. }
  219. dsi = devm_mipi_dsi_device_register_full(dev, host, &info);
  220. if (IS_ERR(dsi)) {
  221. dev_err(dev, "failed to create dsi device\n");
  222. return dsi;
  223. }
  224. dsi->lanes = 4;
  225. dsi->format = MIPI_DSI_FMT_RGB888;
  226. dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
  227. MIPI_DSI_MODE_VIDEO_HSE;
  228. ret = devm_mipi_dsi_attach(dev, dsi);
  229. if (ret < 0) {
  230. dev_err(dev, "failed to attach dsi to host\n");
  231. return ERR_PTR(ret);
  232. }
  233. return dsi;
  234. }
  235. static int lt9611uxc_connector_get_modes(struct drm_connector *connector)
  236. {
  237. struct lt9611uxc *lt9611uxc = connector_to_lt9611uxc(connector);
  238. unsigned int count;
  239. struct edid *edid;
  240. edid = lt9611uxc->bridge.funcs->get_edid(&lt9611uxc->bridge, connector);
  241. drm_connector_update_edid_property(connector, edid);
  242. count = drm_add_edid_modes(connector, edid);
  243. kfree(edid);
  244. return count;
  245. }
  246. static enum drm_connector_status lt9611uxc_connector_detect(struct drm_connector *connector,
  247. bool force)
  248. {
  249. struct lt9611uxc *lt9611uxc = connector_to_lt9611uxc(connector);
  250. return lt9611uxc->bridge.funcs->detect(&lt9611uxc->bridge);
  251. }
  252. static enum drm_mode_status lt9611uxc_connector_mode_valid(struct drm_connector *connector,
  253. struct drm_display_mode *mode)
  254. {
  255. struct lt9611uxc_mode *lt9611uxc_mode = lt9611uxc_find_mode(mode);
  256. return lt9611uxc_mode ? MODE_OK : MODE_BAD;
  257. }
  258. static const struct drm_connector_helper_funcs lt9611uxc_bridge_connector_helper_funcs = {
  259. .get_modes = lt9611uxc_connector_get_modes,
  260. .mode_valid = lt9611uxc_connector_mode_valid,
  261. };
  262. static const struct drm_connector_funcs lt9611uxc_bridge_connector_funcs = {
  263. .fill_modes = drm_helper_probe_single_connector_modes,
  264. .detect = lt9611uxc_connector_detect,
  265. .destroy = drm_connector_cleanup,
  266. .reset = drm_atomic_helper_connector_reset,
  267. .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
  268. .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  269. };
  270. static int lt9611uxc_connector_init(struct drm_bridge *bridge, struct lt9611uxc *lt9611uxc)
  271. {
  272. int ret;
  273. if (!bridge->encoder) {
  274. DRM_ERROR("Parent encoder object not found");
  275. return -ENODEV;
  276. }
  277. lt9611uxc->connector.polled = DRM_CONNECTOR_POLL_HPD;
  278. drm_connector_helper_add(&lt9611uxc->connector,
  279. &lt9611uxc_bridge_connector_helper_funcs);
  280. ret = drm_connector_init(bridge->dev, &lt9611uxc->connector,
  281. &lt9611uxc_bridge_connector_funcs,
  282. DRM_MODE_CONNECTOR_HDMIA);
  283. if (ret) {
  284. DRM_ERROR("Failed to initialize connector with drm\n");
  285. return ret;
  286. }
  287. return drm_connector_attach_encoder(&lt9611uxc->connector, bridge->encoder);
  288. }
  289. static int lt9611uxc_bridge_attach(struct drm_bridge *bridge,
  290. enum drm_bridge_attach_flags flags)
  291. {
  292. struct lt9611uxc *lt9611uxc = bridge_to_lt9611uxc(bridge);
  293. int ret;
  294. if (!(flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR)) {
  295. ret = lt9611uxc_connector_init(bridge, lt9611uxc);
  296. if (ret < 0)
  297. return ret;
  298. }
  299. return 0;
  300. }
  301. static enum drm_mode_status
  302. lt9611uxc_bridge_mode_valid(struct drm_bridge *bridge,
  303. const struct drm_display_info *info,
  304. const struct drm_display_mode *mode)
  305. {
  306. struct lt9611uxc_mode *lt9611uxc_mode;
  307. lt9611uxc_mode = lt9611uxc_find_mode(mode);
  308. return lt9611uxc_mode ? MODE_OK : MODE_BAD;
  309. }
  310. static void lt9611uxc_video_setup(struct lt9611uxc *lt9611uxc,
  311. const struct drm_display_mode *mode)
  312. {
  313. u32 h_total, hactive, hsync_len, hfront_porch;
  314. u32 v_total, vactive, vsync_len, vfront_porch;
  315. h_total = mode->htotal;
  316. v_total = mode->vtotal;
  317. hactive = mode->hdisplay;
  318. hsync_len = mode->hsync_end - mode->hsync_start;
  319. hfront_porch = mode->hsync_start - mode->hdisplay;
  320. vactive = mode->vdisplay;
  321. vsync_len = mode->vsync_end - mode->vsync_start;
  322. vfront_porch = mode->vsync_start - mode->vdisplay;
  323. regmap_write(lt9611uxc->regmap, 0xd00d, (u8)(v_total / 256));
  324. regmap_write(lt9611uxc->regmap, 0xd00e, (u8)(v_total % 256));
  325. regmap_write(lt9611uxc->regmap, 0xd00f, (u8)(vactive / 256));
  326. regmap_write(lt9611uxc->regmap, 0xd010, (u8)(vactive % 256));
  327. regmap_write(lt9611uxc->regmap, 0xd011, (u8)(h_total / 256));
  328. regmap_write(lt9611uxc->regmap, 0xd012, (u8)(h_total % 256));
  329. regmap_write(lt9611uxc->regmap, 0xd013, (u8)(hactive / 256));
  330. regmap_write(lt9611uxc->regmap, 0xd014, (u8)(hactive % 256));
  331. regmap_write(lt9611uxc->regmap, 0xd015, (u8)(vsync_len % 256));
  332. regmap_update_bits(lt9611uxc->regmap, 0xd016, 0xf, (u8)(hsync_len / 256));
  333. regmap_write(lt9611uxc->regmap, 0xd017, (u8)(hsync_len % 256));
  334. regmap_update_bits(lt9611uxc->regmap, 0xd018, 0xf, (u8)(vfront_porch / 256));
  335. regmap_write(lt9611uxc->regmap, 0xd019, (u8)(vfront_porch % 256));
  336. regmap_update_bits(lt9611uxc->regmap, 0xd01a, 0xf, (u8)(hfront_porch / 256));
  337. regmap_write(lt9611uxc->regmap, 0xd01b, (u8)(hfront_porch % 256));
  338. }
  339. static void lt9611uxc_bridge_mode_set(struct drm_bridge *bridge,
  340. const struct drm_display_mode *mode,
  341. const struct drm_display_mode *adj_mode)
  342. {
  343. struct lt9611uxc *lt9611uxc = bridge_to_lt9611uxc(bridge);
  344. lt9611uxc_lock(lt9611uxc);
  345. lt9611uxc_video_setup(lt9611uxc, mode);
  346. lt9611uxc_unlock(lt9611uxc);
  347. }
  348. static enum drm_connector_status lt9611uxc_bridge_detect(struct drm_bridge *bridge)
  349. {
  350. struct lt9611uxc *lt9611uxc = bridge_to_lt9611uxc(bridge);
  351. unsigned int reg_val = 0;
  352. int ret;
  353. bool connected = true;
  354. lt9611uxc_lock(lt9611uxc);
  355. if (lt9611uxc->hpd_supported) {
  356. ret = regmap_read(lt9611uxc->regmap, 0xb023, &reg_val);
  357. if (ret)
  358. dev_err(lt9611uxc->dev, "failed to read hpd status: %d\n", ret);
  359. else
  360. connected = reg_val & BIT(1);
  361. }
  362. lt9611uxc->hdmi_connected = connected;
  363. lt9611uxc_unlock(lt9611uxc);
  364. return connected ? connector_status_connected :
  365. connector_status_disconnected;
  366. }
  367. static int lt9611uxc_wait_for_edid(struct lt9611uxc *lt9611uxc)
  368. {
  369. return wait_event_interruptible_timeout(lt9611uxc->wq, lt9611uxc->edid_read,
  370. msecs_to_jiffies(500));
  371. }
  372. static int lt9611uxc_get_edid_block(void *data, u8 *buf, unsigned int block, size_t len)
  373. {
  374. struct lt9611uxc *lt9611uxc = data;
  375. int ret;
  376. if (len > EDID_BLOCK_SIZE)
  377. return -EINVAL;
  378. if (block >= EDID_NUM_BLOCKS)
  379. return -EINVAL;
  380. lt9611uxc_lock(lt9611uxc);
  381. regmap_write(lt9611uxc->regmap, 0xb00b, 0x10);
  382. regmap_write(lt9611uxc->regmap, 0xb00a, block * EDID_BLOCK_SIZE);
  383. ret = regmap_noinc_read(lt9611uxc->regmap, 0xb0b0, buf, len);
  384. if (ret)
  385. dev_err(lt9611uxc->dev, "edid read failed: %d\n", ret);
  386. lt9611uxc_unlock(lt9611uxc);
  387. return 0;
  388. };
  389. static struct edid *lt9611uxc_bridge_get_edid(struct drm_bridge *bridge,
  390. struct drm_connector *connector)
  391. {
  392. struct lt9611uxc *lt9611uxc = bridge_to_lt9611uxc(bridge);
  393. int ret;
  394. ret = lt9611uxc_wait_for_edid(lt9611uxc);
  395. if (ret < 0) {
  396. dev_err(lt9611uxc->dev, "wait for EDID failed: %d\n", ret);
  397. return NULL;
  398. } else if (ret == 0) {
  399. dev_err(lt9611uxc->dev, "wait for EDID timeout\n");
  400. return NULL;
  401. }
  402. return drm_do_get_edid(connector, lt9611uxc_get_edid_block, lt9611uxc);
  403. }
  404. static const struct drm_bridge_funcs lt9611uxc_bridge_funcs = {
  405. .attach = lt9611uxc_bridge_attach,
  406. .mode_valid = lt9611uxc_bridge_mode_valid,
  407. .mode_set = lt9611uxc_bridge_mode_set,
  408. .detect = lt9611uxc_bridge_detect,
  409. .get_edid = lt9611uxc_bridge_get_edid,
  410. };
  411. static int lt9611uxc_parse_dt(struct device *dev,
  412. struct lt9611uxc *lt9611uxc)
  413. {
  414. lt9611uxc->dsi0_node = of_graph_get_remote_node(dev->of_node, 0, -1);
  415. if (!lt9611uxc->dsi0_node) {
  416. dev_err(lt9611uxc->dev, "failed to get remote node for primary dsi\n");
  417. return -ENODEV;
  418. }
  419. lt9611uxc->dsi1_node = of_graph_get_remote_node(dev->of_node, 1, -1);
  420. return 0;
  421. }
  422. static int lt9611uxc_gpio_init(struct lt9611uxc *lt9611uxc)
  423. {
  424. struct device *dev = lt9611uxc->dev;
  425. lt9611uxc->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
  426. if (IS_ERR(lt9611uxc->reset_gpio)) {
  427. dev_err(dev, "failed to acquire reset gpio\n");
  428. return PTR_ERR(lt9611uxc->reset_gpio);
  429. }
  430. lt9611uxc->enable_gpio = devm_gpiod_get_optional(dev, "enable", GPIOD_OUT_LOW);
  431. if (IS_ERR(lt9611uxc->enable_gpio)) {
  432. dev_err(dev, "failed to acquire enable gpio\n");
  433. return PTR_ERR(lt9611uxc->enable_gpio);
  434. }
  435. return 0;
  436. }
  437. static int lt9611uxc_read_device_rev(struct lt9611uxc *lt9611uxc)
  438. {
  439. unsigned int rev0, rev1, rev2;
  440. int ret;
  441. lt9611uxc_lock(lt9611uxc);
  442. ret = regmap_read(lt9611uxc->regmap, 0x8100, &rev0);
  443. ret |= regmap_read(lt9611uxc->regmap, 0x8101, &rev1);
  444. ret |= regmap_read(lt9611uxc->regmap, 0x8102, &rev2);
  445. if (ret)
  446. dev_err(lt9611uxc->dev, "failed to read revision: %d\n", ret);
  447. else
  448. dev_info(lt9611uxc->dev, "LT9611 revision: 0x%02x.%02x.%02x\n", rev0, rev1, rev2);
  449. lt9611uxc_unlock(lt9611uxc);
  450. return ret;
  451. }
  452. static int lt9611uxc_read_version(struct lt9611uxc *lt9611uxc)
  453. {
  454. unsigned int rev;
  455. int ret;
  456. lt9611uxc_lock(lt9611uxc);
  457. ret = regmap_read(lt9611uxc->regmap, 0xb021, &rev);
  458. if (ret)
  459. dev_err(lt9611uxc->dev, "failed to read revision: %d\n", ret);
  460. else
  461. dev_info(lt9611uxc->dev, "LT9611 version: 0x%02x\n", rev);
  462. lt9611uxc_unlock(lt9611uxc);
  463. return ret < 0 ? ret : rev;
  464. }
  465. static int lt9611uxc_hdmi_hw_params(struct device *dev, void *data,
  466. struct hdmi_codec_daifmt *fmt,
  467. struct hdmi_codec_params *hparms)
  468. {
  469. /*
  470. * LT9611UXC will automatically detect rate and sample size, so no need
  471. * to setup anything here.
  472. */
  473. return 0;
  474. }
  475. static void lt9611uxc_audio_shutdown(struct device *dev, void *data)
  476. {
  477. }
  478. static int lt9611uxc_hdmi_i2s_get_dai_id(struct snd_soc_component *component,
  479. struct device_node *endpoint)
  480. {
  481. struct of_endpoint of_ep;
  482. int ret;
  483. ret = of_graph_parse_endpoint(endpoint, &of_ep);
  484. if (ret < 0)
  485. return ret;
  486. /*
  487. * HDMI sound should be located as reg = <2>
  488. * Then, it is sound port 0
  489. */
  490. if (of_ep.port == 2)
  491. return 0;
  492. return -EINVAL;
  493. }
  494. static const struct hdmi_codec_ops lt9611uxc_codec_ops = {
  495. .hw_params = lt9611uxc_hdmi_hw_params,
  496. .audio_shutdown = lt9611uxc_audio_shutdown,
  497. .get_dai_id = lt9611uxc_hdmi_i2s_get_dai_id,
  498. };
  499. static int lt9611uxc_audio_init(struct device *dev, struct lt9611uxc *lt9611uxc)
  500. {
  501. struct hdmi_codec_pdata codec_data = {
  502. .ops = &lt9611uxc_codec_ops,
  503. .max_i2s_channels = 2,
  504. .i2s = 1,
  505. .data = lt9611uxc,
  506. };
  507. lt9611uxc->audio_pdev =
  508. platform_device_register_data(dev, HDMI_CODEC_DRV_NAME,
  509. PLATFORM_DEVID_AUTO,
  510. &codec_data, sizeof(codec_data));
  511. return PTR_ERR_OR_ZERO(lt9611uxc->audio_pdev);
  512. }
  513. static void lt9611uxc_audio_exit(struct lt9611uxc *lt9611uxc)
  514. {
  515. if (lt9611uxc->audio_pdev) {
  516. platform_device_unregister(lt9611uxc->audio_pdev);
  517. lt9611uxc->audio_pdev = NULL;
  518. }
  519. }
  520. #define LT9611UXC_FW_PAGE_SIZE 32
  521. static void lt9611uxc_firmware_write_page(struct lt9611uxc *lt9611uxc, u16 addr, const u8 *buf)
  522. {
  523. struct reg_sequence seq_write_prepare[] = {
  524. REG_SEQ0(0x805a, 0x04),
  525. REG_SEQ0(0x805a, 0x00),
  526. REG_SEQ0(0x805e, 0xdf),
  527. REG_SEQ0(0x805a, 0x20),
  528. REG_SEQ0(0x805a, 0x00),
  529. REG_SEQ0(0x8058, 0x21),
  530. };
  531. struct reg_sequence seq_write_addr[] = {
  532. REG_SEQ0(0x805b, (addr >> 16) & 0xff),
  533. REG_SEQ0(0x805c, (addr >> 8) & 0xff),
  534. REG_SEQ0(0x805d, addr & 0xff),
  535. REG_SEQ0(0x805a, 0x10),
  536. REG_SEQ0(0x805a, 0x00),
  537. };
  538. regmap_write(lt9611uxc->regmap, 0x8108, 0xbf);
  539. msleep(20);
  540. regmap_write(lt9611uxc->regmap, 0x8108, 0xff);
  541. msleep(20);
  542. regmap_multi_reg_write(lt9611uxc->regmap, seq_write_prepare, ARRAY_SIZE(seq_write_prepare));
  543. regmap_noinc_write(lt9611uxc->regmap, 0x8059, buf, LT9611UXC_FW_PAGE_SIZE);
  544. regmap_multi_reg_write(lt9611uxc->regmap, seq_write_addr, ARRAY_SIZE(seq_write_addr));
  545. msleep(20);
  546. }
  547. static void lt9611uxc_firmware_read_page(struct lt9611uxc *lt9611uxc, u16 addr, char *buf)
  548. {
  549. struct reg_sequence seq_read_page[] = {
  550. REG_SEQ0(0x805a, 0xa0),
  551. REG_SEQ0(0x805a, 0x80),
  552. REG_SEQ0(0x805b, (addr >> 16) & 0xff),
  553. REG_SEQ0(0x805c, (addr >> 8) & 0xff),
  554. REG_SEQ0(0x805d, addr & 0xff),
  555. REG_SEQ0(0x805a, 0x90),
  556. REG_SEQ0(0x805a, 0x80),
  557. REG_SEQ0(0x8058, 0x21),
  558. };
  559. regmap_multi_reg_write(lt9611uxc->regmap, seq_read_page, ARRAY_SIZE(seq_read_page));
  560. regmap_noinc_read(lt9611uxc->regmap, 0x805f, buf, LT9611UXC_FW_PAGE_SIZE);
  561. }
  562. static char *lt9611uxc_firmware_read(struct lt9611uxc *lt9611uxc, size_t size)
  563. {
  564. struct reg_sequence seq_read_setup[] = {
  565. REG_SEQ0(0x805a, 0x84),
  566. REG_SEQ0(0x805a, 0x80),
  567. };
  568. char *readbuf;
  569. u16 offset;
  570. readbuf = kzalloc(ALIGN(size, 32), GFP_KERNEL);
  571. if (!readbuf)
  572. return NULL;
  573. regmap_multi_reg_write(lt9611uxc->regmap, seq_read_setup, ARRAY_SIZE(seq_read_setup));
  574. for (offset = 0;
  575. offset < size;
  576. offset += LT9611UXC_FW_PAGE_SIZE)
  577. lt9611uxc_firmware_read_page(lt9611uxc, offset, &readbuf[offset]);
  578. return readbuf;
  579. }
  580. static int lt9611uxc_firmware_update(struct lt9611uxc *lt9611uxc)
  581. {
  582. int ret;
  583. u16 offset;
  584. size_t remain;
  585. char *readbuf;
  586. const struct firmware *fw;
  587. struct reg_sequence seq_setup[] = {
  588. REG_SEQ0(0x805e, 0xdf),
  589. REG_SEQ0(0x8058, 0x00),
  590. REG_SEQ0(0x8059, 0x50),
  591. REG_SEQ0(0x805a, 0x10),
  592. REG_SEQ0(0x805a, 0x00),
  593. };
  594. struct reg_sequence seq_block_erase[] = {
  595. REG_SEQ0(0x805a, 0x04),
  596. REG_SEQ0(0x805a, 0x00),
  597. REG_SEQ0(0x805b, 0x00),
  598. REG_SEQ0(0x805c, 0x00),
  599. REG_SEQ0(0x805d, 0x00),
  600. REG_SEQ0(0x805a, 0x01),
  601. REG_SEQ0(0x805a, 0x00),
  602. };
  603. ret = request_firmware(&fw, "lt9611uxc_fw.bin", lt9611uxc->dev);
  604. if (ret < 0)
  605. return ret;
  606. dev_info(lt9611uxc->dev, "Updating firmware\n");
  607. lt9611uxc_lock(lt9611uxc);
  608. regmap_multi_reg_write(lt9611uxc->regmap, seq_setup, ARRAY_SIZE(seq_setup));
  609. /*
  610. * Need erase block 2 timess here. Sometimes, block erase can fail.
  611. * This is a workaroud.
  612. */
  613. regmap_multi_reg_write(lt9611uxc->regmap, seq_block_erase, ARRAY_SIZE(seq_block_erase));
  614. msleep(3000);
  615. regmap_multi_reg_write(lt9611uxc->regmap, seq_block_erase, ARRAY_SIZE(seq_block_erase));
  616. msleep(3000);
  617. for (offset = 0, remain = fw->size;
  618. remain >= LT9611UXC_FW_PAGE_SIZE;
  619. offset += LT9611UXC_FW_PAGE_SIZE, remain -= LT9611UXC_FW_PAGE_SIZE)
  620. lt9611uxc_firmware_write_page(lt9611uxc, offset, fw->data + offset);
  621. if (remain > 0) {
  622. char buf[LT9611UXC_FW_PAGE_SIZE];
  623. memset(buf, 0xff, LT9611UXC_FW_PAGE_SIZE);
  624. memcpy(buf, fw->data + offset, remain);
  625. lt9611uxc_firmware_write_page(lt9611uxc, offset, buf);
  626. }
  627. msleep(20);
  628. readbuf = lt9611uxc_firmware_read(lt9611uxc, fw->size);
  629. if (!readbuf) {
  630. ret = -ENOMEM;
  631. goto out;
  632. }
  633. if (!memcmp(readbuf, fw->data, fw->size)) {
  634. dev_err(lt9611uxc->dev, "Firmware update failed\n");
  635. print_hex_dump(KERN_ERR, "fw: ", DUMP_PREFIX_OFFSET, 16, 1, readbuf, fw->size, false);
  636. ret = -EINVAL;
  637. } else {
  638. dev_info(lt9611uxc->dev, "Firmware updates successfully\n");
  639. ret = 0;
  640. }
  641. kfree(readbuf);
  642. out:
  643. lt9611uxc_unlock(lt9611uxc);
  644. lt9611uxc_reset(lt9611uxc);
  645. release_firmware(fw);
  646. return ret;
  647. }
  648. static ssize_t lt9611uxc_firmware_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t len)
  649. {
  650. struct lt9611uxc *lt9611uxc = dev_get_drvdata(dev);
  651. int ret;
  652. ret = lt9611uxc_firmware_update(lt9611uxc);
  653. if (ret < 0)
  654. return ret;
  655. return len;
  656. }
  657. static ssize_t lt9611uxc_firmware_show(struct device *dev, struct device_attribute *attr, char *buf)
  658. {
  659. struct lt9611uxc *lt9611uxc = dev_get_drvdata(dev);
  660. return sysfs_emit(buf, "%02x\n", lt9611uxc->fw_version);
  661. }
  662. static DEVICE_ATTR_RW(lt9611uxc_firmware);
  663. static struct attribute *lt9611uxc_attrs[] = {
  664. &dev_attr_lt9611uxc_firmware.attr,
  665. NULL,
  666. };
  667. static const struct attribute_group lt9611uxc_attr_group = {
  668. .attrs = lt9611uxc_attrs,
  669. };
  670. static const struct attribute_group *lt9611uxc_attr_groups[] = {
  671. &lt9611uxc_attr_group,
  672. NULL,
  673. };
  674. static int lt9611uxc_probe(struct i2c_client *client,
  675. const struct i2c_device_id *id)
  676. {
  677. struct lt9611uxc *lt9611uxc;
  678. struct device *dev = &client->dev;
  679. int ret;
  680. bool fw_updated = false;
  681. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
  682. dev_err(dev, "device doesn't support I2C\n");
  683. return -ENODEV;
  684. }
  685. lt9611uxc = devm_kzalloc(dev, sizeof(*lt9611uxc), GFP_KERNEL);
  686. if (!lt9611uxc)
  687. return -ENOMEM;
  688. lt9611uxc->dev = dev;
  689. lt9611uxc->client = client;
  690. mutex_init(&lt9611uxc->ocm_lock);
  691. lt9611uxc->regmap = devm_regmap_init_i2c(client, &lt9611uxc_regmap_config);
  692. if (IS_ERR(lt9611uxc->regmap)) {
  693. dev_err(lt9611uxc->dev, "regmap i2c init failed\n");
  694. return PTR_ERR(lt9611uxc->regmap);
  695. }
  696. ret = lt9611uxc_parse_dt(dev, lt9611uxc);
  697. if (ret) {
  698. dev_err(dev, "failed to parse device tree\n");
  699. return ret;
  700. }
  701. ret = lt9611uxc_gpio_init(lt9611uxc);
  702. if (ret < 0)
  703. goto err_of_put;
  704. ret = lt9611uxc_regulator_init(lt9611uxc);
  705. if (ret < 0)
  706. goto err_of_put;
  707. lt9611uxc_assert_5v(lt9611uxc);
  708. ret = lt9611uxc_regulator_enable(lt9611uxc);
  709. if (ret)
  710. goto err_of_put;
  711. lt9611uxc_reset(lt9611uxc);
  712. ret = lt9611uxc_read_device_rev(lt9611uxc);
  713. if (ret) {
  714. dev_err(dev, "failed to read chip rev\n");
  715. goto err_disable_regulators;
  716. }
  717. retry:
  718. ret = lt9611uxc_read_version(lt9611uxc);
  719. if (ret < 0) {
  720. dev_err(dev, "failed to read FW version\n");
  721. goto err_disable_regulators;
  722. } else if (ret == 0) {
  723. if (!fw_updated) {
  724. fw_updated = true;
  725. dev_err(dev, "FW version 0, enforcing firmware update\n");
  726. ret = lt9611uxc_firmware_update(lt9611uxc);
  727. if (ret < 0)
  728. goto err_disable_regulators;
  729. else
  730. goto retry;
  731. } else {
  732. dev_err(dev, "FW version 0, update failed\n");
  733. ret = -EOPNOTSUPP;
  734. goto err_disable_regulators;
  735. }
  736. } else if (ret < 0x40) {
  737. dev_info(dev, "FW version 0x%x, HPD not supported\n", ret);
  738. } else {
  739. lt9611uxc->hpd_supported = true;
  740. }
  741. lt9611uxc->fw_version = ret;
  742. init_waitqueue_head(&lt9611uxc->wq);
  743. INIT_WORK(&lt9611uxc->work, lt9611uxc_hpd_work);
  744. ret = request_threaded_irq(client->irq, NULL,
  745. lt9611uxc_irq_thread_handler,
  746. IRQF_ONESHOT, "lt9611uxc", lt9611uxc);
  747. if (ret) {
  748. dev_err(dev, "failed to request irq\n");
  749. goto err_disable_regulators;
  750. }
  751. i2c_set_clientdata(client, lt9611uxc);
  752. lt9611uxc->bridge.funcs = &lt9611uxc_bridge_funcs;
  753. lt9611uxc->bridge.of_node = client->dev.of_node;
  754. lt9611uxc->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID;
  755. if (lt9611uxc->hpd_supported)
  756. lt9611uxc->bridge.ops |= DRM_BRIDGE_OP_HPD;
  757. lt9611uxc->bridge.type = DRM_MODE_CONNECTOR_HDMIA;
  758. drm_bridge_add(&lt9611uxc->bridge);
  759. /* Attach primary DSI */
  760. lt9611uxc->dsi0 = lt9611uxc_attach_dsi(lt9611uxc, lt9611uxc->dsi0_node);
  761. if (IS_ERR(lt9611uxc->dsi0)) {
  762. ret = PTR_ERR(lt9611uxc->dsi0);
  763. goto err_remove_bridge;
  764. }
  765. /* Attach secondary DSI, if specified */
  766. if (lt9611uxc->dsi1_node) {
  767. lt9611uxc->dsi1 = lt9611uxc_attach_dsi(lt9611uxc, lt9611uxc->dsi1_node);
  768. if (IS_ERR(lt9611uxc->dsi1)) {
  769. ret = PTR_ERR(lt9611uxc->dsi1);
  770. goto err_remove_bridge;
  771. }
  772. }
  773. return lt9611uxc_audio_init(dev, lt9611uxc);
  774. err_remove_bridge:
  775. free_irq(client->irq, lt9611uxc);
  776. cancel_work_sync(&lt9611uxc->work);
  777. drm_bridge_remove(&lt9611uxc->bridge);
  778. err_disable_regulators:
  779. regulator_bulk_disable(ARRAY_SIZE(lt9611uxc->supplies), lt9611uxc->supplies);
  780. err_of_put:
  781. of_node_put(lt9611uxc->dsi1_node);
  782. of_node_put(lt9611uxc->dsi0_node);
  783. return ret;
  784. }
  785. static void lt9611uxc_remove(struct i2c_client *client)
  786. {
  787. struct lt9611uxc *lt9611uxc = i2c_get_clientdata(client);
  788. free_irq(client->irq, lt9611uxc);
  789. cancel_work_sync(&lt9611uxc->work);
  790. lt9611uxc_audio_exit(lt9611uxc);
  791. drm_bridge_remove(&lt9611uxc->bridge);
  792. mutex_destroy(&lt9611uxc->ocm_lock);
  793. regulator_bulk_disable(ARRAY_SIZE(lt9611uxc->supplies), lt9611uxc->supplies);
  794. of_node_put(lt9611uxc->dsi1_node);
  795. of_node_put(lt9611uxc->dsi0_node);
  796. }
  797. static struct i2c_device_id lt9611uxc_id[] = {
  798. { "lontium,lt9611uxc", 0 },
  799. { /* sentinel */ }
  800. };
  801. static const struct of_device_id lt9611uxc_match_table[] = {
  802. { .compatible = "lontium,lt9611uxc" },
  803. { /* sentinel */ }
  804. };
  805. MODULE_DEVICE_TABLE(of, lt9611uxc_match_table);
  806. static struct i2c_driver lt9611uxc_driver = {
  807. .driver = {
  808. .name = "lt9611uxc",
  809. .of_match_table = lt9611uxc_match_table,
  810. .dev_groups = lt9611uxc_attr_groups,
  811. },
  812. .probe = lt9611uxc_probe,
  813. .remove = lt9611uxc_remove,
  814. .id_table = lt9611uxc_id,
  815. };
  816. module_i2c_driver(lt9611uxc_driver);
  817. MODULE_AUTHOR("Dmitry Baryshkov <[email protected]>");
  818. MODULE_LICENSE("GPL v2");