qtee_shmbridge.c 16 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * QTI TEE shared memory bridge driver
  4. *
  5. * Copyright (c) 2021, The Linux Foundation. All rights reserved.
  6. * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  7. */
  8. #include <linux/module.h>
  9. #include <linux/device.h>
  10. #include <linux/slab.h>
  11. #include <linux/genalloc.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/mod_devicetable.h>
  14. #include <linux/of_platform.h>
  15. #include <linux/of_reserved_mem.h>
  16. #include <linux/qcom_scm.h>
  17. #include <linux/dma-mapping.h>
  18. #include <linux/qtee_shmbridge.h>
  19. #include <linux/of_platform.h>
  20. #include <linux/gunyah/gh_rm_drv.h>
  21. #include "qtee_shmbridge_internal.h"
  22. #define DEFAULT_BRIDGE_SIZE SZ_4M /*4M*/
  23. #define MIN_BRIDGE_SIZE SZ_4K /*4K*/
  24. #define MAXSHMVMS 4
  25. #define PERM_BITS 3
  26. #define VM_BITS 16
  27. #define SELF_OWNER_BIT 1
  28. #define SHM_NUM_VM_SHIFT 9
  29. #define SHM_VM_MASK 0xFFFF
  30. #define SHM_PERM_MASK 0x7
  31. #define VM_PERM_R PERM_READ
  32. #define VM_PERM_W PERM_WRITE
  33. #define SHMBRIDGE_E_NOT_SUPPORTED 4 /* SHMbridge is not implemented */
  34. #define AC_ERR_SHARED_MEMORY_SINGLE_SOURCE 15
  35. /* ns_vmids */
  36. #define UPDATE_NS_VMIDS(ns_vmids, id) \
  37. (((uint64_t)(ns_vmids) << VM_BITS) \
  38. | ((uint64_t)(id) & SHM_VM_MASK))
  39. /* ns_perms */
  40. #define UPDATE_NS_PERMS(ns_perms, perm) \
  41. (((uint64_t)(ns_perms) << PERM_BITS) \
  42. | ((uint64_t)(perm) & SHM_PERM_MASK))
  43. /* pfn_and_ns_perm_flags = paddr | ns_perms */
  44. #define UPDATE_PFN_AND_NS_PERM_FLAGS(paddr, ns_perms) \
  45. ((uint64_t)(paddr) | (ns_perms))
  46. /* ipfn_and_s_perm_flags = ipaddr | tz_perm */
  47. #define UPDATE_IPFN_AND_S_PERM_FLAGS(ipaddr, tz_perm) \
  48. ((uint64_t)(ipaddr) | (uint64_t)(tz_perm))
  49. /* size_and_flags when dest_vm is not HYP */
  50. #define UPDATE_SIZE_AND_FLAGS(size, destnum) \
  51. ((size) | (destnum) << SHM_NUM_VM_SHIFT)
  52. struct bridge_info {
  53. phys_addr_t paddr;
  54. void *vaddr;
  55. size_t size;
  56. uint64_t handle;
  57. int min_alloc_order;
  58. struct gen_pool *genpool;
  59. struct device *dev;
  60. };
  61. struct bridge_list {
  62. struct list_head head;
  63. struct mutex lock;
  64. };
  65. struct bridge_list_entry {
  66. struct list_head list;
  67. phys_addr_t paddr;
  68. uint64_t handle;
  69. int32_t ref_count;
  70. };
  71. struct cma_heap_bridge_info {
  72. uint32_t heapid;
  73. uint64_t handle;
  74. };
  75. enum CMA_HEAP_TYPE {
  76. QSEECOM_HEAP = 0,
  77. QSEECOM_TA_HEAP,
  78. USER_CONTI_HEAP,
  79. HEAP_TYPE_MAX
  80. };
  81. static struct bridge_info default_bridge;
  82. static struct bridge_list bridge_list_head;
  83. static bool qtee_shmbridge_enabled;
  84. static bool support_hyp;
  85. /* enable shared memory bridge mechanism in HYP */
  86. static int32_t qtee_shmbridge_enable(bool enable)
  87. {
  88. int32_t ret = 0;
  89. qtee_shmbridge_enabled = false;
  90. /* control shmbridge in kernel using property */
  91. if (of_property_read_bool(default_bridge.dev->of_node,
  92. "qcom,disable-shmbridge-support")) {
  93. return ret;
  94. }
  95. if (!enable) {
  96. pr_warn("shmbridge isn't enabled\n");
  97. return ret;
  98. }
  99. ret = qcom_scm_enable_shm_bridge();
  100. if (ret) {
  101. pr_err("Failed to enable shmbridge, ret = %d\n", ret);
  102. if (ret == -EIO || ret == SHMBRIDGE_E_NOT_SUPPORTED)
  103. pr_warn("shmbridge is not supported by this target\n");
  104. return ret;
  105. }
  106. qtee_shmbridge_enabled = true;
  107. pr_warn("shmbridge is enabled\n");
  108. return ret;
  109. }
  110. /* Check whether shmbridge mechanism is enabled in HYP or not */
  111. bool qtee_shmbridge_is_enabled(void)
  112. {
  113. return qtee_shmbridge_enabled;
  114. }
  115. EXPORT_SYMBOL(qtee_shmbridge_is_enabled);
  116. static int32_t qtee_shmbridge_list_add_locked(phys_addr_t paddr,
  117. uint64_t handle)
  118. {
  119. struct bridge_list_entry *entry;
  120. entry = kzalloc(sizeof(*entry), GFP_KERNEL);
  121. if (!entry)
  122. return -ENOMEM;
  123. entry->handle = handle;
  124. entry->paddr = paddr;
  125. entry->ref_count = 0;
  126. list_add_tail(&entry->list, &bridge_list_head.head);
  127. return 0;
  128. }
  129. static void qtee_shmbridge_list_del_locked(uint64_t handle)
  130. {
  131. struct bridge_list_entry *entry;
  132. list_for_each_entry(entry, &bridge_list_head.head, list) {
  133. if (entry->handle == handle) {
  134. list_del(&entry->list);
  135. kfree(entry);
  136. break;
  137. }
  138. }
  139. }
  140. /********************************************************************
  141. *Function: Decrement the reference count of registered shmbridge
  142. *and if refcount reached to zero delete the shmbridge (i.e send a
  143. *scm call to tz and remove that from out local list too.
  144. *Conditions: API suppose to be called in a locked enviorment
  145. *Return: return 0 in case of success
  146. * return error code in case of failure
  147. ********************************************************************/
  148. static int32_t qtee_shmbridge_list_dec_refcount_locked(uint64_t handle)
  149. {
  150. struct bridge_list_entry *entry;
  151. int32_t ret = -EINVAL;
  152. list_for_each_entry(entry, &bridge_list_head.head, list)
  153. if (entry->handle == handle) {
  154. if (entry->ref_count > 0) {
  155. //decrement reference count
  156. entry->ref_count--;
  157. pr_debug("%s: bridge on %lld exists decrease refcount :%d\n",
  158. __func__, handle, entry->ref_count);
  159. if (entry->ref_count == 0) {
  160. // All valid reference are freed, it's time to delete the bridge
  161. ret = qcom_scm_delete_shm_bridge(handle);
  162. if (ret) {
  163. pr_err(" %s: Failed to del bridge %lld, ret = %d\n"
  164. , __func__, handle, ret);
  165. //restore reference count in case of failure
  166. entry->ref_count++;
  167. goto exit;
  168. }
  169. qtee_shmbridge_list_del_locked(handle);
  170. }
  171. ret = 0;
  172. } else
  173. pr_err("%s: weird, ref_count should not be negative handle %lld , refcount: %d\n",
  174. __func__, handle, entry->ref_count);
  175. break;
  176. }
  177. exit:
  178. if (ret == -EINVAL)
  179. pr_err("Not able to find bridge handle %lld in map\n", handle);
  180. return ret;
  181. }
  182. /********************************************************************
  183. *Function: Increment the ref count in case if we try to register a
  184. *pre-registered phyaddr with shmbridge and provide a valid handle
  185. *to the caller API which was passed by caller as a pointer.
  186. *Conditions: API suppose to be called in a locked enviorment.
  187. *Return: return 0 in case of success.
  188. * return error code in case of failure.
  189. ********************************************************************/
  190. static int32_t qtee_shmbridge_list_inc_refcount_locked(phys_addr_t paddr, uint64_t *handle)
  191. {
  192. struct bridge_list_entry *entry;
  193. int32_t ret = -EINVAL;
  194. list_for_each_entry(entry, &bridge_list_head.head, list)
  195. if (entry->paddr == paddr) {
  196. entry->ref_count++;
  197. pr_debug("%s: bridge on %llx exists increase refcount :%d\n",
  198. __func__, (uint64_t)paddr, entry->ref_count);
  199. //update handle in case we found paddr already exist
  200. *handle = entry->handle;
  201. ret = 0;
  202. break;
  203. }
  204. if (ret)
  205. pr_err("%s: Not able to find bridge paddr %llx in map\n",
  206. __func__, (uint64_t)paddr);
  207. return ret;
  208. }
  209. static int32_t qtee_shmbridge_query_locked(phys_addr_t paddr)
  210. {
  211. struct bridge_list_entry *entry;
  212. list_for_each_entry(entry, &bridge_list_head.head, list)
  213. if (entry->paddr == paddr) {
  214. pr_debug("A bridge on %llx exists\n", (uint64_t)paddr);
  215. return -EEXIST;
  216. }
  217. return 0;
  218. }
  219. /* Check whether a bridge starting from paddr exists */
  220. int32_t qtee_shmbridge_query(phys_addr_t paddr)
  221. {
  222. int32_t ret = 0;
  223. mutex_lock(&bridge_list_head.lock);
  224. ret = qtee_shmbridge_query_locked(paddr);
  225. mutex_unlock(&bridge_list_head.lock);
  226. return ret;
  227. }
  228. EXPORT_SYMBOL(qtee_shmbridge_query);
  229. /* Register paddr & size as a bridge, return bridge handle */
  230. int32_t qtee_shmbridge_register(
  231. phys_addr_t paddr,
  232. size_t size,
  233. uint32_t *ns_vmid_list,
  234. uint32_t *ns_vm_perm_list,
  235. uint32_t ns_vmid_num,
  236. uint32_t tz_perm,
  237. uint64_t *handle)
  238. {
  239. int32_t ret = 0;
  240. uint64_t pfn_and_ns_perm_flags = 0;
  241. uint64_t ipfn_and_s_perm_flags = 0;
  242. uint64_t size_and_flags = 0;
  243. uint64_t ns_perms = 0;
  244. uint64_t ns_vmids = 0;
  245. int i = 0;
  246. gh_vmid_t temp_vmid;
  247. if (!qtee_shmbridge_enabled)
  248. return 0;
  249. if (!handle || !ns_vmid_list || !ns_vm_perm_list ||
  250. ns_vmid_num > MAXSHMVMS) {
  251. pr_err("invalid input parameters\n");
  252. return -EINVAL;
  253. }
  254. mutex_lock(&bridge_list_head.lock);
  255. ret = qtee_shmbridge_query_locked(paddr);
  256. if (ret) {
  257. pr_debug("%s: found 0%x already exist with shmbridge\n",
  258. __func__, paddr);
  259. goto bridge_exist;
  260. }
  261. if (support_hyp) {
  262. /* Calls to create SHMBridge from HLOS-VM is handled by QHEEBSP AC Layer while from
  263. * secondary CPU-VMs, such as OEM-VM and QTVM, it is handled by Hypervisor RM.
  264. * RM always expects the destination VM fields to be 0 and only expects the self
  265. * owner bit to be set.
  266. */
  267. if (ns_vmid_num == 1) {
  268. if (!gh_rm_get_this_vmid(&temp_vmid) &&
  269. (temp_vmid == ns_vmid_list[0])) {
  270. ns_vmid_num = 0;
  271. }
  272. }
  273. }
  274. for (i = 0; i < ns_vmid_num; i++) {
  275. ns_perms = UPDATE_NS_PERMS(ns_perms, ns_vm_perm_list[i]);
  276. ns_vmids = UPDATE_NS_VMIDS(ns_vmids, ns_vmid_list[i]);
  277. }
  278. pfn_and_ns_perm_flags = UPDATE_PFN_AND_NS_PERM_FLAGS(paddr, ns_perms);
  279. ipfn_and_s_perm_flags = UPDATE_IPFN_AND_S_PERM_FLAGS(paddr, tz_perm);
  280. size_and_flags = UPDATE_SIZE_AND_FLAGS(size, ns_vmid_num);
  281. if (support_hyp) {
  282. size_and_flags |= SELF_OWNER_BIT << 1;
  283. size_and_flags |= (VM_PERM_R | VM_PERM_W) << 2;
  284. }
  285. pr_debug("%s: desc.args[0] %llx, args[1] %llx, args[2] %llx, args[3] %llx\n",
  286. __func__, pfn_and_ns_perm_flags, ipfn_and_s_perm_flags,
  287. size_and_flags, ns_vmids);
  288. ret = qcom_scm_create_shm_bridge(pfn_and_ns_perm_flags,
  289. ipfn_and_s_perm_flags, size_and_flags, ns_vmids,
  290. handle);
  291. if (ret) {
  292. pr_err("%s: create shmbridge failed, ret = %d\n", __func__, ret);
  293. /* if bridge is already existing and we are not real owner also paddr not
  294. * exist in our map we will add an entry in our map and go for deregister
  295. * for this since QTEE also maintain ref_count. So for this we should
  296. * deregister to decrease ref_count in QTEE.
  297. */
  298. if (ret == AC_ERR_SHARED_MEMORY_SINGLE_SOURCE)
  299. pr_err("%s: bridge %llx exist but not registered in our map\n",
  300. __func__, (uint64_t)paddr);
  301. else {
  302. ret = -EINVAL;
  303. goto exit;
  304. }
  305. }
  306. ret = qtee_shmbridge_list_add_locked(paddr, *handle);
  307. bridge_exist:
  308. ret = qtee_shmbridge_list_inc_refcount_locked(paddr, handle);
  309. exit:
  310. mutex_unlock(&bridge_list_head.lock);
  311. return ret;
  312. }
  313. EXPORT_SYMBOL(qtee_shmbridge_register);
  314. /* Deregister bridge */
  315. int32_t qtee_shmbridge_deregister(uint64_t handle)
  316. {
  317. int32_t ret = 0;
  318. if (!qtee_shmbridge_enabled)
  319. return 0;
  320. mutex_lock(&bridge_list_head.lock);
  321. ret = qtee_shmbridge_list_dec_refcount_locked(handle);
  322. mutex_unlock(&bridge_list_head.lock);
  323. return ret;
  324. }
  325. EXPORT_SYMBOL(qtee_shmbridge_deregister);
  326. /* Sub-allocate from default kernel bridge created by shmb driver */
  327. int32_t qtee_shmbridge_allocate_shm(size_t size, struct qtee_shm *shm)
  328. {
  329. int32_t ret = 0;
  330. unsigned long va;
  331. if (IS_ERR_OR_NULL(shm)) {
  332. pr_err("qtee_shm is NULL\n");
  333. ret = -EINVAL;
  334. goto exit;
  335. }
  336. if (size > default_bridge.size) {
  337. pr_err("requestd size %zu is larger than bridge size %d\n",
  338. size, default_bridge.size);
  339. ret = -EINVAL;
  340. goto exit;
  341. }
  342. size = roundup(size, 1 << default_bridge.min_alloc_order);
  343. va = gen_pool_alloc(default_bridge.genpool, size);
  344. if (!va) {
  345. pr_err("failed to sub-allocate %zu bytes from bridge\n", size);
  346. ret = -ENOMEM;
  347. goto exit;
  348. }
  349. memset((void *)va, 0, size);
  350. shm->vaddr = (void *)va;
  351. shm->paddr = gen_pool_virt_to_phys(default_bridge.genpool, va);
  352. shm->size = size;
  353. pr_debug("%s: shm->paddr %llx, size %zu\n",
  354. __func__, (uint64_t)shm->paddr, shm->size);
  355. exit:
  356. return ret;
  357. }
  358. EXPORT_SYMBOL(qtee_shmbridge_allocate_shm);
  359. /* Free buffer that is sub-allocated from default kernel bridge */
  360. void qtee_shmbridge_free_shm(struct qtee_shm *shm)
  361. {
  362. if (IS_ERR_OR_NULL(shm) || !shm->vaddr)
  363. return;
  364. gen_pool_free(default_bridge.genpool, (unsigned long)shm->vaddr,
  365. shm->size);
  366. }
  367. EXPORT_SYMBOL(qtee_shmbridge_free_shm);
  368. /* cache clean operation for buffer sub-allocated from default bridge */
  369. void qtee_shmbridge_flush_shm_buf(struct qtee_shm *shm)
  370. {
  371. if (shm)
  372. return dma_sync_single_for_device(default_bridge.dev,
  373. shm->paddr, shm->size, DMA_TO_DEVICE);
  374. }
  375. EXPORT_SYMBOL(qtee_shmbridge_flush_shm_buf);
  376. /* cache invalidation operation for buffer sub-allocated from default bridge */
  377. void qtee_shmbridge_inv_shm_buf(struct qtee_shm *shm)
  378. {
  379. if (shm)
  380. return dma_sync_single_for_cpu(default_bridge.dev,
  381. shm->paddr, shm->size, DMA_FROM_DEVICE);
  382. }
  383. EXPORT_SYMBOL(qtee_shmbridge_inv_shm_buf);
  384. /*
  385. * shared memory bridge initialization
  386. *
  387. */
  388. static int qtee_shmbridge_init(struct platform_device *pdev)
  389. {
  390. int ret = 0;
  391. uint32_t custom_bridge_size;
  392. uint32_t *ns_vm_ids;
  393. uint32_t ns_vm_ids_hlos[] = {VMID_HLOS};
  394. uint32_t ns_vm_ids_hyp[] = {};
  395. uint32_t ns_vm_perms[] = {VM_PERM_R|VM_PERM_W};
  396. int mem_protection_enabled = 0;
  397. support_hyp = of_property_read_bool((&pdev->dev)->of_node,
  398. "qcom,support-hypervisor");
  399. if (support_hyp)
  400. ns_vm_ids = ns_vm_ids_hyp;
  401. else
  402. ns_vm_ids = ns_vm_ids_hlos;
  403. if (default_bridge.vaddr) {
  404. pr_err("qtee shmbridge is already initialized\n");
  405. return 0;
  406. }
  407. ret = of_property_read_u32((&pdev->dev)->of_node,
  408. "qcom,custom-bridge-size", &custom_bridge_size);
  409. if (ret)
  410. default_bridge.size = DEFAULT_BRIDGE_SIZE;
  411. else
  412. default_bridge.size = custom_bridge_size * MIN_BRIDGE_SIZE;
  413. pr_err("qtee shmbridge registered default bridge with size %d bytes\n",
  414. default_bridge.size);
  415. default_bridge.vaddr = (void *)__get_free_pages(GFP_KERNEL|__GFP_COMP,
  416. get_order(default_bridge.size));
  417. if (!default_bridge.vaddr)
  418. return -ENOMEM;
  419. default_bridge.paddr = dma_map_single(&pdev->dev,
  420. default_bridge.vaddr, default_bridge.size,
  421. DMA_TO_DEVICE);
  422. if (dma_mapping_error(&pdev->dev, default_bridge.paddr)) {
  423. pr_err("dma_map_single() failed\n");
  424. ret = -ENOMEM;
  425. goto exit_freebuf;
  426. }
  427. default_bridge.dev = &pdev->dev;
  428. /* create a general mem pool */
  429. default_bridge.min_alloc_order = PAGE_SHIFT; /* 4K page size aligned */
  430. default_bridge.genpool = gen_pool_create(
  431. default_bridge.min_alloc_order, -1);
  432. if (!default_bridge.genpool) {
  433. pr_err("gen_pool_add_virt() failed\n");
  434. ret = -ENOMEM;
  435. goto exit_unmap;
  436. }
  437. gen_pool_set_algo(default_bridge.genpool, gen_pool_best_fit, NULL);
  438. ret = gen_pool_add_virt(default_bridge.genpool,
  439. (uintptr_t)default_bridge.vaddr,
  440. default_bridge.paddr, default_bridge.size, -1);
  441. if (ret) {
  442. pr_err("gen_pool_add_virt() failed, ret = %d\n", ret);
  443. goto exit_destroy_pool;
  444. }
  445. mutex_init(&bridge_list_head.lock);
  446. INIT_LIST_HEAD(&bridge_list_head.head);
  447. /* temporarily disable shm bridge mechanism */
  448. ret = qtee_shmbridge_enable(true);
  449. if (ret) {
  450. /* keep the mem pool and return if failed to enable bridge */
  451. ret = 0;
  452. goto exit;
  453. }
  454. /*register default bridge*/
  455. if (support_hyp)
  456. ret = qtee_shmbridge_register(default_bridge.paddr,
  457. default_bridge.size, ns_vm_ids,
  458. ns_vm_perms, 0, VM_PERM_R|VM_PERM_W,
  459. &default_bridge.handle);
  460. else
  461. ret = qtee_shmbridge_register(default_bridge.paddr,
  462. default_bridge.size, ns_vm_ids,
  463. ns_vm_perms, 1, VM_PERM_R|VM_PERM_W,
  464. &default_bridge.handle);
  465. if (ret) {
  466. pr_err("Failed to register default bridge, size %zu\n",
  467. default_bridge.size);
  468. goto exit_deregister_default_bridge;
  469. }
  470. pr_debug("qtee shmbridge registered default bridge with size %d bytes\n",
  471. default_bridge.size);
  472. mem_protection_enabled = scm_mem_protection_init_do();
  473. pr_err("MEM protection %s, %d\n",
  474. (!mem_protection_enabled ? "Enabled" : "Not enabled"),
  475. mem_protection_enabled);
  476. return 0;
  477. exit_deregister_default_bridge:
  478. qtee_shmbridge_deregister(default_bridge.handle);
  479. qtee_shmbridge_enable(false);
  480. exit_destroy_pool:
  481. gen_pool_destroy(default_bridge.genpool);
  482. exit_unmap:
  483. dma_unmap_single(&pdev->dev, default_bridge.paddr, default_bridge.size,
  484. DMA_TO_DEVICE);
  485. exit_freebuf:
  486. free_pages((long)default_bridge.vaddr, get_order(default_bridge.size));
  487. default_bridge.vaddr = NULL;
  488. exit:
  489. return ret;
  490. }
  491. static int qtee_shmbridge_probe(struct platform_device *pdev)
  492. {
  493. #ifdef CONFIG_ARM64
  494. dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
  495. #endif
  496. return qtee_shmbridge_init(pdev);
  497. }
  498. static int qtee_shmbridge_remove(struct platform_device *pdev)
  499. {
  500. qtee_shmbridge_deregister(default_bridge.handle);
  501. gen_pool_destroy(default_bridge.genpool);
  502. dma_unmap_single(&pdev->dev, default_bridge.paddr, default_bridge.size,
  503. DMA_TO_DEVICE);
  504. free_pages((long)default_bridge.vaddr, get_order(default_bridge.size));
  505. return 0;
  506. }
  507. static const struct of_device_id qtee_shmbridge_of_match[] = {
  508. { .compatible = "qcom,tee-shared-memory-bridge"},
  509. {}
  510. };
  511. MODULE_DEVICE_TABLE(of, qtee_shmbridge_of_match);
  512. static struct platform_driver qtee_shmbridge_driver = {
  513. .probe = qtee_shmbridge_probe,
  514. .remove = qtee_shmbridge_remove,
  515. .driver = {
  516. .name = "shared_memory_bridge",
  517. .of_match_table = qtee_shmbridge_of_match,
  518. },
  519. };
  520. int __init qtee_shmbridge_driver_init(void)
  521. {
  522. return platform_driver_register(&qtee_shmbridge_driver);
  523. }
  524. void __exit qtee_shmbridge_driver_exit(void)
  525. {
  526. platform_driver_unregister(&qtee_shmbridge_driver);
  527. }