cper-x86.c 11 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. // Copyright (C) 2018, Advanced Micro Devices, Inc.
  3. #include <linux/cper.h>
  4. #include <linux/acpi.h>
  5. /*
  6. * We don't need a "CPER_IA" prefix since these are all locally defined.
  7. * This will save us a lot of line space.
  8. */
  9. #define VALID_LAPIC_ID BIT_ULL(0)
  10. #define VALID_CPUID_INFO BIT_ULL(1)
  11. #define VALID_PROC_ERR_INFO_NUM(bits) (((bits) & GENMASK_ULL(7, 2)) >> 2)
  12. #define VALID_PROC_CXT_INFO_NUM(bits) (((bits) & GENMASK_ULL(13, 8)) >> 8)
  13. #define INFO_ERR_STRUCT_TYPE_CACHE \
  14. GUID_INIT(0xA55701F5, 0xE3EF, 0x43DE, 0xAC, 0x72, 0x24, 0x9B, \
  15. 0x57, 0x3F, 0xAD, 0x2C)
  16. #define INFO_ERR_STRUCT_TYPE_TLB \
  17. GUID_INIT(0xFC06B535, 0x5E1F, 0x4562, 0x9F, 0x25, 0x0A, 0x3B, \
  18. 0x9A, 0xDB, 0x63, 0xC3)
  19. #define INFO_ERR_STRUCT_TYPE_BUS \
  20. GUID_INIT(0x1CF3F8B3, 0xC5B1, 0x49a2, 0xAA, 0x59, 0x5E, 0xEF, \
  21. 0x92, 0xFF, 0xA6, 0x3C)
  22. #define INFO_ERR_STRUCT_TYPE_MS \
  23. GUID_INIT(0x48AB7F57, 0xDC34, 0x4f6c, 0xA7, 0xD3, 0xB0, 0xB5, \
  24. 0xB0, 0xA7, 0x43, 0x14)
  25. #define INFO_VALID_CHECK_INFO BIT_ULL(0)
  26. #define INFO_VALID_TARGET_ID BIT_ULL(1)
  27. #define INFO_VALID_REQUESTOR_ID BIT_ULL(2)
  28. #define INFO_VALID_RESPONDER_ID BIT_ULL(3)
  29. #define INFO_VALID_IP BIT_ULL(4)
  30. #define CHECK_VALID_TRANS_TYPE BIT_ULL(0)
  31. #define CHECK_VALID_OPERATION BIT_ULL(1)
  32. #define CHECK_VALID_LEVEL BIT_ULL(2)
  33. #define CHECK_VALID_PCC BIT_ULL(3)
  34. #define CHECK_VALID_UNCORRECTED BIT_ULL(4)
  35. #define CHECK_VALID_PRECISE_IP BIT_ULL(5)
  36. #define CHECK_VALID_RESTARTABLE_IP BIT_ULL(6)
  37. #define CHECK_VALID_OVERFLOW BIT_ULL(7)
  38. #define CHECK_VALID_BUS_PART_TYPE BIT_ULL(8)
  39. #define CHECK_VALID_BUS_TIME_OUT BIT_ULL(9)
  40. #define CHECK_VALID_BUS_ADDR_SPACE BIT_ULL(10)
  41. #define CHECK_VALID_BITS(check) (((check) & GENMASK_ULL(15, 0)))
  42. #define CHECK_TRANS_TYPE(check) (((check) & GENMASK_ULL(17, 16)) >> 16)
  43. #define CHECK_OPERATION(check) (((check) & GENMASK_ULL(21, 18)) >> 18)
  44. #define CHECK_LEVEL(check) (((check) & GENMASK_ULL(24, 22)) >> 22)
  45. #define CHECK_PCC BIT_ULL(25)
  46. #define CHECK_UNCORRECTED BIT_ULL(26)
  47. #define CHECK_PRECISE_IP BIT_ULL(27)
  48. #define CHECK_RESTARTABLE_IP BIT_ULL(28)
  49. #define CHECK_OVERFLOW BIT_ULL(29)
  50. #define CHECK_BUS_PART_TYPE(check) (((check) & GENMASK_ULL(31, 30)) >> 30)
  51. #define CHECK_BUS_TIME_OUT BIT_ULL(32)
  52. #define CHECK_BUS_ADDR_SPACE(check) (((check) & GENMASK_ULL(34, 33)) >> 33)
  53. #define CHECK_VALID_MS_ERR_TYPE BIT_ULL(0)
  54. #define CHECK_VALID_MS_PCC BIT_ULL(1)
  55. #define CHECK_VALID_MS_UNCORRECTED BIT_ULL(2)
  56. #define CHECK_VALID_MS_PRECISE_IP BIT_ULL(3)
  57. #define CHECK_VALID_MS_RESTARTABLE_IP BIT_ULL(4)
  58. #define CHECK_VALID_MS_OVERFLOW BIT_ULL(5)
  59. #define CHECK_MS_ERR_TYPE(check) (((check) & GENMASK_ULL(18, 16)) >> 16)
  60. #define CHECK_MS_PCC BIT_ULL(19)
  61. #define CHECK_MS_UNCORRECTED BIT_ULL(20)
  62. #define CHECK_MS_PRECISE_IP BIT_ULL(21)
  63. #define CHECK_MS_RESTARTABLE_IP BIT_ULL(22)
  64. #define CHECK_MS_OVERFLOW BIT_ULL(23)
  65. #define CTX_TYPE_MSR 1
  66. #define CTX_TYPE_MMREG 7
  67. enum err_types {
  68. ERR_TYPE_CACHE = 0,
  69. ERR_TYPE_TLB,
  70. ERR_TYPE_BUS,
  71. ERR_TYPE_MS,
  72. N_ERR_TYPES
  73. };
  74. static enum err_types cper_get_err_type(const guid_t *err_type)
  75. {
  76. if (guid_equal(err_type, &INFO_ERR_STRUCT_TYPE_CACHE))
  77. return ERR_TYPE_CACHE;
  78. else if (guid_equal(err_type, &INFO_ERR_STRUCT_TYPE_TLB))
  79. return ERR_TYPE_TLB;
  80. else if (guid_equal(err_type, &INFO_ERR_STRUCT_TYPE_BUS))
  81. return ERR_TYPE_BUS;
  82. else if (guid_equal(err_type, &INFO_ERR_STRUCT_TYPE_MS))
  83. return ERR_TYPE_MS;
  84. else
  85. return N_ERR_TYPES;
  86. }
  87. static const char * const ia_check_trans_type_strs[] = {
  88. "Instruction",
  89. "Data Access",
  90. "Generic",
  91. };
  92. static const char * const ia_check_op_strs[] = {
  93. "generic error",
  94. "generic read",
  95. "generic write",
  96. "data read",
  97. "data write",
  98. "instruction fetch",
  99. "prefetch",
  100. "eviction",
  101. "snoop",
  102. };
  103. static const char * const ia_check_bus_part_type_strs[] = {
  104. "Local Processor originated request",
  105. "Local Processor responded to request",
  106. "Local Processor observed",
  107. "Generic",
  108. };
  109. static const char * const ia_check_bus_addr_space_strs[] = {
  110. "Memory Access",
  111. "Reserved",
  112. "I/O",
  113. "Other Transaction",
  114. };
  115. static const char * const ia_check_ms_error_type_strs[] = {
  116. "No Error",
  117. "Unclassified",
  118. "Microcode ROM Parity Error",
  119. "External Error",
  120. "FRC Error",
  121. "Internal Unclassified",
  122. };
  123. static const char * const ia_reg_ctx_strs[] = {
  124. "Unclassified Data",
  125. "MSR Registers (Machine Check and other MSRs)",
  126. "32-bit Mode Execution Context",
  127. "64-bit Mode Execution Context",
  128. "FXSAVE Context",
  129. "32-bit Mode Debug Registers (DR0-DR7)",
  130. "64-bit Mode Debug Registers (DR0-DR7)",
  131. "Memory Mapped Registers",
  132. };
  133. static inline void print_bool(char *str, const char *pfx, u64 check, u64 bit)
  134. {
  135. printk("%s%s: %s\n", pfx, str, (check & bit) ? "true" : "false");
  136. }
  137. static void print_err_info_ms(const char *pfx, u16 validation_bits, u64 check)
  138. {
  139. if (validation_bits & CHECK_VALID_MS_ERR_TYPE) {
  140. u8 err_type = CHECK_MS_ERR_TYPE(check);
  141. printk("%sError Type: %u, %s\n", pfx, err_type,
  142. err_type < ARRAY_SIZE(ia_check_ms_error_type_strs) ?
  143. ia_check_ms_error_type_strs[err_type] : "unknown");
  144. }
  145. if (validation_bits & CHECK_VALID_MS_PCC)
  146. print_bool("Processor Context Corrupt", pfx, check, CHECK_MS_PCC);
  147. if (validation_bits & CHECK_VALID_MS_UNCORRECTED)
  148. print_bool("Uncorrected", pfx, check, CHECK_MS_UNCORRECTED);
  149. if (validation_bits & CHECK_VALID_MS_PRECISE_IP)
  150. print_bool("Precise IP", pfx, check, CHECK_MS_PRECISE_IP);
  151. if (validation_bits & CHECK_VALID_MS_RESTARTABLE_IP)
  152. print_bool("Restartable IP", pfx, check, CHECK_MS_RESTARTABLE_IP);
  153. if (validation_bits & CHECK_VALID_MS_OVERFLOW)
  154. print_bool("Overflow", pfx, check, CHECK_MS_OVERFLOW);
  155. }
  156. static void print_err_info(const char *pfx, u8 err_type, u64 check)
  157. {
  158. u16 validation_bits = CHECK_VALID_BITS(check);
  159. /*
  160. * The MS Check structure varies a lot from the others, so use a
  161. * separate function for decoding.
  162. */
  163. if (err_type == ERR_TYPE_MS)
  164. return print_err_info_ms(pfx, validation_bits, check);
  165. if (validation_bits & CHECK_VALID_TRANS_TYPE) {
  166. u8 trans_type = CHECK_TRANS_TYPE(check);
  167. printk("%sTransaction Type: %u, %s\n", pfx, trans_type,
  168. trans_type < ARRAY_SIZE(ia_check_trans_type_strs) ?
  169. ia_check_trans_type_strs[trans_type] : "unknown");
  170. }
  171. if (validation_bits & CHECK_VALID_OPERATION) {
  172. u8 op = CHECK_OPERATION(check);
  173. /*
  174. * CACHE has more operation types than TLB or BUS, though the
  175. * name and the order are the same.
  176. */
  177. u8 max_ops = (err_type == ERR_TYPE_CACHE) ? 9 : 7;
  178. printk("%sOperation: %u, %s\n", pfx, op,
  179. op < max_ops ? ia_check_op_strs[op] : "unknown");
  180. }
  181. if (validation_bits & CHECK_VALID_LEVEL)
  182. printk("%sLevel: %llu\n", pfx, CHECK_LEVEL(check));
  183. if (validation_bits & CHECK_VALID_PCC)
  184. print_bool("Processor Context Corrupt", pfx, check, CHECK_PCC);
  185. if (validation_bits & CHECK_VALID_UNCORRECTED)
  186. print_bool("Uncorrected", pfx, check, CHECK_UNCORRECTED);
  187. if (validation_bits & CHECK_VALID_PRECISE_IP)
  188. print_bool("Precise IP", pfx, check, CHECK_PRECISE_IP);
  189. if (validation_bits & CHECK_VALID_RESTARTABLE_IP)
  190. print_bool("Restartable IP", pfx, check, CHECK_RESTARTABLE_IP);
  191. if (validation_bits & CHECK_VALID_OVERFLOW)
  192. print_bool("Overflow", pfx, check, CHECK_OVERFLOW);
  193. if (err_type != ERR_TYPE_BUS)
  194. return;
  195. if (validation_bits & CHECK_VALID_BUS_PART_TYPE) {
  196. u8 part_type = CHECK_BUS_PART_TYPE(check);
  197. printk("%sParticipation Type: %u, %s\n", pfx, part_type,
  198. part_type < ARRAY_SIZE(ia_check_bus_part_type_strs) ?
  199. ia_check_bus_part_type_strs[part_type] : "unknown");
  200. }
  201. if (validation_bits & CHECK_VALID_BUS_TIME_OUT)
  202. print_bool("Time Out", pfx, check, CHECK_BUS_TIME_OUT);
  203. if (validation_bits & CHECK_VALID_BUS_ADDR_SPACE) {
  204. u8 addr_space = CHECK_BUS_ADDR_SPACE(check);
  205. printk("%sAddress Space: %u, %s\n", pfx, addr_space,
  206. addr_space < ARRAY_SIZE(ia_check_bus_addr_space_strs) ?
  207. ia_check_bus_addr_space_strs[addr_space] : "unknown");
  208. }
  209. }
  210. void cper_print_proc_ia(const char *pfx, const struct cper_sec_proc_ia *proc)
  211. {
  212. int i;
  213. struct cper_ia_err_info *err_info;
  214. struct cper_ia_proc_ctx *ctx_info;
  215. char newpfx[64], infopfx[64];
  216. u8 err_type;
  217. if (proc->validation_bits & VALID_LAPIC_ID)
  218. printk("%sLocal APIC_ID: 0x%llx\n", pfx, proc->lapic_id);
  219. if (proc->validation_bits & VALID_CPUID_INFO) {
  220. printk("%sCPUID Info:\n", pfx);
  221. print_hex_dump(pfx, "", DUMP_PREFIX_OFFSET, 16, 4, proc->cpuid,
  222. sizeof(proc->cpuid), 0);
  223. }
  224. snprintf(newpfx, sizeof(newpfx), "%s ", pfx);
  225. err_info = (struct cper_ia_err_info *)(proc + 1);
  226. for (i = 0; i < VALID_PROC_ERR_INFO_NUM(proc->validation_bits); i++) {
  227. printk("%sError Information Structure %d:\n", pfx, i);
  228. err_type = cper_get_err_type(&err_info->err_type);
  229. printk("%sError Structure Type: %s\n", newpfx,
  230. err_type < ARRAY_SIZE(cper_proc_error_type_strs) ?
  231. cper_proc_error_type_strs[err_type] : "unknown");
  232. if (err_type >= N_ERR_TYPES) {
  233. printk("%sError Structure Type: %pUl\n", newpfx,
  234. &err_info->err_type);
  235. }
  236. if (err_info->validation_bits & INFO_VALID_CHECK_INFO) {
  237. printk("%sCheck Information: 0x%016llx\n", newpfx,
  238. err_info->check_info);
  239. if (err_type < N_ERR_TYPES) {
  240. snprintf(infopfx, sizeof(infopfx), "%s ",
  241. newpfx);
  242. print_err_info(infopfx, err_type,
  243. err_info->check_info);
  244. }
  245. }
  246. if (err_info->validation_bits & INFO_VALID_TARGET_ID) {
  247. printk("%sTarget Identifier: 0x%016llx\n",
  248. newpfx, err_info->target_id);
  249. }
  250. if (err_info->validation_bits & INFO_VALID_REQUESTOR_ID) {
  251. printk("%sRequestor Identifier: 0x%016llx\n",
  252. newpfx, err_info->requestor_id);
  253. }
  254. if (err_info->validation_bits & INFO_VALID_RESPONDER_ID) {
  255. printk("%sResponder Identifier: 0x%016llx\n",
  256. newpfx, err_info->responder_id);
  257. }
  258. if (err_info->validation_bits & INFO_VALID_IP) {
  259. printk("%sInstruction Pointer: 0x%016llx\n",
  260. newpfx, err_info->ip);
  261. }
  262. err_info++;
  263. }
  264. ctx_info = (struct cper_ia_proc_ctx *)err_info;
  265. for (i = 0; i < VALID_PROC_CXT_INFO_NUM(proc->validation_bits); i++) {
  266. int size = sizeof(*ctx_info) + ctx_info->reg_arr_size;
  267. int groupsize = 4;
  268. printk("%sContext Information Structure %d:\n", pfx, i);
  269. printk("%sRegister Context Type: %s\n", newpfx,
  270. ctx_info->reg_ctx_type < ARRAY_SIZE(ia_reg_ctx_strs) ?
  271. ia_reg_ctx_strs[ctx_info->reg_ctx_type] : "unknown");
  272. printk("%sRegister Array Size: 0x%04x\n", newpfx,
  273. ctx_info->reg_arr_size);
  274. if (ctx_info->reg_ctx_type == CTX_TYPE_MSR) {
  275. groupsize = 8; /* MSRs are 8 bytes wide. */
  276. printk("%sMSR Address: 0x%08x\n", newpfx,
  277. ctx_info->msr_addr);
  278. }
  279. if (ctx_info->reg_ctx_type == CTX_TYPE_MMREG) {
  280. printk("%sMM Register Address: 0x%016llx\n", newpfx,
  281. ctx_info->mm_reg_addr);
  282. }
  283. if (ctx_info->reg_ctx_type != CTX_TYPE_MSR ||
  284. arch_apei_report_x86_error(ctx_info, proc->lapic_id)) {
  285. printk("%sRegister Array:\n", newpfx);
  286. print_hex_dump(newpfx, "", DUMP_PREFIX_OFFSET, 16,
  287. groupsize, (ctx_info + 1),
  288. ctx_info->reg_arr_size, 0);
  289. }
  290. ctx_info = (struct cper_ia_proc_ctx *)((long)ctx_info + size);
  291. }
  292. }