core-iso.c 9.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Isochronous I/O functionality:
  4. * - Isochronous DMA context management
  5. * - Isochronous bus resource management (channels, bandwidth), client side
  6. *
  7. * Copyright (C) 2006 Kristian Hoegsberg <[email protected]>
  8. */
  9. #include <linux/dma-mapping.h>
  10. #include <linux/errno.h>
  11. #include <linux/firewire.h>
  12. #include <linux/firewire-constants.h>
  13. #include <linux/kernel.h>
  14. #include <linux/mm.h>
  15. #include <linux/slab.h>
  16. #include <linux/spinlock.h>
  17. #include <linux/vmalloc.h>
  18. #include <linux/export.h>
  19. #include <asm/byteorder.h>
  20. #include "core.h"
  21. /*
  22. * Isochronous DMA context management
  23. */
  24. int fw_iso_buffer_alloc(struct fw_iso_buffer *buffer, int page_count)
  25. {
  26. int i;
  27. buffer->page_count = 0;
  28. buffer->page_count_mapped = 0;
  29. buffer->pages = kmalloc_array(page_count, sizeof(buffer->pages[0]),
  30. GFP_KERNEL);
  31. if (buffer->pages == NULL)
  32. return -ENOMEM;
  33. for (i = 0; i < page_count; i++) {
  34. buffer->pages[i] = alloc_page(GFP_KERNEL | GFP_DMA32 | __GFP_ZERO);
  35. if (buffer->pages[i] == NULL)
  36. break;
  37. }
  38. buffer->page_count = i;
  39. if (i < page_count) {
  40. fw_iso_buffer_destroy(buffer, NULL);
  41. return -ENOMEM;
  42. }
  43. return 0;
  44. }
  45. int fw_iso_buffer_map_dma(struct fw_iso_buffer *buffer, struct fw_card *card,
  46. enum dma_data_direction direction)
  47. {
  48. dma_addr_t address;
  49. int i;
  50. buffer->direction = direction;
  51. for (i = 0; i < buffer->page_count; i++) {
  52. address = dma_map_page(card->device, buffer->pages[i],
  53. 0, PAGE_SIZE, direction);
  54. if (dma_mapping_error(card->device, address))
  55. break;
  56. set_page_private(buffer->pages[i], address);
  57. }
  58. buffer->page_count_mapped = i;
  59. if (i < buffer->page_count)
  60. return -ENOMEM;
  61. return 0;
  62. }
  63. int fw_iso_buffer_init(struct fw_iso_buffer *buffer, struct fw_card *card,
  64. int page_count, enum dma_data_direction direction)
  65. {
  66. int ret;
  67. ret = fw_iso_buffer_alloc(buffer, page_count);
  68. if (ret < 0)
  69. return ret;
  70. ret = fw_iso_buffer_map_dma(buffer, card, direction);
  71. if (ret < 0)
  72. fw_iso_buffer_destroy(buffer, card);
  73. return ret;
  74. }
  75. EXPORT_SYMBOL(fw_iso_buffer_init);
  76. void fw_iso_buffer_destroy(struct fw_iso_buffer *buffer,
  77. struct fw_card *card)
  78. {
  79. int i;
  80. dma_addr_t address;
  81. for (i = 0; i < buffer->page_count_mapped; i++) {
  82. address = page_private(buffer->pages[i]);
  83. dma_unmap_page(card->device, address,
  84. PAGE_SIZE, buffer->direction);
  85. }
  86. for (i = 0; i < buffer->page_count; i++)
  87. __free_page(buffer->pages[i]);
  88. kfree(buffer->pages);
  89. buffer->pages = NULL;
  90. buffer->page_count = 0;
  91. buffer->page_count_mapped = 0;
  92. }
  93. EXPORT_SYMBOL(fw_iso_buffer_destroy);
  94. /* Convert DMA address to offset into virtually contiguous buffer. */
  95. size_t fw_iso_buffer_lookup(struct fw_iso_buffer *buffer, dma_addr_t completed)
  96. {
  97. size_t i;
  98. dma_addr_t address;
  99. ssize_t offset;
  100. for (i = 0; i < buffer->page_count; i++) {
  101. address = page_private(buffer->pages[i]);
  102. offset = (ssize_t)completed - (ssize_t)address;
  103. if (offset > 0 && offset <= PAGE_SIZE)
  104. return (i << PAGE_SHIFT) + offset;
  105. }
  106. return 0;
  107. }
  108. struct fw_iso_context *fw_iso_context_create(struct fw_card *card,
  109. int type, int channel, int speed, size_t header_size,
  110. fw_iso_callback_t callback, void *callback_data)
  111. {
  112. struct fw_iso_context *ctx;
  113. ctx = card->driver->allocate_iso_context(card,
  114. type, channel, header_size);
  115. if (IS_ERR(ctx))
  116. return ctx;
  117. ctx->card = card;
  118. ctx->type = type;
  119. ctx->channel = channel;
  120. ctx->speed = speed;
  121. ctx->header_size = header_size;
  122. ctx->callback.sc = callback;
  123. ctx->callback_data = callback_data;
  124. return ctx;
  125. }
  126. EXPORT_SYMBOL(fw_iso_context_create);
  127. void fw_iso_context_destroy(struct fw_iso_context *ctx)
  128. {
  129. ctx->card->driver->free_iso_context(ctx);
  130. }
  131. EXPORT_SYMBOL(fw_iso_context_destroy);
  132. int fw_iso_context_start(struct fw_iso_context *ctx,
  133. int cycle, int sync, int tags)
  134. {
  135. return ctx->card->driver->start_iso(ctx, cycle, sync, tags);
  136. }
  137. EXPORT_SYMBOL(fw_iso_context_start);
  138. int fw_iso_context_set_channels(struct fw_iso_context *ctx, u64 *channels)
  139. {
  140. return ctx->card->driver->set_iso_channels(ctx, channels);
  141. }
  142. int fw_iso_context_queue(struct fw_iso_context *ctx,
  143. struct fw_iso_packet *packet,
  144. struct fw_iso_buffer *buffer,
  145. unsigned long payload)
  146. {
  147. return ctx->card->driver->queue_iso(ctx, packet, buffer, payload);
  148. }
  149. EXPORT_SYMBOL(fw_iso_context_queue);
  150. void fw_iso_context_queue_flush(struct fw_iso_context *ctx)
  151. {
  152. ctx->card->driver->flush_queue_iso(ctx);
  153. }
  154. EXPORT_SYMBOL(fw_iso_context_queue_flush);
  155. int fw_iso_context_flush_completions(struct fw_iso_context *ctx)
  156. {
  157. return ctx->card->driver->flush_iso_completions(ctx);
  158. }
  159. EXPORT_SYMBOL(fw_iso_context_flush_completions);
  160. int fw_iso_context_stop(struct fw_iso_context *ctx)
  161. {
  162. return ctx->card->driver->stop_iso(ctx);
  163. }
  164. EXPORT_SYMBOL(fw_iso_context_stop);
  165. /*
  166. * Isochronous bus resource management (channels, bandwidth), client side
  167. */
  168. static int manage_bandwidth(struct fw_card *card, int irm_id, int generation,
  169. int bandwidth, bool allocate)
  170. {
  171. int try, new, old = allocate ? BANDWIDTH_AVAILABLE_INITIAL : 0;
  172. __be32 data[2];
  173. /*
  174. * On a 1394a IRM with low contention, try < 1 is enough.
  175. * On a 1394-1995 IRM, we need at least try < 2.
  176. * Let's just do try < 5.
  177. */
  178. for (try = 0; try < 5; try++) {
  179. new = allocate ? old - bandwidth : old + bandwidth;
  180. if (new < 0 || new > BANDWIDTH_AVAILABLE_INITIAL)
  181. return -EBUSY;
  182. data[0] = cpu_to_be32(old);
  183. data[1] = cpu_to_be32(new);
  184. switch (fw_run_transaction(card, TCODE_LOCK_COMPARE_SWAP,
  185. irm_id, generation, SCODE_100,
  186. CSR_REGISTER_BASE + CSR_BANDWIDTH_AVAILABLE,
  187. data, 8)) {
  188. case RCODE_GENERATION:
  189. /* A generation change frees all bandwidth. */
  190. return allocate ? -EAGAIN : bandwidth;
  191. case RCODE_COMPLETE:
  192. if (be32_to_cpup(data) == old)
  193. return bandwidth;
  194. old = be32_to_cpup(data);
  195. /* Fall through. */
  196. }
  197. }
  198. return -EIO;
  199. }
  200. static int manage_channel(struct fw_card *card, int irm_id, int generation,
  201. u32 channels_mask, u64 offset, bool allocate)
  202. {
  203. __be32 bit, all, old;
  204. __be32 data[2];
  205. int channel, ret = -EIO, retry = 5;
  206. old = all = allocate ? cpu_to_be32(~0) : 0;
  207. for (channel = 0; channel < 32; channel++) {
  208. if (!(channels_mask & 1 << channel))
  209. continue;
  210. ret = -EBUSY;
  211. bit = cpu_to_be32(1 << (31 - channel));
  212. if ((old & bit) != (all & bit))
  213. continue;
  214. data[0] = old;
  215. data[1] = old ^ bit;
  216. switch (fw_run_transaction(card, TCODE_LOCK_COMPARE_SWAP,
  217. irm_id, generation, SCODE_100,
  218. offset, data, 8)) {
  219. case RCODE_GENERATION:
  220. /* A generation change frees all channels. */
  221. return allocate ? -EAGAIN : channel;
  222. case RCODE_COMPLETE:
  223. if (data[0] == old)
  224. return channel;
  225. old = data[0];
  226. /* Is the IRM 1394a-2000 compliant? */
  227. if ((data[0] & bit) == (data[1] & bit))
  228. continue;
  229. fallthrough; /* It's a 1394-1995 IRM, retry */
  230. default:
  231. if (retry) {
  232. retry--;
  233. channel--;
  234. } else {
  235. ret = -EIO;
  236. }
  237. }
  238. }
  239. return ret;
  240. }
  241. static void deallocate_channel(struct fw_card *card, int irm_id,
  242. int generation, int channel)
  243. {
  244. u32 mask;
  245. u64 offset;
  246. mask = channel < 32 ? 1 << channel : 1 << (channel - 32);
  247. offset = channel < 32 ? CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_HI :
  248. CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_LO;
  249. manage_channel(card, irm_id, generation, mask, offset, false);
  250. }
  251. /**
  252. * fw_iso_resource_manage() - Allocate or deallocate a channel and/or bandwidth
  253. * @card: card interface for this action
  254. * @generation: bus generation
  255. * @channels_mask: bitmask for channel allocation
  256. * @channel: pointer for returning channel allocation result
  257. * @bandwidth: pointer for returning bandwidth allocation result
  258. * @allocate: whether to allocate (true) or deallocate (false)
  259. *
  260. * In parameters: card, generation, channels_mask, bandwidth, allocate
  261. * Out parameters: channel, bandwidth
  262. *
  263. * This function blocks (sleeps) during communication with the IRM.
  264. *
  265. * Allocates or deallocates at most one channel out of channels_mask.
  266. * channels_mask is a bitfield with MSB for channel 63 and LSB for channel 0.
  267. * (Note, the IRM's CHANNELS_AVAILABLE is a big-endian bitfield with MSB for
  268. * channel 0 and LSB for channel 63.)
  269. * Allocates or deallocates as many bandwidth allocation units as specified.
  270. *
  271. * Returns channel < 0 if no channel was allocated or deallocated.
  272. * Returns bandwidth = 0 if no bandwidth was allocated or deallocated.
  273. *
  274. * If generation is stale, deallocations succeed but allocations fail with
  275. * channel = -EAGAIN.
  276. *
  277. * If channel allocation fails, no bandwidth will be allocated either.
  278. * If bandwidth allocation fails, no channel will be allocated either.
  279. * But deallocations of channel and bandwidth are tried independently
  280. * of each other's success.
  281. */
  282. void fw_iso_resource_manage(struct fw_card *card, int generation,
  283. u64 channels_mask, int *channel, int *bandwidth,
  284. bool allocate)
  285. {
  286. u32 channels_hi = channels_mask; /* channels 31...0 */
  287. u32 channels_lo = channels_mask >> 32; /* channels 63...32 */
  288. int irm_id, ret, c = -EINVAL;
  289. spin_lock_irq(&card->lock);
  290. irm_id = card->irm_node->node_id;
  291. spin_unlock_irq(&card->lock);
  292. if (channels_hi)
  293. c = manage_channel(card, irm_id, generation, channels_hi,
  294. CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_HI,
  295. allocate);
  296. if (channels_lo && c < 0) {
  297. c = manage_channel(card, irm_id, generation, channels_lo,
  298. CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_LO,
  299. allocate);
  300. if (c >= 0)
  301. c += 32;
  302. }
  303. *channel = c;
  304. if (allocate && channels_mask != 0 && c < 0)
  305. *bandwidth = 0;
  306. if (*bandwidth == 0)
  307. return;
  308. ret = manage_bandwidth(card, irm_id, generation, *bandwidth, allocate);
  309. if (ret < 0)
  310. *bandwidth = 0;
  311. if (allocate && ret < 0) {
  312. if (c >= 0)
  313. deallocate_channel(card, irm_id, generation, c);
  314. *channel = ret;
  315. }
  316. }
  317. EXPORT_SYMBOL(fw_iso_resource_manage);