core-card.c 20 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright (C) 2005-2007 Kristian Hoegsberg <[email protected]>
  4. */
  5. #include <linux/bug.h>
  6. #include <linux/completion.h>
  7. #include <linux/crc-itu-t.h>
  8. #include <linux/device.h>
  9. #include <linux/errno.h>
  10. #include <linux/firewire.h>
  11. #include <linux/firewire-constants.h>
  12. #include <linux/jiffies.h>
  13. #include <linux/kernel.h>
  14. #include <linux/kref.h>
  15. #include <linux/list.h>
  16. #include <linux/module.h>
  17. #include <linux/mutex.h>
  18. #include <linux/spinlock.h>
  19. #include <linux/workqueue.h>
  20. #include <linux/atomic.h>
  21. #include <asm/byteorder.h>
  22. #include "core.h"
  23. #define define_fw_printk_level(func, kern_level) \
  24. void func(const struct fw_card *card, const char *fmt, ...) \
  25. { \
  26. struct va_format vaf; \
  27. va_list args; \
  28. \
  29. va_start(args, fmt); \
  30. vaf.fmt = fmt; \
  31. vaf.va = &args; \
  32. printk(kern_level KBUILD_MODNAME " %s: %pV", \
  33. dev_name(card->device), &vaf); \
  34. va_end(args); \
  35. }
  36. define_fw_printk_level(fw_err, KERN_ERR);
  37. define_fw_printk_level(fw_notice, KERN_NOTICE);
  38. int fw_compute_block_crc(__be32 *block)
  39. {
  40. int length;
  41. u16 crc;
  42. length = (be32_to_cpu(block[0]) >> 16) & 0xff;
  43. crc = crc_itu_t(0, (u8 *)&block[1], length * 4);
  44. *block |= cpu_to_be32(crc);
  45. return length;
  46. }
  47. static DEFINE_MUTEX(card_mutex);
  48. static LIST_HEAD(card_list);
  49. static LIST_HEAD(descriptor_list);
  50. static int descriptor_count;
  51. static __be32 tmp_config_rom[256];
  52. /* ROM header, bus info block, root dir header, capabilities = 7 quadlets */
  53. static size_t config_rom_length = 1 + 4 + 1 + 1;
  54. #define BIB_CRC(v) ((v) << 0)
  55. #define BIB_CRC_LENGTH(v) ((v) << 16)
  56. #define BIB_INFO_LENGTH(v) ((v) << 24)
  57. #define BIB_BUS_NAME 0x31333934 /* "1394" */
  58. #define BIB_LINK_SPEED(v) ((v) << 0)
  59. #define BIB_GENERATION(v) ((v) << 4)
  60. #define BIB_MAX_ROM(v) ((v) << 8)
  61. #define BIB_MAX_RECEIVE(v) ((v) << 12)
  62. #define BIB_CYC_CLK_ACC(v) ((v) << 16)
  63. #define BIB_PMC ((1) << 27)
  64. #define BIB_BMC ((1) << 28)
  65. #define BIB_ISC ((1) << 29)
  66. #define BIB_CMC ((1) << 30)
  67. #define BIB_IRMC ((1) << 31)
  68. #define NODE_CAPABILITIES 0x0c0083c0 /* per IEEE 1394 clause 8.3.2.6.5.2 */
  69. /*
  70. * IEEE-1394 specifies a default SPLIT_TIMEOUT value of 800 cycles (100 ms),
  71. * but we have to make it longer because there are many devices whose firmware
  72. * is just too slow for that.
  73. */
  74. #define DEFAULT_SPLIT_TIMEOUT (2 * 8000)
  75. #define CANON_OUI 0x000085
  76. static void generate_config_rom(struct fw_card *card, __be32 *config_rom)
  77. {
  78. struct fw_descriptor *desc;
  79. int i, j, k, length;
  80. /*
  81. * Initialize contents of config rom buffer. On the OHCI
  82. * controller, block reads to the config rom accesses the host
  83. * memory, but quadlet read access the hardware bus info block
  84. * registers. That's just crack, but it means we should make
  85. * sure the contents of bus info block in host memory matches
  86. * the version stored in the OHCI registers.
  87. */
  88. config_rom[0] = cpu_to_be32(
  89. BIB_CRC_LENGTH(4) | BIB_INFO_LENGTH(4) | BIB_CRC(0));
  90. config_rom[1] = cpu_to_be32(BIB_BUS_NAME);
  91. config_rom[2] = cpu_to_be32(
  92. BIB_LINK_SPEED(card->link_speed) |
  93. BIB_GENERATION(card->config_rom_generation++ % 14 + 2) |
  94. BIB_MAX_ROM(2) |
  95. BIB_MAX_RECEIVE(card->max_receive) |
  96. BIB_BMC | BIB_ISC | BIB_CMC | BIB_IRMC);
  97. config_rom[3] = cpu_to_be32(card->guid >> 32);
  98. config_rom[4] = cpu_to_be32(card->guid);
  99. /* Generate root directory. */
  100. config_rom[6] = cpu_to_be32(NODE_CAPABILITIES);
  101. i = 7;
  102. j = 7 + descriptor_count;
  103. /* Generate root directory entries for descriptors. */
  104. list_for_each_entry (desc, &descriptor_list, link) {
  105. if (desc->immediate > 0)
  106. config_rom[i++] = cpu_to_be32(desc->immediate);
  107. config_rom[i] = cpu_to_be32(desc->key | (j - i));
  108. i++;
  109. j += desc->length;
  110. }
  111. /* Update root directory length. */
  112. config_rom[5] = cpu_to_be32((i - 5 - 1) << 16);
  113. /* End of root directory, now copy in descriptors. */
  114. list_for_each_entry (desc, &descriptor_list, link) {
  115. for (k = 0; k < desc->length; k++)
  116. config_rom[i + k] = cpu_to_be32(desc->data[k]);
  117. i += desc->length;
  118. }
  119. /* Calculate CRCs for all blocks in the config rom. This
  120. * assumes that CRC length and info length are identical for
  121. * the bus info block, which is always the case for this
  122. * implementation. */
  123. for (i = 0; i < j; i += length + 1)
  124. length = fw_compute_block_crc(config_rom + i);
  125. WARN_ON(j != config_rom_length);
  126. }
  127. static void update_config_roms(void)
  128. {
  129. struct fw_card *card;
  130. list_for_each_entry (card, &card_list, link) {
  131. generate_config_rom(card, tmp_config_rom);
  132. card->driver->set_config_rom(card, tmp_config_rom,
  133. config_rom_length);
  134. }
  135. }
  136. static size_t required_space(struct fw_descriptor *desc)
  137. {
  138. /* descriptor + entry into root dir + optional immediate entry */
  139. return desc->length + 1 + (desc->immediate > 0 ? 1 : 0);
  140. }
  141. int fw_core_add_descriptor(struct fw_descriptor *desc)
  142. {
  143. size_t i;
  144. int ret;
  145. /*
  146. * Check descriptor is valid; the length of all blocks in the
  147. * descriptor has to add up to exactly the length of the
  148. * block.
  149. */
  150. i = 0;
  151. while (i < desc->length)
  152. i += (desc->data[i] >> 16) + 1;
  153. if (i != desc->length)
  154. return -EINVAL;
  155. mutex_lock(&card_mutex);
  156. if (config_rom_length + required_space(desc) > 256) {
  157. ret = -EBUSY;
  158. } else {
  159. list_add_tail(&desc->link, &descriptor_list);
  160. config_rom_length += required_space(desc);
  161. descriptor_count++;
  162. if (desc->immediate > 0)
  163. descriptor_count++;
  164. update_config_roms();
  165. ret = 0;
  166. }
  167. mutex_unlock(&card_mutex);
  168. return ret;
  169. }
  170. EXPORT_SYMBOL(fw_core_add_descriptor);
  171. void fw_core_remove_descriptor(struct fw_descriptor *desc)
  172. {
  173. mutex_lock(&card_mutex);
  174. list_del(&desc->link);
  175. config_rom_length -= required_space(desc);
  176. descriptor_count--;
  177. if (desc->immediate > 0)
  178. descriptor_count--;
  179. update_config_roms();
  180. mutex_unlock(&card_mutex);
  181. }
  182. EXPORT_SYMBOL(fw_core_remove_descriptor);
  183. static int reset_bus(struct fw_card *card, bool short_reset)
  184. {
  185. int reg = short_reset ? 5 : 1;
  186. int bit = short_reset ? PHY_BUS_SHORT_RESET : PHY_BUS_RESET;
  187. return card->driver->update_phy_reg(card, reg, 0, bit);
  188. }
  189. void fw_schedule_bus_reset(struct fw_card *card, bool delayed, bool short_reset)
  190. {
  191. /* We don't try hard to sort out requests of long vs. short resets. */
  192. card->br_short = short_reset;
  193. /* Use an arbitrary short delay to combine multiple reset requests. */
  194. fw_card_get(card);
  195. if (!queue_delayed_work(fw_workqueue, &card->br_work,
  196. delayed ? DIV_ROUND_UP(HZ, 100) : 0))
  197. fw_card_put(card);
  198. }
  199. EXPORT_SYMBOL(fw_schedule_bus_reset);
  200. static void br_work(struct work_struct *work)
  201. {
  202. struct fw_card *card = container_of(work, struct fw_card, br_work.work);
  203. /* Delay for 2s after last reset per IEEE 1394 clause 8.2.1. */
  204. if (card->reset_jiffies != 0 &&
  205. time_before64(get_jiffies_64(), card->reset_jiffies + 2 * HZ)) {
  206. if (!queue_delayed_work(fw_workqueue, &card->br_work, 2 * HZ))
  207. fw_card_put(card);
  208. return;
  209. }
  210. fw_send_phy_config(card, FW_PHY_CONFIG_NO_NODE_ID, card->generation,
  211. FW_PHY_CONFIG_CURRENT_GAP_COUNT);
  212. reset_bus(card, card->br_short);
  213. fw_card_put(card);
  214. }
  215. static void allocate_broadcast_channel(struct fw_card *card, int generation)
  216. {
  217. int channel, bandwidth = 0;
  218. if (!card->broadcast_channel_allocated) {
  219. fw_iso_resource_manage(card, generation, 1ULL << 31,
  220. &channel, &bandwidth, true);
  221. if (channel != 31) {
  222. fw_notice(card, "failed to allocate broadcast channel\n");
  223. return;
  224. }
  225. card->broadcast_channel_allocated = true;
  226. }
  227. device_for_each_child(card->device, (void *)(long)generation,
  228. fw_device_set_broadcast_channel);
  229. }
  230. static const char gap_count_table[] = {
  231. 63, 5, 7, 8, 10, 13, 16, 18, 21, 24, 26, 29, 32, 35, 37, 40
  232. };
  233. void fw_schedule_bm_work(struct fw_card *card, unsigned long delay)
  234. {
  235. fw_card_get(card);
  236. if (!schedule_delayed_work(&card->bm_work, delay))
  237. fw_card_put(card);
  238. }
  239. static void bm_work(struct work_struct *work)
  240. {
  241. struct fw_card *card = container_of(work, struct fw_card, bm_work.work);
  242. struct fw_device *root_device, *irm_device;
  243. struct fw_node *root_node;
  244. int root_id, new_root_id, irm_id, bm_id, local_id;
  245. int gap_count, generation, grace, rcode;
  246. bool do_reset = false;
  247. bool root_device_is_running;
  248. bool root_device_is_cmc;
  249. bool irm_is_1394_1995_only;
  250. bool keep_this_irm;
  251. __be32 transaction_data[2];
  252. spin_lock_irq(&card->lock);
  253. if (card->local_node == NULL) {
  254. spin_unlock_irq(&card->lock);
  255. goto out_put_card;
  256. }
  257. generation = card->generation;
  258. root_node = card->root_node;
  259. fw_node_get(root_node);
  260. root_device = root_node->data;
  261. root_device_is_running = root_device &&
  262. atomic_read(&root_device->state) == FW_DEVICE_RUNNING;
  263. root_device_is_cmc = root_device && root_device->cmc;
  264. irm_device = card->irm_node->data;
  265. irm_is_1394_1995_only = irm_device && irm_device->config_rom &&
  266. (irm_device->config_rom[2] & 0x000000f0) == 0;
  267. /* Canon MV5i works unreliably if it is not root node. */
  268. keep_this_irm = irm_device && irm_device->config_rom &&
  269. irm_device->config_rom[3] >> 8 == CANON_OUI;
  270. root_id = root_node->node_id;
  271. irm_id = card->irm_node->node_id;
  272. local_id = card->local_node->node_id;
  273. grace = time_after64(get_jiffies_64(),
  274. card->reset_jiffies + DIV_ROUND_UP(HZ, 8));
  275. if ((is_next_generation(generation, card->bm_generation) &&
  276. !card->bm_abdicate) ||
  277. (card->bm_generation != generation && grace)) {
  278. /*
  279. * This first step is to figure out who is IRM and
  280. * then try to become bus manager. If the IRM is not
  281. * well defined (e.g. does not have an active link
  282. * layer or does not responds to our lock request, we
  283. * will have to do a little vigilante bus management.
  284. * In that case, we do a goto into the gap count logic
  285. * so that when we do the reset, we still optimize the
  286. * gap count. That could well save a reset in the
  287. * next generation.
  288. */
  289. if (!card->irm_node->link_on) {
  290. new_root_id = local_id;
  291. fw_notice(card, "%s, making local node (%02x) root\n",
  292. "IRM has link off", new_root_id);
  293. goto pick_me;
  294. }
  295. if (irm_is_1394_1995_only && !keep_this_irm) {
  296. new_root_id = local_id;
  297. fw_notice(card, "%s, making local node (%02x) root\n",
  298. "IRM is not 1394a compliant", new_root_id);
  299. goto pick_me;
  300. }
  301. transaction_data[0] = cpu_to_be32(0x3f);
  302. transaction_data[1] = cpu_to_be32(local_id);
  303. spin_unlock_irq(&card->lock);
  304. rcode = fw_run_transaction(card, TCODE_LOCK_COMPARE_SWAP,
  305. irm_id, generation, SCODE_100,
  306. CSR_REGISTER_BASE + CSR_BUS_MANAGER_ID,
  307. transaction_data, 8);
  308. if (rcode == RCODE_GENERATION)
  309. /* Another bus reset, BM work has been rescheduled. */
  310. goto out;
  311. bm_id = be32_to_cpu(transaction_data[0]);
  312. spin_lock_irq(&card->lock);
  313. if (rcode == RCODE_COMPLETE && generation == card->generation)
  314. card->bm_node_id =
  315. bm_id == 0x3f ? local_id : 0xffc0 | bm_id;
  316. spin_unlock_irq(&card->lock);
  317. if (rcode == RCODE_COMPLETE && bm_id != 0x3f) {
  318. /* Somebody else is BM. Only act as IRM. */
  319. if (local_id == irm_id)
  320. allocate_broadcast_channel(card, generation);
  321. goto out;
  322. }
  323. if (rcode == RCODE_SEND_ERROR) {
  324. /*
  325. * We have been unable to send the lock request due to
  326. * some local problem. Let's try again later and hope
  327. * that the problem has gone away by then.
  328. */
  329. fw_schedule_bm_work(card, DIV_ROUND_UP(HZ, 8));
  330. goto out;
  331. }
  332. spin_lock_irq(&card->lock);
  333. if (rcode != RCODE_COMPLETE && !keep_this_irm) {
  334. /*
  335. * The lock request failed, maybe the IRM
  336. * isn't really IRM capable after all. Let's
  337. * do a bus reset and pick the local node as
  338. * root, and thus, IRM.
  339. */
  340. new_root_id = local_id;
  341. fw_notice(card, "BM lock failed (%s), making local node (%02x) root\n",
  342. fw_rcode_string(rcode), new_root_id);
  343. goto pick_me;
  344. }
  345. } else if (card->bm_generation != generation) {
  346. /*
  347. * We weren't BM in the last generation, and the last
  348. * bus reset is less than 125ms ago. Reschedule this job.
  349. */
  350. spin_unlock_irq(&card->lock);
  351. fw_schedule_bm_work(card, DIV_ROUND_UP(HZ, 8));
  352. goto out;
  353. }
  354. /*
  355. * We're bus manager for this generation, so next step is to
  356. * make sure we have an active cycle master and do gap count
  357. * optimization.
  358. */
  359. card->bm_generation = generation;
  360. if (root_device == NULL) {
  361. /*
  362. * Either link_on is false, or we failed to read the
  363. * config rom. In either case, pick another root.
  364. */
  365. new_root_id = local_id;
  366. } else if (!root_device_is_running) {
  367. /*
  368. * If we haven't probed this device yet, bail out now
  369. * and let's try again once that's done.
  370. */
  371. spin_unlock_irq(&card->lock);
  372. goto out;
  373. } else if (root_device_is_cmc) {
  374. /*
  375. * We will send out a force root packet for this
  376. * node as part of the gap count optimization.
  377. */
  378. new_root_id = root_id;
  379. } else {
  380. /*
  381. * Current root has an active link layer and we
  382. * successfully read the config rom, but it's not
  383. * cycle master capable.
  384. */
  385. new_root_id = local_id;
  386. }
  387. pick_me:
  388. /*
  389. * Pick a gap count from 1394a table E-1. The table doesn't cover
  390. * the typically much larger 1394b beta repeater delays though.
  391. */
  392. if (!card->beta_repeaters_present &&
  393. root_node->max_hops < ARRAY_SIZE(gap_count_table))
  394. gap_count = gap_count_table[root_node->max_hops];
  395. else
  396. gap_count = 63;
  397. /*
  398. * Finally, figure out if we should do a reset or not. If we have
  399. * done less than 5 resets with the same physical topology and we
  400. * have either a new root or a new gap count setting, let's do it.
  401. */
  402. if (card->bm_retries++ < 5 &&
  403. (card->gap_count != gap_count || new_root_id != root_id))
  404. do_reset = true;
  405. spin_unlock_irq(&card->lock);
  406. if (do_reset) {
  407. fw_notice(card, "phy config: new root=%x, gap_count=%d\n",
  408. new_root_id, gap_count);
  409. fw_send_phy_config(card, new_root_id, generation, gap_count);
  410. reset_bus(card, true);
  411. /* Will allocate broadcast channel after the reset. */
  412. goto out;
  413. }
  414. if (root_device_is_cmc) {
  415. /*
  416. * Make sure that the cycle master sends cycle start packets.
  417. */
  418. transaction_data[0] = cpu_to_be32(CSR_STATE_BIT_CMSTR);
  419. rcode = fw_run_transaction(card, TCODE_WRITE_QUADLET_REQUEST,
  420. root_id, generation, SCODE_100,
  421. CSR_REGISTER_BASE + CSR_STATE_SET,
  422. transaction_data, 4);
  423. if (rcode == RCODE_GENERATION)
  424. goto out;
  425. }
  426. if (local_id == irm_id)
  427. allocate_broadcast_channel(card, generation);
  428. out:
  429. fw_node_put(root_node);
  430. out_put_card:
  431. fw_card_put(card);
  432. }
  433. void fw_card_initialize(struct fw_card *card,
  434. const struct fw_card_driver *driver,
  435. struct device *device)
  436. {
  437. static atomic_t index = ATOMIC_INIT(-1);
  438. card->index = atomic_inc_return(&index);
  439. card->driver = driver;
  440. card->device = device;
  441. card->current_tlabel = 0;
  442. card->tlabel_mask = 0;
  443. card->split_timeout_hi = DEFAULT_SPLIT_TIMEOUT / 8000;
  444. card->split_timeout_lo = (DEFAULT_SPLIT_TIMEOUT % 8000) << 19;
  445. card->split_timeout_cycles = DEFAULT_SPLIT_TIMEOUT;
  446. card->split_timeout_jiffies =
  447. DIV_ROUND_UP(DEFAULT_SPLIT_TIMEOUT * HZ, 8000);
  448. card->color = 0;
  449. card->broadcast_channel = BROADCAST_CHANNEL_INITIAL;
  450. kref_init(&card->kref);
  451. init_completion(&card->done);
  452. INIT_LIST_HEAD(&card->transaction_list);
  453. INIT_LIST_HEAD(&card->phy_receiver_list);
  454. spin_lock_init(&card->lock);
  455. card->local_node = NULL;
  456. INIT_DELAYED_WORK(&card->br_work, br_work);
  457. INIT_DELAYED_WORK(&card->bm_work, bm_work);
  458. }
  459. EXPORT_SYMBOL(fw_card_initialize);
  460. int fw_card_add(struct fw_card *card,
  461. u32 max_receive, u32 link_speed, u64 guid)
  462. {
  463. int ret;
  464. card->max_receive = max_receive;
  465. card->link_speed = link_speed;
  466. card->guid = guid;
  467. mutex_lock(&card_mutex);
  468. generate_config_rom(card, tmp_config_rom);
  469. ret = card->driver->enable(card, tmp_config_rom, config_rom_length);
  470. if (ret == 0)
  471. list_add_tail(&card->link, &card_list);
  472. mutex_unlock(&card_mutex);
  473. return ret;
  474. }
  475. EXPORT_SYMBOL(fw_card_add);
  476. /*
  477. * The next few functions implement a dummy driver that is used once a card
  478. * driver shuts down an fw_card. This allows the driver to cleanly unload,
  479. * as all IO to the card will be handled (and failed) by the dummy driver
  480. * instead of calling into the module. Only functions for iso context
  481. * shutdown still need to be provided by the card driver.
  482. *
  483. * .read/write_csr() should never be called anymore after the dummy driver
  484. * was bound since they are only used within request handler context.
  485. * .set_config_rom() is never called since the card is taken out of card_list
  486. * before switching to the dummy driver.
  487. */
  488. static int dummy_read_phy_reg(struct fw_card *card, int address)
  489. {
  490. return -ENODEV;
  491. }
  492. static int dummy_update_phy_reg(struct fw_card *card, int address,
  493. int clear_bits, int set_bits)
  494. {
  495. return -ENODEV;
  496. }
  497. static void dummy_send_request(struct fw_card *card, struct fw_packet *packet)
  498. {
  499. packet->callback(packet, card, RCODE_CANCELLED);
  500. }
  501. static void dummy_send_response(struct fw_card *card, struct fw_packet *packet)
  502. {
  503. packet->callback(packet, card, RCODE_CANCELLED);
  504. }
  505. static int dummy_cancel_packet(struct fw_card *card, struct fw_packet *packet)
  506. {
  507. return -ENOENT;
  508. }
  509. static int dummy_enable_phys_dma(struct fw_card *card,
  510. int node_id, int generation)
  511. {
  512. return -ENODEV;
  513. }
  514. static struct fw_iso_context *dummy_allocate_iso_context(struct fw_card *card,
  515. int type, int channel, size_t header_size)
  516. {
  517. return ERR_PTR(-ENODEV);
  518. }
  519. static u32 dummy_read_csr(struct fw_card *card, int csr_offset)
  520. {
  521. return 0;
  522. }
  523. static void dummy_write_csr(struct fw_card *card, int csr_offset, u32 value)
  524. {
  525. }
  526. static int dummy_start_iso(struct fw_iso_context *ctx,
  527. s32 cycle, u32 sync, u32 tags)
  528. {
  529. return -ENODEV;
  530. }
  531. static int dummy_set_iso_channels(struct fw_iso_context *ctx, u64 *channels)
  532. {
  533. return -ENODEV;
  534. }
  535. static int dummy_queue_iso(struct fw_iso_context *ctx, struct fw_iso_packet *p,
  536. struct fw_iso_buffer *buffer, unsigned long payload)
  537. {
  538. return -ENODEV;
  539. }
  540. static void dummy_flush_queue_iso(struct fw_iso_context *ctx)
  541. {
  542. }
  543. static int dummy_flush_iso_completions(struct fw_iso_context *ctx)
  544. {
  545. return -ENODEV;
  546. }
  547. static const struct fw_card_driver dummy_driver_template = {
  548. .read_phy_reg = dummy_read_phy_reg,
  549. .update_phy_reg = dummy_update_phy_reg,
  550. .send_request = dummy_send_request,
  551. .send_response = dummy_send_response,
  552. .cancel_packet = dummy_cancel_packet,
  553. .enable_phys_dma = dummy_enable_phys_dma,
  554. .read_csr = dummy_read_csr,
  555. .write_csr = dummy_write_csr,
  556. .allocate_iso_context = dummy_allocate_iso_context,
  557. .start_iso = dummy_start_iso,
  558. .set_iso_channels = dummy_set_iso_channels,
  559. .queue_iso = dummy_queue_iso,
  560. .flush_queue_iso = dummy_flush_queue_iso,
  561. .flush_iso_completions = dummy_flush_iso_completions,
  562. };
  563. void fw_card_release(struct kref *kref)
  564. {
  565. struct fw_card *card = container_of(kref, struct fw_card, kref);
  566. complete(&card->done);
  567. }
  568. EXPORT_SYMBOL_GPL(fw_card_release);
  569. void fw_core_remove_card(struct fw_card *card)
  570. {
  571. struct fw_card_driver dummy_driver = dummy_driver_template;
  572. unsigned long flags;
  573. card->driver->update_phy_reg(card, 4,
  574. PHY_LINK_ACTIVE | PHY_CONTENDER, 0);
  575. fw_schedule_bus_reset(card, false, true);
  576. mutex_lock(&card_mutex);
  577. list_del_init(&card->link);
  578. mutex_unlock(&card_mutex);
  579. /* Switch off most of the card driver interface. */
  580. dummy_driver.free_iso_context = card->driver->free_iso_context;
  581. dummy_driver.stop_iso = card->driver->stop_iso;
  582. card->driver = &dummy_driver;
  583. spin_lock_irqsave(&card->lock, flags);
  584. fw_destroy_nodes(card);
  585. spin_unlock_irqrestore(&card->lock, flags);
  586. /* Wait for all users, especially device workqueue jobs, to finish. */
  587. fw_card_put(card);
  588. wait_for_completion(&card->done);
  589. WARN_ON(!list_empty(&card->transaction_list));
  590. }
  591. EXPORT_SYMBOL(fw_core_remove_card);
  592. /**
  593. * fw_card_read_cycle_time: read from Isochronous Cycle Timer Register of 1394 OHCI in MMIO region
  594. * for controller card.
  595. * @card: The instance of card for 1394 OHCI controller.
  596. * @cycle_time: The mutual reference to value of cycle time for the read operation.
  597. *
  598. * Read value from Isochronous Cycle Timer Register of 1394 OHCI in MMIO region for the given
  599. * controller card. This function accesses the region without any lock primitives or IRQ mask.
  600. * When returning successfully, the content of @value argument has value aligned to host endianness,
  601. * formetted by CYCLE_TIME CSR Register of IEEE 1394 std.
  602. *
  603. * Context: Any context.
  604. * Return:
  605. * * 0 - Read successfully.
  606. * * -ENODEV - The controller is unavailable due to being removed or unbound.
  607. */
  608. int fw_card_read_cycle_time(struct fw_card *card, u32 *cycle_time)
  609. {
  610. if (card->driver->read_csr == dummy_read_csr)
  611. return -ENODEV;
  612. // It's possible to switch to dummy driver between the above and the below. This is the best
  613. // effort to return -ENODEV.
  614. *cycle_time = card->driver->read_csr(card, CSR_CYCLE_TIME);
  615. return 0;
  616. }
  617. EXPORT_SYMBOL_GPL(fw_card_read_cycle_time);