safexcel_hash.c 87 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2017 Marvell
  4. *
  5. * Antoine Tenart <[email protected]>
  6. */
  7. #include <crypto/aes.h>
  8. #include <crypto/hmac.h>
  9. #include <crypto/md5.h>
  10. #include <crypto/sha1.h>
  11. #include <crypto/sha2.h>
  12. #include <crypto/sha3.h>
  13. #include <crypto/skcipher.h>
  14. #include <crypto/sm3.h>
  15. #include <crypto/internal/cipher.h>
  16. #include <linux/device.h>
  17. #include <linux/dma-mapping.h>
  18. #include <linux/dmapool.h>
  19. #include "safexcel.h"
  20. struct safexcel_ahash_ctx {
  21. struct safexcel_context base;
  22. u32 alg;
  23. u8 key_sz;
  24. bool cbcmac;
  25. bool do_fallback;
  26. bool fb_init_done;
  27. bool fb_do_setkey;
  28. struct crypto_aes_ctx *aes;
  29. struct crypto_ahash *fback;
  30. struct crypto_shash *shpre;
  31. struct shash_desc *shdesc;
  32. };
  33. struct safexcel_ahash_req {
  34. bool last_req;
  35. bool finish;
  36. bool hmac;
  37. bool needs_inv;
  38. bool hmac_zlen;
  39. bool len_is_le;
  40. bool not_first;
  41. bool xcbcmac;
  42. int nents;
  43. dma_addr_t result_dma;
  44. u32 digest;
  45. u8 state_sz; /* expected state size, only set once */
  46. u8 block_sz; /* block size, only set once */
  47. u8 digest_sz; /* output digest size, only set once */
  48. __le32 state[SHA3_512_BLOCK_SIZE /
  49. sizeof(__le32)] __aligned(sizeof(__le32));
  50. u64 len;
  51. u64 processed;
  52. u8 cache[HASH_CACHE_SIZE] __aligned(sizeof(u32));
  53. dma_addr_t cache_dma;
  54. unsigned int cache_sz;
  55. u8 cache_next[HASH_CACHE_SIZE] __aligned(sizeof(u32));
  56. };
  57. static inline u64 safexcel_queued_len(struct safexcel_ahash_req *req)
  58. {
  59. return req->len - req->processed;
  60. }
  61. static void safexcel_hash_token(struct safexcel_command_desc *cdesc,
  62. u32 input_length, u32 result_length,
  63. bool cbcmac)
  64. {
  65. struct safexcel_token *token =
  66. (struct safexcel_token *)cdesc->control_data.token;
  67. token[0].opcode = EIP197_TOKEN_OPCODE_DIRECTION;
  68. token[0].packet_length = input_length;
  69. token[0].instructions = EIP197_TOKEN_INS_TYPE_HASH;
  70. input_length &= 15;
  71. if (unlikely(cbcmac && input_length)) {
  72. token[0].stat = 0;
  73. token[1].opcode = EIP197_TOKEN_OPCODE_INSERT;
  74. token[1].packet_length = 16 - input_length;
  75. token[1].stat = EIP197_TOKEN_STAT_LAST_HASH;
  76. token[1].instructions = EIP197_TOKEN_INS_TYPE_HASH;
  77. } else {
  78. token[0].stat = EIP197_TOKEN_STAT_LAST_HASH;
  79. eip197_noop_token(&token[1]);
  80. }
  81. token[2].opcode = EIP197_TOKEN_OPCODE_INSERT;
  82. token[2].stat = EIP197_TOKEN_STAT_LAST_HASH |
  83. EIP197_TOKEN_STAT_LAST_PACKET;
  84. token[2].packet_length = result_length;
  85. token[2].instructions = EIP197_TOKEN_INS_TYPE_OUTPUT |
  86. EIP197_TOKEN_INS_INSERT_HASH_DIGEST;
  87. eip197_noop_token(&token[3]);
  88. }
  89. static void safexcel_context_control(struct safexcel_ahash_ctx *ctx,
  90. struct safexcel_ahash_req *req,
  91. struct safexcel_command_desc *cdesc)
  92. {
  93. struct safexcel_crypto_priv *priv = ctx->base.priv;
  94. u64 count = 0;
  95. cdesc->control_data.control0 = ctx->alg;
  96. cdesc->control_data.control1 = 0;
  97. /*
  98. * Copy the input digest if needed, and setup the context
  99. * fields. Do this now as we need it to setup the first command
  100. * descriptor.
  101. */
  102. if (unlikely(req->digest == CONTEXT_CONTROL_DIGEST_XCM)) {
  103. if (req->xcbcmac)
  104. memcpy(ctx->base.ctxr->data, &ctx->base.ipad, ctx->key_sz);
  105. else
  106. memcpy(ctx->base.ctxr->data, req->state, req->state_sz);
  107. if (!req->finish && req->xcbcmac)
  108. cdesc->control_data.control0 |=
  109. CONTEXT_CONTROL_DIGEST_XCM |
  110. CONTEXT_CONTROL_TYPE_HASH_OUT |
  111. CONTEXT_CONTROL_NO_FINISH_HASH |
  112. CONTEXT_CONTROL_SIZE(req->state_sz /
  113. sizeof(u32));
  114. else
  115. cdesc->control_data.control0 |=
  116. CONTEXT_CONTROL_DIGEST_XCM |
  117. CONTEXT_CONTROL_TYPE_HASH_OUT |
  118. CONTEXT_CONTROL_SIZE(req->state_sz /
  119. sizeof(u32));
  120. return;
  121. } else if (!req->processed) {
  122. /* First - and possibly only - block of basic hash only */
  123. if (req->finish)
  124. cdesc->control_data.control0 |= req->digest |
  125. CONTEXT_CONTROL_TYPE_HASH_OUT |
  126. CONTEXT_CONTROL_RESTART_HASH |
  127. /* ensure its not 0! */
  128. CONTEXT_CONTROL_SIZE(1);
  129. else
  130. cdesc->control_data.control0 |= req->digest |
  131. CONTEXT_CONTROL_TYPE_HASH_OUT |
  132. CONTEXT_CONTROL_RESTART_HASH |
  133. CONTEXT_CONTROL_NO_FINISH_HASH |
  134. /* ensure its not 0! */
  135. CONTEXT_CONTROL_SIZE(1);
  136. return;
  137. }
  138. /* Hash continuation or HMAC, setup (inner) digest from state */
  139. memcpy(ctx->base.ctxr->data, req->state, req->state_sz);
  140. if (req->finish) {
  141. /* Compute digest count for hash/HMAC finish operations */
  142. if ((req->digest == CONTEXT_CONTROL_DIGEST_PRECOMPUTED) ||
  143. req->hmac_zlen || (req->processed != req->block_sz)) {
  144. count = req->processed / EIP197_COUNTER_BLOCK_SIZE;
  145. /* This is a hardware limitation, as the
  146. * counter must fit into an u32. This represents
  147. * a fairly big amount of input data, so we
  148. * shouldn't see this.
  149. */
  150. if (unlikely(count & 0xffffffff00000000ULL)) {
  151. dev_warn(priv->dev,
  152. "Input data is too big\n");
  153. return;
  154. }
  155. }
  156. if ((req->digest == CONTEXT_CONTROL_DIGEST_PRECOMPUTED) ||
  157. /* Special case: zero length HMAC */
  158. req->hmac_zlen ||
  159. /* PE HW < 4.4 cannot do HMAC continue, fake using hash */
  160. (req->processed != req->block_sz)) {
  161. /* Basic hash continue operation, need digest + cnt */
  162. cdesc->control_data.control0 |=
  163. CONTEXT_CONTROL_SIZE((req->state_sz >> 2) + 1) |
  164. CONTEXT_CONTROL_TYPE_HASH_OUT |
  165. CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  166. /* For zero-len HMAC, don't finalize, already padded! */
  167. if (req->hmac_zlen)
  168. cdesc->control_data.control0 |=
  169. CONTEXT_CONTROL_NO_FINISH_HASH;
  170. cdesc->control_data.control1 |=
  171. CONTEXT_CONTROL_DIGEST_CNT;
  172. ctx->base.ctxr->data[req->state_sz >> 2] =
  173. cpu_to_le32(count);
  174. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  175. /* Clear zero-length HMAC flag for next operation! */
  176. req->hmac_zlen = false;
  177. } else { /* HMAC */
  178. /* Need outer digest for HMAC finalization */
  179. memcpy(ctx->base.ctxr->data + (req->state_sz >> 2),
  180. &ctx->base.opad, req->state_sz);
  181. /* Single pass HMAC - no digest count */
  182. cdesc->control_data.control0 |=
  183. CONTEXT_CONTROL_SIZE(req->state_sz >> 1) |
  184. CONTEXT_CONTROL_TYPE_HASH_OUT |
  185. CONTEXT_CONTROL_DIGEST_HMAC;
  186. }
  187. } else { /* Hash continuation, do not finish yet */
  188. cdesc->control_data.control0 |=
  189. CONTEXT_CONTROL_SIZE(req->state_sz >> 2) |
  190. CONTEXT_CONTROL_DIGEST_PRECOMPUTED |
  191. CONTEXT_CONTROL_TYPE_HASH_OUT |
  192. CONTEXT_CONTROL_NO_FINISH_HASH;
  193. }
  194. }
  195. static int safexcel_ahash_enqueue(struct ahash_request *areq);
  196. static int safexcel_handle_req_result(struct safexcel_crypto_priv *priv,
  197. int ring,
  198. struct crypto_async_request *async,
  199. bool *should_complete, int *ret)
  200. {
  201. struct safexcel_result_desc *rdesc;
  202. struct ahash_request *areq = ahash_request_cast(async);
  203. struct crypto_ahash *ahash = crypto_ahash_reqtfm(areq);
  204. struct safexcel_ahash_req *sreq = ahash_request_ctx(areq);
  205. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(ahash);
  206. u64 cache_len;
  207. *ret = 0;
  208. rdesc = safexcel_ring_next_rptr(priv, &priv->ring[ring].rdr);
  209. if (IS_ERR(rdesc)) {
  210. dev_err(priv->dev,
  211. "hash: result: could not retrieve the result descriptor\n");
  212. *ret = PTR_ERR(rdesc);
  213. } else {
  214. *ret = safexcel_rdesc_check_errors(priv, rdesc);
  215. }
  216. safexcel_complete(priv, ring);
  217. if (sreq->nents) {
  218. dma_unmap_sg(priv->dev, areq->src, sreq->nents, DMA_TO_DEVICE);
  219. sreq->nents = 0;
  220. }
  221. if (sreq->result_dma) {
  222. dma_unmap_single(priv->dev, sreq->result_dma, sreq->digest_sz,
  223. DMA_FROM_DEVICE);
  224. sreq->result_dma = 0;
  225. }
  226. if (sreq->cache_dma) {
  227. dma_unmap_single(priv->dev, sreq->cache_dma, sreq->cache_sz,
  228. DMA_TO_DEVICE);
  229. sreq->cache_dma = 0;
  230. sreq->cache_sz = 0;
  231. }
  232. if (sreq->finish) {
  233. if (sreq->hmac &&
  234. (sreq->digest != CONTEXT_CONTROL_DIGEST_HMAC)) {
  235. /* Faking HMAC using hash - need to do outer hash */
  236. memcpy(sreq->cache, sreq->state,
  237. crypto_ahash_digestsize(ahash));
  238. memcpy(sreq->state, &ctx->base.opad, sreq->digest_sz);
  239. sreq->len = sreq->block_sz +
  240. crypto_ahash_digestsize(ahash);
  241. sreq->processed = sreq->block_sz;
  242. sreq->hmac = 0;
  243. if (priv->flags & EIP197_TRC_CACHE)
  244. ctx->base.needs_inv = true;
  245. areq->nbytes = 0;
  246. safexcel_ahash_enqueue(areq);
  247. *should_complete = false; /* Not done yet */
  248. return 1;
  249. }
  250. if (unlikely(sreq->digest == CONTEXT_CONTROL_DIGEST_XCM &&
  251. ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_CRC32)) {
  252. /* Undo final XOR with 0xffffffff ...*/
  253. *(__le32 *)areq->result = ~sreq->state[0];
  254. } else {
  255. memcpy(areq->result, sreq->state,
  256. crypto_ahash_digestsize(ahash));
  257. }
  258. }
  259. cache_len = safexcel_queued_len(sreq);
  260. if (cache_len)
  261. memcpy(sreq->cache, sreq->cache_next, cache_len);
  262. *should_complete = true;
  263. return 1;
  264. }
  265. static int safexcel_ahash_send_req(struct crypto_async_request *async, int ring,
  266. int *commands, int *results)
  267. {
  268. struct ahash_request *areq = ahash_request_cast(async);
  269. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  270. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  271. struct safexcel_crypto_priv *priv = ctx->base.priv;
  272. struct safexcel_command_desc *cdesc, *first_cdesc = NULL;
  273. struct safexcel_result_desc *rdesc;
  274. struct scatterlist *sg;
  275. struct safexcel_token *dmmy;
  276. int i, extra = 0, n_cdesc = 0, ret = 0, cache_len, skip = 0;
  277. u64 queued, len;
  278. queued = safexcel_queued_len(req);
  279. if (queued <= HASH_CACHE_SIZE)
  280. cache_len = queued;
  281. else
  282. cache_len = queued - areq->nbytes;
  283. if (!req->finish && !req->last_req) {
  284. /* If this is not the last request and the queued data does not
  285. * fit into full cache blocks, cache it for the next send call.
  286. */
  287. extra = queued & (HASH_CACHE_SIZE - 1);
  288. /* If this is not the last request and the queued data
  289. * is a multiple of a block, cache the last one for now.
  290. */
  291. if (!extra)
  292. extra = HASH_CACHE_SIZE;
  293. sg_pcopy_to_buffer(areq->src, sg_nents(areq->src),
  294. req->cache_next, extra,
  295. areq->nbytes - extra);
  296. queued -= extra;
  297. if (!queued) {
  298. *commands = 0;
  299. *results = 0;
  300. return 0;
  301. }
  302. extra = 0;
  303. }
  304. if (unlikely(req->xcbcmac && req->processed > AES_BLOCK_SIZE)) {
  305. if (unlikely(cache_len < AES_BLOCK_SIZE)) {
  306. /*
  307. * Cache contains less than 1 full block, complete.
  308. */
  309. extra = AES_BLOCK_SIZE - cache_len;
  310. if (queued > cache_len) {
  311. /* More data follows: borrow bytes */
  312. u64 tmp = queued - cache_len;
  313. skip = min_t(u64, tmp, extra);
  314. sg_pcopy_to_buffer(areq->src,
  315. sg_nents(areq->src),
  316. req->cache + cache_len,
  317. skip, 0);
  318. }
  319. extra -= skip;
  320. memset(req->cache + cache_len + skip, 0, extra);
  321. if (!ctx->cbcmac && extra) {
  322. // 10- padding for XCBCMAC & CMAC
  323. req->cache[cache_len + skip] = 0x80;
  324. // HW will use K2 iso K3 - compensate!
  325. for (i = 0; i < AES_BLOCK_SIZE / 4; i++) {
  326. u32 *cache = (void *)req->cache;
  327. u32 *ipad = ctx->base.ipad.word;
  328. u32 x;
  329. x = ipad[i] ^ ipad[i + 4];
  330. cache[i] ^= swab32(x);
  331. }
  332. }
  333. cache_len = AES_BLOCK_SIZE;
  334. queued = queued + extra;
  335. }
  336. /* XCBC continue: XOR previous result into 1st word */
  337. crypto_xor(req->cache, (const u8 *)req->state, AES_BLOCK_SIZE);
  338. }
  339. len = queued;
  340. /* Add a command descriptor for the cached data, if any */
  341. if (cache_len) {
  342. req->cache_dma = dma_map_single(priv->dev, req->cache,
  343. cache_len, DMA_TO_DEVICE);
  344. if (dma_mapping_error(priv->dev, req->cache_dma))
  345. return -EINVAL;
  346. req->cache_sz = cache_len;
  347. first_cdesc = safexcel_add_cdesc(priv, ring, 1,
  348. (cache_len == len),
  349. req->cache_dma, cache_len,
  350. len, ctx->base.ctxr_dma,
  351. &dmmy);
  352. if (IS_ERR(first_cdesc)) {
  353. ret = PTR_ERR(first_cdesc);
  354. goto unmap_cache;
  355. }
  356. n_cdesc++;
  357. queued -= cache_len;
  358. if (!queued)
  359. goto send_command;
  360. }
  361. /* Now handle the current ahash request buffer(s) */
  362. req->nents = dma_map_sg(priv->dev, areq->src,
  363. sg_nents_for_len(areq->src,
  364. areq->nbytes),
  365. DMA_TO_DEVICE);
  366. if (!req->nents) {
  367. ret = -ENOMEM;
  368. goto cdesc_rollback;
  369. }
  370. for_each_sg(areq->src, sg, req->nents, i) {
  371. int sglen = sg_dma_len(sg);
  372. if (unlikely(sglen <= skip)) {
  373. skip -= sglen;
  374. continue;
  375. }
  376. /* Do not overflow the request */
  377. if ((queued + skip) <= sglen)
  378. sglen = queued;
  379. else
  380. sglen -= skip;
  381. cdesc = safexcel_add_cdesc(priv, ring, !n_cdesc,
  382. !(queued - sglen),
  383. sg_dma_address(sg) + skip, sglen,
  384. len, ctx->base.ctxr_dma, &dmmy);
  385. if (IS_ERR(cdesc)) {
  386. ret = PTR_ERR(cdesc);
  387. goto unmap_sg;
  388. }
  389. if (!n_cdesc)
  390. first_cdesc = cdesc;
  391. n_cdesc++;
  392. queued -= sglen;
  393. if (!queued)
  394. break;
  395. skip = 0;
  396. }
  397. send_command:
  398. /* Setup the context options */
  399. safexcel_context_control(ctx, req, first_cdesc);
  400. /* Add the token */
  401. safexcel_hash_token(first_cdesc, len, req->digest_sz, ctx->cbcmac);
  402. req->result_dma = dma_map_single(priv->dev, req->state, req->digest_sz,
  403. DMA_FROM_DEVICE);
  404. if (dma_mapping_error(priv->dev, req->result_dma)) {
  405. ret = -EINVAL;
  406. goto unmap_sg;
  407. }
  408. /* Add a result descriptor */
  409. rdesc = safexcel_add_rdesc(priv, ring, 1, 1, req->result_dma,
  410. req->digest_sz);
  411. if (IS_ERR(rdesc)) {
  412. ret = PTR_ERR(rdesc);
  413. goto unmap_result;
  414. }
  415. safexcel_rdr_req_set(priv, ring, rdesc, &areq->base);
  416. req->processed += len - extra;
  417. *commands = n_cdesc;
  418. *results = 1;
  419. return 0;
  420. unmap_result:
  421. dma_unmap_single(priv->dev, req->result_dma, req->digest_sz,
  422. DMA_FROM_DEVICE);
  423. unmap_sg:
  424. if (req->nents) {
  425. dma_unmap_sg(priv->dev, areq->src, req->nents, DMA_TO_DEVICE);
  426. req->nents = 0;
  427. }
  428. cdesc_rollback:
  429. for (i = 0; i < n_cdesc; i++)
  430. safexcel_ring_rollback_wptr(priv, &priv->ring[ring].cdr);
  431. unmap_cache:
  432. if (req->cache_dma) {
  433. dma_unmap_single(priv->dev, req->cache_dma, req->cache_sz,
  434. DMA_TO_DEVICE);
  435. req->cache_dma = 0;
  436. req->cache_sz = 0;
  437. }
  438. return ret;
  439. }
  440. static int safexcel_handle_inv_result(struct safexcel_crypto_priv *priv,
  441. int ring,
  442. struct crypto_async_request *async,
  443. bool *should_complete, int *ret)
  444. {
  445. struct safexcel_result_desc *rdesc;
  446. struct ahash_request *areq = ahash_request_cast(async);
  447. struct crypto_ahash *ahash = crypto_ahash_reqtfm(areq);
  448. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(ahash);
  449. int enq_ret;
  450. *ret = 0;
  451. rdesc = safexcel_ring_next_rptr(priv, &priv->ring[ring].rdr);
  452. if (IS_ERR(rdesc)) {
  453. dev_err(priv->dev,
  454. "hash: invalidate: could not retrieve the result descriptor\n");
  455. *ret = PTR_ERR(rdesc);
  456. } else {
  457. *ret = safexcel_rdesc_check_errors(priv, rdesc);
  458. }
  459. safexcel_complete(priv, ring);
  460. if (ctx->base.exit_inv) {
  461. dma_pool_free(priv->context_pool, ctx->base.ctxr,
  462. ctx->base.ctxr_dma);
  463. *should_complete = true;
  464. return 1;
  465. }
  466. ring = safexcel_select_ring(priv);
  467. ctx->base.ring = ring;
  468. spin_lock_bh(&priv->ring[ring].queue_lock);
  469. enq_ret = crypto_enqueue_request(&priv->ring[ring].queue, async);
  470. spin_unlock_bh(&priv->ring[ring].queue_lock);
  471. if (enq_ret != -EINPROGRESS)
  472. *ret = enq_ret;
  473. queue_work(priv->ring[ring].workqueue,
  474. &priv->ring[ring].work_data.work);
  475. *should_complete = false;
  476. return 1;
  477. }
  478. static int safexcel_handle_result(struct safexcel_crypto_priv *priv, int ring,
  479. struct crypto_async_request *async,
  480. bool *should_complete, int *ret)
  481. {
  482. struct ahash_request *areq = ahash_request_cast(async);
  483. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  484. int err;
  485. BUG_ON(!(priv->flags & EIP197_TRC_CACHE) && req->needs_inv);
  486. if (req->needs_inv) {
  487. req->needs_inv = false;
  488. err = safexcel_handle_inv_result(priv, ring, async,
  489. should_complete, ret);
  490. } else {
  491. err = safexcel_handle_req_result(priv, ring, async,
  492. should_complete, ret);
  493. }
  494. return err;
  495. }
  496. static int safexcel_ahash_send_inv(struct crypto_async_request *async,
  497. int ring, int *commands, int *results)
  498. {
  499. struct ahash_request *areq = ahash_request_cast(async);
  500. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  501. int ret;
  502. ret = safexcel_invalidate_cache(async, ctx->base.priv,
  503. ctx->base.ctxr_dma, ring);
  504. if (unlikely(ret))
  505. return ret;
  506. *commands = 1;
  507. *results = 1;
  508. return 0;
  509. }
  510. static int safexcel_ahash_send(struct crypto_async_request *async,
  511. int ring, int *commands, int *results)
  512. {
  513. struct ahash_request *areq = ahash_request_cast(async);
  514. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  515. int ret;
  516. if (req->needs_inv)
  517. ret = safexcel_ahash_send_inv(async, ring, commands, results);
  518. else
  519. ret = safexcel_ahash_send_req(async, ring, commands, results);
  520. return ret;
  521. }
  522. static int safexcel_ahash_exit_inv(struct crypto_tfm *tfm)
  523. {
  524. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm);
  525. struct safexcel_crypto_priv *priv = ctx->base.priv;
  526. EIP197_REQUEST_ON_STACK(req, ahash, EIP197_AHASH_REQ_SIZE);
  527. struct safexcel_ahash_req *rctx = ahash_request_ctx(req);
  528. struct safexcel_inv_result result = {};
  529. int ring = ctx->base.ring;
  530. memset(req, 0, EIP197_AHASH_REQ_SIZE);
  531. /* create invalidation request */
  532. init_completion(&result.completion);
  533. ahash_request_set_callback(req, CRYPTO_TFM_REQ_MAY_BACKLOG,
  534. safexcel_inv_complete, &result);
  535. ahash_request_set_tfm(req, __crypto_ahash_cast(tfm));
  536. ctx = crypto_tfm_ctx(req->base.tfm);
  537. ctx->base.exit_inv = true;
  538. rctx->needs_inv = true;
  539. spin_lock_bh(&priv->ring[ring].queue_lock);
  540. crypto_enqueue_request(&priv->ring[ring].queue, &req->base);
  541. spin_unlock_bh(&priv->ring[ring].queue_lock);
  542. queue_work(priv->ring[ring].workqueue,
  543. &priv->ring[ring].work_data.work);
  544. wait_for_completion(&result.completion);
  545. if (result.error) {
  546. dev_warn(priv->dev, "hash: completion error (%d)\n",
  547. result.error);
  548. return result.error;
  549. }
  550. return 0;
  551. }
  552. /* safexcel_ahash_cache: cache data until at least one request can be sent to
  553. * the engine, aka. when there is at least 1 block size in the pipe.
  554. */
  555. static int safexcel_ahash_cache(struct ahash_request *areq)
  556. {
  557. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  558. u64 cache_len;
  559. /* cache_len: everything accepted by the driver but not sent yet,
  560. * tot sz handled by update() - last req sz - tot sz handled by send()
  561. */
  562. cache_len = safexcel_queued_len(req);
  563. /*
  564. * In case there isn't enough bytes to proceed (less than a
  565. * block size), cache the data until we have enough.
  566. */
  567. if (cache_len + areq->nbytes <= HASH_CACHE_SIZE) {
  568. sg_pcopy_to_buffer(areq->src, sg_nents(areq->src),
  569. req->cache + cache_len,
  570. areq->nbytes, 0);
  571. return 0;
  572. }
  573. /* We couldn't cache all the data */
  574. return -E2BIG;
  575. }
  576. static int safexcel_ahash_enqueue(struct ahash_request *areq)
  577. {
  578. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  579. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  580. struct safexcel_crypto_priv *priv = ctx->base.priv;
  581. int ret, ring;
  582. req->needs_inv = false;
  583. if (ctx->base.ctxr) {
  584. if (priv->flags & EIP197_TRC_CACHE && !ctx->base.needs_inv &&
  585. /* invalidate for *any* non-XCBC continuation */
  586. ((req->not_first && !req->xcbcmac) ||
  587. /* invalidate if (i)digest changed */
  588. memcmp(ctx->base.ctxr->data, req->state, req->state_sz) ||
  589. /* invalidate for HMAC finish with odigest changed */
  590. (req->finish && req->hmac &&
  591. memcmp(ctx->base.ctxr->data + (req->state_sz>>2),
  592. &ctx->base.opad, req->state_sz))))
  593. /*
  594. * We're still setting needs_inv here, even though it is
  595. * cleared right away, because the needs_inv flag can be
  596. * set in other functions and we want to keep the same
  597. * logic.
  598. */
  599. ctx->base.needs_inv = true;
  600. if (ctx->base.needs_inv) {
  601. ctx->base.needs_inv = false;
  602. req->needs_inv = true;
  603. }
  604. } else {
  605. ctx->base.ring = safexcel_select_ring(priv);
  606. ctx->base.ctxr = dma_pool_zalloc(priv->context_pool,
  607. EIP197_GFP_FLAGS(areq->base),
  608. &ctx->base.ctxr_dma);
  609. if (!ctx->base.ctxr)
  610. return -ENOMEM;
  611. }
  612. req->not_first = true;
  613. ring = ctx->base.ring;
  614. spin_lock_bh(&priv->ring[ring].queue_lock);
  615. ret = crypto_enqueue_request(&priv->ring[ring].queue, &areq->base);
  616. spin_unlock_bh(&priv->ring[ring].queue_lock);
  617. queue_work(priv->ring[ring].workqueue,
  618. &priv->ring[ring].work_data.work);
  619. return ret;
  620. }
  621. static int safexcel_ahash_update(struct ahash_request *areq)
  622. {
  623. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  624. int ret;
  625. /* If the request is 0 length, do nothing */
  626. if (!areq->nbytes)
  627. return 0;
  628. /* Add request to the cache if it fits */
  629. ret = safexcel_ahash_cache(areq);
  630. /* Update total request length */
  631. req->len += areq->nbytes;
  632. /* If not all data could fit into the cache, go process the excess.
  633. * Also go process immediately for an HMAC IV precompute, which
  634. * will never be finished at all, but needs to be processed anyway.
  635. */
  636. if ((ret && !req->finish) || req->last_req)
  637. return safexcel_ahash_enqueue(areq);
  638. return 0;
  639. }
  640. static int safexcel_ahash_final(struct ahash_request *areq)
  641. {
  642. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  643. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  644. req->finish = true;
  645. if (unlikely(!req->len && !areq->nbytes)) {
  646. /*
  647. * If we have an overall 0 length *hash* request:
  648. * The HW cannot do 0 length hash, so we provide the correct
  649. * result directly here.
  650. */
  651. if (ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_MD5)
  652. memcpy(areq->result, md5_zero_message_hash,
  653. MD5_DIGEST_SIZE);
  654. else if (ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_SHA1)
  655. memcpy(areq->result, sha1_zero_message_hash,
  656. SHA1_DIGEST_SIZE);
  657. else if (ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_SHA224)
  658. memcpy(areq->result, sha224_zero_message_hash,
  659. SHA224_DIGEST_SIZE);
  660. else if (ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_SHA256)
  661. memcpy(areq->result, sha256_zero_message_hash,
  662. SHA256_DIGEST_SIZE);
  663. else if (ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_SHA384)
  664. memcpy(areq->result, sha384_zero_message_hash,
  665. SHA384_DIGEST_SIZE);
  666. else if (ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_SHA512)
  667. memcpy(areq->result, sha512_zero_message_hash,
  668. SHA512_DIGEST_SIZE);
  669. else if (ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_SM3) {
  670. memcpy(areq->result,
  671. EIP197_SM3_ZEROM_HASH, SM3_DIGEST_SIZE);
  672. }
  673. return 0;
  674. } else if (unlikely(req->digest == CONTEXT_CONTROL_DIGEST_XCM &&
  675. ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_MD5 &&
  676. req->len == sizeof(u32) && !areq->nbytes)) {
  677. /* Zero length CRC32 */
  678. memcpy(areq->result, &ctx->base.ipad, sizeof(u32));
  679. return 0;
  680. } else if (unlikely(ctx->cbcmac && req->len == AES_BLOCK_SIZE &&
  681. !areq->nbytes)) {
  682. /* Zero length CBC MAC */
  683. memset(areq->result, 0, AES_BLOCK_SIZE);
  684. return 0;
  685. } else if (unlikely(req->xcbcmac && req->len == AES_BLOCK_SIZE &&
  686. !areq->nbytes)) {
  687. /* Zero length (X)CBC/CMAC */
  688. int i;
  689. for (i = 0; i < AES_BLOCK_SIZE / sizeof(u32); i++) {
  690. u32 *result = (void *)areq->result;
  691. /* K3 */
  692. result[i] = swab32(ctx->base.ipad.word[i + 4]);
  693. }
  694. areq->result[0] ^= 0x80; // 10- padding
  695. aes_encrypt(ctx->aes, areq->result, areq->result);
  696. return 0;
  697. } else if (unlikely(req->hmac &&
  698. (req->len == req->block_sz) &&
  699. !areq->nbytes)) {
  700. /*
  701. * If we have an overall 0 length *HMAC* request:
  702. * For HMAC, we need to finalize the inner digest
  703. * and then perform the outer hash.
  704. */
  705. /* generate pad block in the cache */
  706. /* start with a hash block of all zeroes */
  707. memset(req->cache, 0, req->block_sz);
  708. /* set the first byte to 0x80 to 'append a 1 bit' */
  709. req->cache[0] = 0x80;
  710. /* add the length in bits in the last 2 bytes */
  711. if (req->len_is_le) {
  712. /* Little endian length word (e.g. MD5) */
  713. req->cache[req->block_sz-8] = (req->block_sz << 3) &
  714. 255;
  715. req->cache[req->block_sz-7] = (req->block_sz >> 5);
  716. } else {
  717. /* Big endian length word (e.g. any SHA) */
  718. req->cache[req->block_sz-2] = (req->block_sz >> 5);
  719. req->cache[req->block_sz-1] = (req->block_sz << 3) &
  720. 255;
  721. }
  722. req->len += req->block_sz; /* plus 1 hash block */
  723. /* Set special zero-length HMAC flag */
  724. req->hmac_zlen = true;
  725. /* Finalize HMAC */
  726. req->digest = CONTEXT_CONTROL_DIGEST_HMAC;
  727. } else if (req->hmac) {
  728. /* Finalize HMAC */
  729. req->digest = CONTEXT_CONTROL_DIGEST_HMAC;
  730. }
  731. return safexcel_ahash_enqueue(areq);
  732. }
  733. static int safexcel_ahash_finup(struct ahash_request *areq)
  734. {
  735. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  736. req->finish = true;
  737. safexcel_ahash_update(areq);
  738. return safexcel_ahash_final(areq);
  739. }
  740. static int safexcel_ahash_export(struct ahash_request *areq, void *out)
  741. {
  742. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  743. struct safexcel_ahash_export_state *export = out;
  744. export->len = req->len;
  745. export->processed = req->processed;
  746. export->digest = req->digest;
  747. memcpy(export->state, req->state, req->state_sz);
  748. memcpy(export->cache, req->cache, HASH_CACHE_SIZE);
  749. return 0;
  750. }
  751. static int safexcel_ahash_import(struct ahash_request *areq, const void *in)
  752. {
  753. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  754. const struct safexcel_ahash_export_state *export = in;
  755. int ret;
  756. ret = crypto_ahash_init(areq);
  757. if (ret)
  758. return ret;
  759. req->len = export->len;
  760. req->processed = export->processed;
  761. req->digest = export->digest;
  762. memcpy(req->cache, export->cache, HASH_CACHE_SIZE);
  763. memcpy(req->state, export->state, req->state_sz);
  764. return 0;
  765. }
  766. static int safexcel_ahash_cra_init(struct crypto_tfm *tfm)
  767. {
  768. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm);
  769. struct safexcel_alg_template *tmpl =
  770. container_of(__crypto_ahash_alg(tfm->__crt_alg),
  771. struct safexcel_alg_template, alg.ahash);
  772. ctx->base.priv = tmpl->priv;
  773. ctx->base.send = safexcel_ahash_send;
  774. ctx->base.handle_result = safexcel_handle_result;
  775. ctx->fb_do_setkey = false;
  776. crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),
  777. sizeof(struct safexcel_ahash_req));
  778. return 0;
  779. }
  780. static int safexcel_sha1_init(struct ahash_request *areq)
  781. {
  782. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  783. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  784. memset(req, 0, sizeof(*req));
  785. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA1;
  786. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  787. req->state_sz = SHA1_DIGEST_SIZE;
  788. req->digest_sz = SHA1_DIGEST_SIZE;
  789. req->block_sz = SHA1_BLOCK_SIZE;
  790. return 0;
  791. }
  792. static int safexcel_sha1_digest(struct ahash_request *areq)
  793. {
  794. int ret = safexcel_sha1_init(areq);
  795. if (ret)
  796. return ret;
  797. return safexcel_ahash_finup(areq);
  798. }
  799. static void safexcel_ahash_cra_exit(struct crypto_tfm *tfm)
  800. {
  801. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm);
  802. struct safexcel_crypto_priv *priv = ctx->base.priv;
  803. int ret;
  804. /* context not allocated, skip invalidation */
  805. if (!ctx->base.ctxr)
  806. return;
  807. if (priv->flags & EIP197_TRC_CACHE) {
  808. ret = safexcel_ahash_exit_inv(tfm);
  809. if (ret)
  810. dev_warn(priv->dev, "hash: invalidation error %d\n", ret);
  811. } else {
  812. dma_pool_free(priv->context_pool, ctx->base.ctxr,
  813. ctx->base.ctxr_dma);
  814. }
  815. }
  816. struct safexcel_alg_template safexcel_alg_sha1 = {
  817. .type = SAFEXCEL_ALG_TYPE_AHASH,
  818. .algo_mask = SAFEXCEL_ALG_SHA1,
  819. .alg.ahash = {
  820. .init = safexcel_sha1_init,
  821. .update = safexcel_ahash_update,
  822. .final = safexcel_ahash_final,
  823. .finup = safexcel_ahash_finup,
  824. .digest = safexcel_sha1_digest,
  825. .export = safexcel_ahash_export,
  826. .import = safexcel_ahash_import,
  827. .halg = {
  828. .digestsize = SHA1_DIGEST_SIZE,
  829. .statesize = sizeof(struct safexcel_ahash_export_state),
  830. .base = {
  831. .cra_name = "sha1",
  832. .cra_driver_name = "safexcel-sha1",
  833. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  834. .cra_flags = CRYPTO_ALG_ASYNC |
  835. CRYPTO_ALG_ALLOCATES_MEMORY |
  836. CRYPTO_ALG_KERN_DRIVER_ONLY,
  837. .cra_blocksize = SHA1_BLOCK_SIZE,
  838. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  839. .cra_init = safexcel_ahash_cra_init,
  840. .cra_exit = safexcel_ahash_cra_exit,
  841. .cra_module = THIS_MODULE,
  842. },
  843. },
  844. },
  845. };
  846. static int safexcel_hmac_sha1_init(struct ahash_request *areq)
  847. {
  848. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  849. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  850. memset(req, 0, sizeof(*req));
  851. /* Start from ipad precompute */
  852. memcpy(req->state, &ctx->base.ipad, SHA1_DIGEST_SIZE);
  853. /* Already processed the key^ipad part now! */
  854. req->len = SHA1_BLOCK_SIZE;
  855. req->processed = SHA1_BLOCK_SIZE;
  856. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA1;
  857. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  858. req->state_sz = SHA1_DIGEST_SIZE;
  859. req->digest_sz = SHA1_DIGEST_SIZE;
  860. req->block_sz = SHA1_BLOCK_SIZE;
  861. req->hmac = true;
  862. return 0;
  863. }
  864. static int safexcel_hmac_sha1_digest(struct ahash_request *areq)
  865. {
  866. int ret = safexcel_hmac_sha1_init(areq);
  867. if (ret)
  868. return ret;
  869. return safexcel_ahash_finup(areq);
  870. }
  871. struct safexcel_ahash_result {
  872. struct completion completion;
  873. int error;
  874. };
  875. static void safexcel_ahash_complete(struct crypto_async_request *req, int error)
  876. {
  877. struct safexcel_ahash_result *result = req->data;
  878. if (error == -EINPROGRESS)
  879. return;
  880. result->error = error;
  881. complete(&result->completion);
  882. }
  883. static int safexcel_hmac_init_pad(struct ahash_request *areq,
  884. unsigned int blocksize, const u8 *key,
  885. unsigned int keylen, u8 *ipad, u8 *opad)
  886. {
  887. struct safexcel_ahash_result result;
  888. struct scatterlist sg;
  889. int ret, i;
  890. u8 *keydup;
  891. if (keylen <= blocksize) {
  892. memcpy(ipad, key, keylen);
  893. } else {
  894. keydup = kmemdup(key, keylen, GFP_KERNEL);
  895. if (!keydup)
  896. return -ENOMEM;
  897. ahash_request_set_callback(areq, CRYPTO_TFM_REQ_MAY_BACKLOG,
  898. safexcel_ahash_complete, &result);
  899. sg_init_one(&sg, keydup, keylen);
  900. ahash_request_set_crypt(areq, &sg, ipad, keylen);
  901. init_completion(&result.completion);
  902. ret = crypto_ahash_digest(areq);
  903. if (ret == -EINPROGRESS || ret == -EBUSY) {
  904. wait_for_completion_interruptible(&result.completion);
  905. ret = result.error;
  906. }
  907. /* Avoid leaking */
  908. kfree_sensitive(keydup);
  909. if (ret)
  910. return ret;
  911. keylen = crypto_ahash_digestsize(crypto_ahash_reqtfm(areq));
  912. }
  913. memset(ipad + keylen, 0, blocksize - keylen);
  914. memcpy(opad, ipad, blocksize);
  915. for (i = 0; i < blocksize; i++) {
  916. ipad[i] ^= HMAC_IPAD_VALUE;
  917. opad[i] ^= HMAC_OPAD_VALUE;
  918. }
  919. return 0;
  920. }
  921. static int safexcel_hmac_init_iv(struct ahash_request *areq,
  922. unsigned int blocksize, u8 *pad, void *state)
  923. {
  924. struct safexcel_ahash_result result;
  925. struct safexcel_ahash_req *req;
  926. struct scatterlist sg;
  927. int ret;
  928. ahash_request_set_callback(areq, CRYPTO_TFM_REQ_MAY_BACKLOG,
  929. safexcel_ahash_complete, &result);
  930. sg_init_one(&sg, pad, blocksize);
  931. ahash_request_set_crypt(areq, &sg, pad, blocksize);
  932. init_completion(&result.completion);
  933. ret = crypto_ahash_init(areq);
  934. if (ret)
  935. return ret;
  936. req = ahash_request_ctx(areq);
  937. req->hmac = true;
  938. req->last_req = true;
  939. ret = crypto_ahash_update(areq);
  940. if (ret && ret != -EINPROGRESS && ret != -EBUSY)
  941. return ret;
  942. wait_for_completion_interruptible(&result.completion);
  943. if (result.error)
  944. return result.error;
  945. return crypto_ahash_export(areq, state);
  946. }
  947. static int __safexcel_hmac_setkey(const char *alg, const u8 *key,
  948. unsigned int keylen,
  949. void *istate, void *ostate)
  950. {
  951. struct ahash_request *areq;
  952. struct crypto_ahash *tfm;
  953. unsigned int blocksize;
  954. u8 *ipad, *opad;
  955. int ret;
  956. tfm = crypto_alloc_ahash(alg, 0, 0);
  957. if (IS_ERR(tfm))
  958. return PTR_ERR(tfm);
  959. areq = ahash_request_alloc(tfm, GFP_KERNEL);
  960. if (!areq) {
  961. ret = -ENOMEM;
  962. goto free_ahash;
  963. }
  964. crypto_ahash_clear_flags(tfm, ~0);
  965. blocksize = crypto_tfm_alg_blocksize(crypto_ahash_tfm(tfm));
  966. ipad = kcalloc(2, blocksize, GFP_KERNEL);
  967. if (!ipad) {
  968. ret = -ENOMEM;
  969. goto free_request;
  970. }
  971. opad = ipad + blocksize;
  972. ret = safexcel_hmac_init_pad(areq, blocksize, key, keylen, ipad, opad);
  973. if (ret)
  974. goto free_ipad;
  975. ret = safexcel_hmac_init_iv(areq, blocksize, ipad, istate);
  976. if (ret)
  977. goto free_ipad;
  978. ret = safexcel_hmac_init_iv(areq, blocksize, opad, ostate);
  979. free_ipad:
  980. kfree(ipad);
  981. free_request:
  982. ahash_request_free(areq);
  983. free_ahash:
  984. crypto_free_ahash(tfm);
  985. return ret;
  986. }
  987. int safexcel_hmac_setkey(struct safexcel_context *base, const u8 *key,
  988. unsigned int keylen, const char *alg,
  989. unsigned int state_sz)
  990. {
  991. struct safexcel_crypto_priv *priv = base->priv;
  992. struct safexcel_ahash_export_state istate, ostate;
  993. int ret;
  994. ret = __safexcel_hmac_setkey(alg, key, keylen, &istate, &ostate);
  995. if (ret)
  996. return ret;
  997. if (priv->flags & EIP197_TRC_CACHE && base->ctxr &&
  998. (memcmp(&base->ipad, istate.state, state_sz) ||
  999. memcmp(&base->opad, ostate.state, state_sz)))
  1000. base->needs_inv = true;
  1001. memcpy(&base->ipad, &istate.state, state_sz);
  1002. memcpy(&base->opad, &ostate.state, state_sz);
  1003. return 0;
  1004. }
  1005. static int safexcel_hmac_alg_setkey(struct crypto_ahash *tfm, const u8 *key,
  1006. unsigned int keylen, const char *alg,
  1007. unsigned int state_sz)
  1008. {
  1009. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  1010. return safexcel_hmac_setkey(&ctx->base, key, keylen, alg, state_sz);
  1011. }
  1012. static int safexcel_hmac_sha1_setkey(struct crypto_ahash *tfm, const u8 *key,
  1013. unsigned int keylen)
  1014. {
  1015. return safexcel_hmac_alg_setkey(tfm, key, keylen, "safexcel-sha1",
  1016. SHA1_DIGEST_SIZE);
  1017. }
  1018. struct safexcel_alg_template safexcel_alg_hmac_sha1 = {
  1019. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1020. .algo_mask = SAFEXCEL_ALG_SHA1,
  1021. .alg.ahash = {
  1022. .init = safexcel_hmac_sha1_init,
  1023. .update = safexcel_ahash_update,
  1024. .final = safexcel_ahash_final,
  1025. .finup = safexcel_ahash_finup,
  1026. .digest = safexcel_hmac_sha1_digest,
  1027. .setkey = safexcel_hmac_sha1_setkey,
  1028. .export = safexcel_ahash_export,
  1029. .import = safexcel_ahash_import,
  1030. .halg = {
  1031. .digestsize = SHA1_DIGEST_SIZE,
  1032. .statesize = sizeof(struct safexcel_ahash_export_state),
  1033. .base = {
  1034. .cra_name = "hmac(sha1)",
  1035. .cra_driver_name = "safexcel-hmac-sha1",
  1036. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1037. .cra_flags = CRYPTO_ALG_ASYNC |
  1038. CRYPTO_ALG_ALLOCATES_MEMORY |
  1039. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1040. .cra_blocksize = SHA1_BLOCK_SIZE,
  1041. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1042. .cra_init = safexcel_ahash_cra_init,
  1043. .cra_exit = safexcel_ahash_cra_exit,
  1044. .cra_module = THIS_MODULE,
  1045. },
  1046. },
  1047. },
  1048. };
  1049. static int safexcel_sha256_init(struct ahash_request *areq)
  1050. {
  1051. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1052. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  1053. memset(req, 0, sizeof(*req));
  1054. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA256;
  1055. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  1056. req->state_sz = SHA256_DIGEST_SIZE;
  1057. req->digest_sz = SHA256_DIGEST_SIZE;
  1058. req->block_sz = SHA256_BLOCK_SIZE;
  1059. return 0;
  1060. }
  1061. static int safexcel_sha256_digest(struct ahash_request *areq)
  1062. {
  1063. int ret = safexcel_sha256_init(areq);
  1064. if (ret)
  1065. return ret;
  1066. return safexcel_ahash_finup(areq);
  1067. }
  1068. struct safexcel_alg_template safexcel_alg_sha256 = {
  1069. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1070. .algo_mask = SAFEXCEL_ALG_SHA2_256,
  1071. .alg.ahash = {
  1072. .init = safexcel_sha256_init,
  1073. .update = safexcel_ahash_update,
  1074. .final = safexcel_ahash_final,
  1075. .finup = safexcel_ahash_finup,
  1076. .digest = safexcel_sha256_digest,
  1077. .export = safexcel_ahash_export,
  1078. .import = safexcel_ahash_import,
  1079. .halg = {
  1080. .digestsize = SHA256_DIGEST_SIZE,
  1081. .statesize = sizeof(struct safexcel_ahash_export_state),
  1082. .base = {
  1083. .cra_name = "sha256",
  1084. .cra_driver_name = "safexcel-sha256",
  1085. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1086. .cra_flags = CRYPTO_ALG_ASYNC |
  1087. CRYPTO_ALG_ALLOCATES_MEMORY |
  1088. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1089. .cra_blocksize = SHA256_BLOCK_SIZE,
  1090. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1091. .cra_init = safexcel_ahash_cra_init,
  1092. .cra_exit = safexcel_ahash_cra_exit,
  1093. .cra_module = THIS_MODULE,
  1094. },
  1095. },
  1096. },
  1097. };
  1098. static int safexcel_sha224_init(struct ahash_request *areq)
  1099. {
  1100. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1101. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  1102. memset(req, 0, sizeof(*req));
  1103. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA224;
  1104. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  1105. req->state_sz = SHA256_DIGEST_SIZE;
  1106. req->digest_sz = SHA256_DIGEST_SIZE;
  1107. req->block_sz = SHA256_BLOCK_SIZE;
  1108. return 0;
  1109. }
  1110. static int safexcel_sha224_digest(struct ahash_request *areq)
  1111. {
  1112. int ret = safexcel_sha224_init(areq);
  1113. if (ret)
  1114. return ret;
  1115. return safexcel_ahash_finup(areq);
  1116. }
  1117. struct safexcel_alg_template safexcel_alg_sha224 = {
  1118. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1119. .algo_mask = SAFEXCEL_ALG_SHA2_256,
  1120. .alg.ahash = {
  1121. .init = safexcel_sha224_init,
  1122. .update = safexcel_ahash_update,
  1123. .final = safexcel_ahash_final,
  1124. .finup = safexcel_ahash_finup,
  1125. .digest = safexcel_sha224_digest,
  1126. .export = safexcel_ahash_export,
  1127. .import = safexcel_ahash_import,
  1128. .halg = {
  1129. .digestsize = SHA224_DIGEST_SIZE,
  1130. .statesize = sizeof(struct safexcel_ahash_export_state),
  1131. .base = {
  1132. .cra_name = "sha224",
  1133. .cra_driver_name = "safexcel-sha224",
  1134. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1135. .cra_flags = CRYPTO_ALG_ASYNC |
  1136. CRYPTO_ALG_ALLOCATES_MEMORY |
  1137. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1138. .cra_blocksize = SHA224_BLOCK_SIZE,
  1139. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1140. .cra_init = safexcel_ahash_cra_init,
  1141. .cra_exit = safexcel_ahash_cra_exit,
  1142. .cra_module = THIS_MODULE,
  1143. },
  1144. },
  1145. },
  1146. };
  1147. static int safexcel_hmac_sha224_setkey(struct crypto_ahash *tfm, const u8 *key,
  1148. unsigned int keylen)
  1149. {
  1150. return safexcel_hmac_alg_setkey(tfm, key, keylen, "safexcel-sha224",
  1151. SHA256_DIGEST_SIZE);
  1152. }
  1153. static int safexcel_hmac_sha224_init(struct ahash_request *areq)
  1154. {
  1155. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1156. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  1157. memset(req, 0, sizeof(*req));
  1158. /* Start from ipad precompute */
  1159. memcpy(req->state, &ctx->base.ipad, SHA256_DIGEST_SIZE);
  1160. /* Already processed the key^ipad part now! */
  1161. req->len = SHA256_BLOCK_SIZE;
  1162. req->processed = SHA256_BLOCK_SIZE;
  1163. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA224;
  1164. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  1165. req->state_sz = SHA256_DIGEST_SIZE;
  1166. req->digest_sz = SHA256_DIGEST_SIZE;
  1167. req->block_sz = SHA256_BLOCK_SIZE;
  1168. req->hmac = true;
  1169. return 0;
  1170. }
  1171. static int safexcel_hmac_sha224_digest(struct ahash_request *areq)
  1172. {
  1173. int ret = safexcel_hmac_sha224_init(areq);
  1174. if (ret)
  1175. return ret;
  1176. return safexcel_ahash_finup(areq);
  1177. }
  1178. struct safexcel_alg_template safexcel_alg_hmac_sha224 = {
  1179. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1180. .algo_mask = SAFEXCEL_ALG_SHA2_256,
  1181. .alg.ahash = {
  1182. .init = safexcel_hmac_sha224_init,
  1183. .update = safexcel_ahash_update,
  1184. .final = safexcel_ahash_final,
  1185. .finup = safexcel_ahash_finup,
  1186. .digest = safexcel_hmac_sha224_digest,
  1187. .setkey = safexcel_hmac_sha224_setkey,
  1188. .export = safexcel_ahash_export,
  1189. .import = safexcel_ahash_import,
  1190. .halg = {
  1191. .digestsize = SHA224_DIGEST_SIZE,
  1192. .statesize = sizeof(struct safexcel_ahash_export_state),
  1193. .base = {
  1194. .cra_name = "hmac(sha224)",
  1195. .cra_driver_name = "safexcel-hmac-sha224",
  1196. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1197. .cra_flags = CRYPTO_ALG_ASYNC |
  1198. CRYPTO_ALG_ALLOCATES_MEMORY |
  1199. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1200. .cra_blocksize = SHA224_BLOCK_SIZE,
  1201. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1202. .cra_init = safexcel_ahash_cra_init,
  1203. .cra_exit = safexcel_ahash_cra_exit,
  1204. .cra_module = THIS_MODULE,
  1205. },
  1206. },
  1207. },
  1208. };
  1209. static int safexcel_hmac_sha256_setkey(struct crypto_ahash *tfm, const u8 *key,
  1210. unsigned int keylen)
  1211. {
  1212. return safexcel_hmac_alg_setkey(tfm, key, keylen, "safexcel-sha256",
  1213. SHA256_DIGEST_SIZE);
  1214. }
  1215. static int safexcel_hmac_sha256_init(struct ahash_request *areq)
  1216. {
  1217. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1218. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  1219. memset(req, 0, sizeof(*req));
  1220. /* Start from ipad precompute */
  1221. memcpy(req->state, &ctx->base.ipad, SHA256_DIGEST_SIZE);
  1222. /* Already processed the key^ipad part now! */
  1223. req->len = SHA256_BLOCK_SIZE;
  1224. req->processed = SHA256_BLOCK_SIZE;
  1225. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA256;
  1226. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  1227. req->state_sz = SHA256_DIGEST_SIZE;
  1228. req->digest_sz = SHA256_DIGEST_SIZE;
  1229. req->block_sz = SHA256_BLOCK_SIZE;
  1230. req->hmac = true;
  1231. return 0;
  1232. }
  1233. static int safexcel_hmac_sha256_digest(struct ahash_request *areq)
  1234. {
  1235. int ret = safexcel_hmac_sha256_init(areq);
  1236. if (ret)
  1237. return ret;
  1238. return safexcel_ahash_finup(areq);
  1239. }
  1240. struct safexcel_alg_template safexcel_alg_hmac_sha256 = {
  1241. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1242. .algo_mask = SAFEXCEL_ALG_SHA2_256,
  1243. .alg.ahash = {
  1244. .init = safexcel_hmac_sha256_init,
  1245. .update = safexcel_ahash_update,
  1246. .final = safexcel_ahash_final,
  1247. .finup = safexcel_ahash_finup,
  1248. .digest = safexcel_hmac_sha256_digest,
  1249. .setkey = safexcel_hmac_sha256_setkey,
  1250. .export = safexcel_ahash_export,
  1251. .import = safexcel_ahash_import,
  1252. .halg = {
  1253. .digestsize = SHA256_DIGEST_SIZE,
  1254. .statesize = sizeof(struct safexcel_ahash_export_state),
  1255. .base = {
  1256. .cra_name = "hmac(sha256)",
  1257. .cra_driver_name = "safexcel-hmac-sha256",
  1258. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1259. .cra_flags = CRYPTO_ALG_ASYNC |
  1260. CRYPTO_ALG_ALLOCATES_MEMORY |
  1261. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1262. .cra_blocksize = SHA256_BLOCK_SIZE,
  1263. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1264. .cra_init = safexcel_ahash_cra_init,
  1265. .cra_exit = safexcel_ahash_cra_exit,
  1266. .cra_module = THIS_MODULE,
  1267. },
  1268. },
  1269. },
  1270. };
  1271. static int safexcel_sha512_init(struct ahash_request *areq)
  1272. {
  1273. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1274. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  1275. memset(req, 0, sizeof(*req));
  1276. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA512;
  1277. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  1278. req->state_sz = SHA512_DIGEST_SIZE;
  1279. req->digest_sz = SHA512_DIGEST_SIZE;
  1280. req->block_sz = SHA512_BLOCK_SIZE;
  1281. return 0;
  1282. }
  1283. static int safexcel_sha512_digest(struct ahash_request *areq)
  1284. {
  1285. int ret = safexcel_sha512_init(areq);
  1286. if (ret)
  1287. return ret;
  1288. return safexcel_ahash_finup(areq);
  1289. }
  1290. struct safexcel_alg_template safexcel_alg_sha512 = {
  1291. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1292. .algo_mask = SAFEXCEL_ALG_SHA2_512,
  1293. .alg.ahash = {
  1294. .init = safexcel_sha512_init,
  1295. .update = safexcel_ahash_update,
  1296. .final = safexcel_ahash_final,
  1297. .finup = safexcel_ahash_finup,
  1298. .digest = safexcel_sha512_digest,
  1299. .export = safexcel_ahash_export,
  1300. .import = safexcel_ahash_import,
  1301. .halg = {
  1302. .digestsize = SHA512_DIGEST_SIZE,
  1303. .statesize = sizeof(struct safexcel_ahash_export_state),
  1304. .base = {
  1305. .cra_name = "sha512",
  1306. .cra_driver_name = "safexcel-sha512",
  1307. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1308. .cra_flags = CRYPTO_ALG_ASYNC |
  1309. CRYPTO_ALG_ALLOCATES_MEMORY |
  1310. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1311. .cra_blocksize = SHA512_BLOCK_SIZE,
  1312. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1313. .cra_init = safexcel_ahash_cra_init,
  1314. .cra_exit = safexcel_ahash_cra_exit,
  1315. .cra_module = THIS_MODULE,
  1316. },
  1317. },
  1318. },
  1319. };
  1320. static int safexcel_sha384_init(struct ahash_request *areq)
  1321. {
  1322. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1323. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  1324. memset(req, 0, sizeof(*req));
  1325. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA384;
  1326. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  1327. req->state_sz = SHA512_DIGEST_SIZE;
  1328. req->digest_sz = SHA512_DIGEST_SIZE;
  1329. req->block_sz = SHA512_BLOCK_SIZE;
  1330. return 0;
  1331. }
  1332. static int safexcel_sha384_digest(struct ahash_request *areq)
  1333. {
  1334. int ret = safexcel_sha384_init(areq);
  1335. if (ret)
  1336. return ret;
  1337. return safexcel_ahash_finup(areq);
  1338. }
  1339. struct safexcel_alg_template safexcel_alg_sha384 = {
  1340. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1341. .algo_mask = SAFEXCEL_ALG_SHA2_512,
  1342. .alg.ahash = {
  1343. .init = safexcel_sha384_init,
  1344. .update = safexcel_ahash_update,
  1345. .final = safexcel_ahash_final,
  1346. .finup = safexcel_ahash_finup,
  1347. .digest = safexcel_sha384_digest,
  1348. .export = safexcel_ahash_export,
  1349. .import = safexcel_ahash_import,
  1350. .halg = {
  1351. .digestsize = SHA384_DIGEST_SIZE,
  1352. .statesize = sizeof(struct safexcel_ahash_export_state),
  1353. .base = {
  1354. .cra_name = "sha384",
  1355. .cra_driver_name = "safexcel-sha384",
  1356. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1357. .cra_flags = CRYPTO_ALG_ASYNC |
  1358. CRYPTO_ALG_ALLOCATES_MEMORY |
  1359. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1360. .cra_blocksize = SHA384_BLOCK_SIZE,
  1361. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1362. .cra_init = safexcel_ahash_cra_init,
  1363. .cra_exit = safexcel_ahash_cra_exit,
  1364. .cra_module = THIS_MODULE,
  1365. },
  1366. },
  1367. },
  1368. };
  1369. static int safexcel_hmac_sha512_setkey(struct crypto_ahash *tfm, const u8 *key,
  1370. unsigned int keylen)
  1371. {
  1372. return safexcel_hmac_alg_setkey(tfm, key, keylen, "safexcel-sha512",
  1373. SHA512_DIGEST_SIZE);
  1374. }
  1375. static int safexcel_hmac_sha512_init(struct ahash_request *areq)
  1376. {
  1377. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1378. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  1379. memset(req, 0, sizeof(*req));
  1380. /* Start from ipad precompute */
  1381. memcpy(req->state, &ctx->base.ipad, SHA512_DIGEST_SIZE);
  1382. /* Already processed the key^ipad part now! */
  1383. req->len = SHA512_BLOCK_SIZE;
  1384. req->processed = SHA512_BLOCK_SIZE;
  1385. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA512;
  1386. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  1387. req->state_sz = SHA512_DIGEST_SIZE;
  1388. req->digest_sz = SHA512_DIGEST_SIZE;
  1389. req->block_sz = SHA512_BLOCK_SIZE;
  1390. req->hmac = true;
  1391. return 0;
  1392. }
  1393. static int safexcel_hmac_sha512_digest(struct ahash_request *areq)
  1394. {
  1395. int ret = safexcel_hmac_sha512_init(areq);
  1396. if (ret)
  1397. return ret;
  1398. return safexcel_ahash_finup(areq);
  1399. }
  1400. struct safexcel_alg_template safexcel_alg_hmac_sha512 = {
  1401. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1402. .algo_mask = SAFEXCEL_ALG_SHA2_512,
  1403. .alg.ahash = {
  1404. .init = safexcel_hmac_sha512_init,
  1405. .update = safexcel_ahash_update,
  1406. .final = safexcel_ahash_final,
  1407. .finup = safexcel_ahash_finup,
  1408. .digest = safexcel_hmac_sha512_digest,
  1409. .setkey = safexcel_hmac_sha512_setkey,
  1410. .export = safexcel_ahash_export,
  1411. .import = safexcel_ahash_import,
  1412. .halg = {
  1413. .digestsize = SHA512_DIGEST_SIZE,
  1414. .statesize = sizeof(struct safexcel_ahash_export_state),
  1415. .base = {
  1416. .cra_name = "hmac(sha512)",
  1417. .cra_driver_name = "safexcel-hmac-sha512",
  1418. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1419. .cra_flags = CRYPTO_ALG_ASYNC |
  1420. CRYPTO_ALG_ALLOCATES_MEMORY |
  1421. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1422. .cra_blocksize = SHA512_BLOCK_SIZE,
  1423. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1424. .cra_init = safexcel_ahash_cra_init,
  1425. .cra_exit = safexcel_ahash_cra_exit,
  1426. .cra_module = THIS_MODULE,
  1427. },
  1428. },
  1429. },
  1430. };
  1431. static int safexcel_hmac_sha384_setkey(struct crypto_ahash *tfm, const u8 *key,
  1432. unsigned int keylen)
  1433. {
  1434. return safexcel_hmac_alg_setkey(tfm, key, keylen, "safexcel-sha384",
  1435. SHA512_DIGEST_SIZE);
  1436. }
  1437. static int safexcel_hmac_sha384_init(struct ahash_request *areq)
  1438. {
  1439. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1440. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  1441. memset(req, 0, sizeof(*req));
  1442. /* Start from ipad precompute */
  1443. memcpy(req->state, &ctx->base.ipad, SHA512_DIGEST_SIZE);
  1444. /* Already processed the key^ipad part now! */
  1445. req->len = SHA512_BLOCK_SIZE;
  1446. req->processed = SHA512_BLOCK_SIZE;
  1447. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA384;
  1448. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  1449. req->state_sz = SHA512_DIGEST_SIZE;
  1450. req->digest_sz = SHA512_DIGEST_SIZE;
  1451. req->block_sz = SHA512_BLOCK_SIZE;
  1452. req->hmac = true;
  1453. return 0;
  1454. }
  1455. static int safexcel_hmac_sha384_digest(struct ahash_request *areq)
  1456. {
  1457. int ret = safexcel_hmac_sha384_init(areq);
  1458. if (ret)
  1459. return ret;
  1460. return safexcel_ahash_finup(areq);
  1461. }
  1462. struct safexcel_alg_template safexcel_alg_hmac_sha384 = {
  1463. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1464. .algo_mask = SAFEXCEL_ALG_SHA2_512,
  1465. .alg.ahash = {
  1466. .init = safexcel_hmac_sha384_init,
  1467. .update = safexcel_ahash_update,
  1468. .final = safexcel_ahash_final,
  1469. .finup = safexcel_ahash_finup,
  1470. .digest = safexcel_hmac_sha384_digest,
  1471. .setkey = safexcel_hmac_sha384_setkey,
  1472. .export = safexcel_ahash_export,
  1473. .import = safexcel_ahash_import,
  1474. .halg = {
  1475. .digestsize = SHA384_DIGEST_SIZE,
  1476. .statesize = sizeof(struct safexcel_ahash_export_state),
  1477. .base = {
  1478. .cra_name = "hmac(sha384)",
  1479. .cra_driver_name = "safexcel-hmac-sha384",
  1480. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1481. .cra_flags = CRYPTO_ALG_ASYNC |
  1482. CRYPTO_ALG_ALLOCATES_MEMORY |
  1483. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1484. .cra_blocksize = SHA384_BLOCK_SIZE,
  1485. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1486. .cra_init = safexcel_ahash_cra_init,
  1487. .cra_exit = safexcel_ahash_cra_exit,
  1488. .cra_module = THIS_MODULE,
  1489. },
  1490. },
  1491. },
  1492. };
  1493. static int safexcel_md5_init(struct ahash_request *areq)
  1494. {
  1495. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1496. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  1497. memset(req, 0, sizeof(*req));
  1498. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_MD5;
  1499. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  1500. req->state_sz = MD5_DIGEST_SIZE;
  1501. req->digest_sz = MD5_DIGEST_SIZE;
  1502. req->block_sz = MD5_HMAC_BLOCK_SIZE;
  1503. return 0;
  1504. }
  1505. static int safexcel_md5_digest(struct ahash_request *areq)
  1506. {
  1507. int ret = safexcel_md5_init(areq);
  1508. if (ret)
  1509. return ret;
  1510. return safexcel_ahash_finup(areq);
  1511. }
  1512. struct safexcel_alg_template safexcel_alg_md5 = {
  1513. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1514. .algo_mask = SAFEXCEL_ALG_MD5,
  1515. .alg.ahash = {
  1516. .init = safexcel_md5_init,
  1517. .update = safexcel_ahash_update,
  1518. .final = safexcel_ahash_final,
  1519. .finup = safexcel_ahash_finup,
  1520. .digest = safexcel_md5_digest,
  1521. .export = safexcel_ahash_export,
  1522. .import = safexcel_ahash_import,
  1523. .halg = {
  1524. .digestsize = MD5_DIGEST_SIZE,
  1525. .statesize = sizeof(struct safexcel_ahash_export_state),
  1526. .base = {
  1527. .cra_name = "md5",
  1528. .cra_driver_name = "safexcel-md5",
  1529. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1530. .cra_flags = CRYPTO_ALG_ASYNC |
  1531. CRYPTO_ALG_ALLOCATES_MEMORY |
  1532. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1533. .cra_blocksize = MD5_HMAC_BLOCK_SIZE,
  1534. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1535. .cra_init = safexcel_ahash_cra_init,
  1536. .cra_exit = safexcel_ahash_cra_exit,
  1537. .cra_module = THIS_MODULE,
  1538. },
  1539. },
  1540. },
  1541. };
  1542. static int safexcel_hmac_md5_init(struct ahash_request *areq)
  1543. {
  1544. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1545. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  1546. memset(req, 0, sizeof(*req));
  1547. /* Start from ipad precompute */
  1548. memcpy(req->state, &ctx->base.ipad, MD5_DIGEST_SIZE);
  1549. /* Already processed the key^ipad part now! */
  1550. req->len = MD5_HMAC_BLOCK_SIZE;
  1551. req->processed = MD5_HMAC_BLOCK_SIZE;
  1552. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_MD5;
  1553. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  1554. req->state_sz = MD5_DIGEST_SIZE;
  1555. req->digest_sz = MD5_DIGEST_SIZE;
  1556. req->block_sz = MD5_HMAC_BLOCK_SIZE;
  1557. req->len_is_le = true; /* MD5 is little endian! ... */
  1558. req->hmac = true;
  1559. return 0;
  1560. }
  1561. static int safexcel_hmac_md5_setkey(struct crypto_ahash *tfm, const u8 *key,
  1562. unsigned int keylen)
  1563. {
  1564. return safexcel_hmac_alg_setkey(tfm, key, keylen, "safexcel-md5",
  1565. MD5_DIGEST_SIZE);
  1566. }
  1567. static int safexcel_hmac_md5_digest(struct ahash_request *areq)
  1568. {
  1569. int ret = safexcel_hmac_md5_init(areq);
  1570. if (ret)
  1571. return ret;
  1572. return safexcel_ahash_finup(areq);
  1573. }
  1574. struct safexcel_alg_template safexcel_alg_hmac_md5 = {
  1575. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1576. .algo_mask = SAFEXCEL_ALG_MD5,
  1577. .alg.ahash = {
  1578. .init = safexcel_hmac_md5_init,
  1579. .update = safexcel_ahash_update,
  1580. .final = safexcel_ahash_final,
  1581. .finup = safexcel_ahash_finup,
  1582. .digest = safexcel_hmac_md5_digest,
  1583. .setkey = safexcel_hmac_md5_setkey,
  1584. .export = safexcel_ahash_export,
  1585. .import = safexcel_ahash_import,
  1586. .halg = {
  1587. .digestsize = MD5_DIGEST_SIZE,
  1588. .statesize = sizeof(struct safexcel_ahash_export_state),
  1589. .base = {
  1590. .cra_name = "hmac(md5)",
  1591. .cra_driver_name = "safexcel-hmac-md5",
  1592. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1593. .cra_flags = CRYPTO_ALG_ASYNC |
  1594. CRYPTO_ALG_ALLOCATES_MEMORY |
  1595. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1596. .cra_blocksize = MD5_HMAC_BLOCK_SIZE,
  1597. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1598. .cra_init = safexcel_ahash_cra_init,
  1599. .cra_exit = safexcel_ahash_cra_exit,
  1600. .cra_module = THIS_MODULE,
  1601. },
  1602. },
  1603. },
  1604. };
  1605. static int safexcel_crc32_cra_init(struct crypto_tfm *tfm)
  1606. {
  1607. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm);
  1608. int ret = safexcel_ahash_cra_init(tfm);
  1609. /* Default 'key' is all zeroes */
  1610. memset(&ctx->base.ipad, 0, sizeof(u32));
  1611. return ret;
  1612. }
  1613. static int safexcel_crc32_init(struct ahash_request *areq)
  1614. {
  1615. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1616. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  1617. memset(req, 0, sizeof(*req));
  1618. /* Start from loaded key */
  1619. req->state[0] = cpu_to_le32(~ctx->base.ipad.word[0]);
  1620. /* Set processed to non-zero to enable invalidation detection */
  1621. req->len = sizeof(u32);
  1622. req->processed = sizeof(u32);
  1623. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_CRC32;
  1624. req->digest = CONTEXT_CONTROL_DIGEST_XCM;
  1625. req->state_sz = sizeof(u32);
  1626. req->digest_sz = sizeof(u32);
  1627. req->block_sz = sizeof(u32);
  1628. return 0;
  1629. }
  1630. static int safexcel_crc32_setkey(struct crypto_ahash *tfm, const u8 *key,
  1631. unsigned int keylen)
  1632. {
  1633. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(crypto_ahash_tfm(tfm));
  1634. if (keylen != sizeof(u32))
  1635. return -EINVAL;
  1636. memcpy(&ctx->base.ipad, key, sizeof(u32));
  1637. return 0;
  1638. }
  1639. static int safexcel_crc32_digest(struct ahash_request *areq)
  1640. {
  1641. return safexcel_crc32_init(areq) ?: safexcel_ahash_finup(areq);
  1642. }
  1643. struct safexcel_alg_template safexcel_alg_crc32 = {
  1644. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1645. .algo_mask = 0,
  1646. .alg.ahash = {
  1647. .init = safexcel_crc32_init,
  1648. .update = safexcel_ahash_update,
  1649. .final = safexcel_ahash_final,
  1650. .finup = safexcel_ahash_finup,
  1651. .digest = safexcel_crc32_digest,
  1652. .setkey = safexcel_crc32_setkey,
  1653. .export = safexcel_ahash_export,
  1654. .import = safexcel_ahash_import,
  1655. .halg = {
  1656. .digestsize = sizeof(u32),
  1657. .statesize = sizeof(struct safexcel_ahash_export_state),
  1658. .base = {
  1659. .cra_name = "crc32",
  1660. .cra_driver_name = "safexcel-crc32",
  1661. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1662. .cra_flags = CRYPTO_ALG_OPTIONAL_KEY |
  1663. CRYPTO_ALG_ASYNC |
  1664. CRYPTO_ALG_ALLOCATES_MEMORY |
  1665. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1666. .cra_blocksize = 1,
  1667. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1668. .cra_init = safexcel_crc32_cra_init,
  1669. .cra_exit = safexcel_ahash_cra_exit,
  1670. .cra_module = THIS_MODULE,
  1671. },
  1672. },
  1673. },
  1674. };
  1675. static int safexcel_cbcmac_init(struct ahash_request *areq)
  1676. {
  1677. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1678. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  1679. memset(req, 0, sizeof(*req));
  1680. /* Start from loaded keys */
  1681. memcpy(req->state, &ctx->base.ipad, ctx->key_sz);
  1682. /* Set processed to non-zero to enable invalidation detection */
  1683. req->len = AES_BLOCK_SIZE;
  1684. req->processed = AES_BLOCK_SIZE;
  1685. req->digest = CONTEXT_CONTROL_DIGEST_XCM;
  1686. req->state_sz = ctx->key_sz;
  1687. req->digest_sz = AES_BLOCK_SIZE;
  1688. req->block_sz = AES_BLOCK_SIZE;
  1689. req->xcbcmac = true;
  1690. return 0;
  1691. }
  1692. static int safexcel_cbcmac_setkey(struct crypto_ahash *tfm, const u8 *key,
  1693. unsigned int len)
  1694. {
  1695. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(crypto_ahash_tfm(tfm));
  1696. struct crypto_aes_ctx aes;
  1697. int ret, i;
  1698. ret = aes_expandkey(&aes, key, len);
  1699. if (ret)
  1700. return ret;
  1701. memset(&ctx->base.ipad, 0, 2 * AES_BLOCK_SIZE);
  1702. for (i = 0; i < len / sizeof(u32); i++)
  1703. ctx->base.ipad.be[i + 8] = cpu_to_be32(aes.key_enc[i]);
  1704. if (len == AES_KEYSIZE_192) {
  1705. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_XCBC192;
  1706. ctx->key_sz = AES_MAX_KEY_SIZE + 2 * AES_BLOCK_SIZE;
  1707. } else if (len == AES_KEYSIZE_256) {
  1708. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_XCBC256;
  1709. ctx->key_sz = AES_MAX_KEY_SIZE + 2 * AES_BLOCK_SIZE;
  1710. } else {
  1711. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_XCBC128;
  1712. ctx->key_sz = AES_MIN_KEY_SIZE + 2 * AES_BLOCK_SIZE;
  1713. }
  1714. ctx->cbcmac = true;
  1715. memzero_explicit(&aes, sizeof(aes));
  1716. return 0;
  1717. }
  1718. static int safexcel_cbcmac_digest(struct ahash_request *areq)
  1719. {
  1720. return safexcel_cbcmac_init(areq) ?: safexcel_ahash_finup(areq);
  1721. }
  1722. struct safexcel_alg_template safexcel_alg_cbcmac = {
  1723. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1724. .algo_mask = 0,
  1725. .alg.ahash = {
  1726. .init = safexcel_cbcmac_init,
  1727. .update = safexcel_ahash_update,
  1728. .final = safexcel_ahash_final,
  1729. .finup = safexcel_ahash_finup,
  1730. .digest = safexcel_cbcmac_digest,
  1731. .setkey = safexcel_cbcmac_setkey,
  1732. .export = safexcel_ahash_export,
  1733. .import = safexcel_ahash_import,
  1734. .halg = {
  1735. .digestsize = AES_BLOCK_SIZE,
  1736. .statesize = sizeof(struct safexcel_ahash_export_state),
  1737. .base = {
  1738. .cra_name = "cbcmac(aes)",
  1739. .cra_driver_name = "safexcel-cbcmac-aes",
  1740. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1741. .cra_flags = CRYPTO_ALG_ASYNC |
  1742. CRYPTO_ALG_ALLOCATES_MEMORY |
  1743. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1744. .cra_blocksize = 1,
  1745. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1746. .cra_init = safexcel_ahash_cra_init,
  1747. .cra_exit = safexcel_ahash_cra_exit,
  1748. .cra_module = THIS_MODULE,
  1749. },
  1750. },
  1751. },
  1752. };
  1753. static int safexcel_xcbcmac_setkey(struct crypto_ahash *tfm, const u8 *key,
  1754. unsigned int len)
  1755. {
  1756. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(crypto_ahash_tfm(tfm));
  1757. u32 key_tmp[3 * AES_BLOCK_SIZE / sizeof(u32)];
  1758. int ret, i;
  1759. ret = aes_expandkey(ctx->aes, key, len);
  1760. if (ret)
  1761. return ret;
  1762. /* precompute the XCBC key material */
  1763. aes_encrypt(ctx->aes, (u8 *)key_tmp + 2 * AES_BLOCK_SIZE,
  1764. "\x1\x1\x1\x1\x1\x1\x1\x1\x1\x1\x1\x1\x1\x1\x1\x1");
  1765. aes_encrypt(ctx->aes, (u8 *)key_tmp,
  1766. "\x2\x2\x2\x2\x2\x2\x2\x2\x2\x2\x2\x2\x2\x2\x2\x2");
  1767. aes_encrypt(ctx->aes, (u8 *)key_tmp + AES_BLOCK_SIZE,
  1768. "\x3\x3\x3\x3\x3\x3\x3\x3\x3\x3\x3\x3\x3\x3\x3\x3");
  1769. for (i = 0; i < 3 * AES_BLOCK_SIZE / sizeof(u32); i++)
  1770. ctx->base.ipad.word[i] = swab32(key_tmp[i]);
  1771. ret = aes_expandkey(ctx->aes,
  1772. (u8 *)key_tmp + 2 * AES_BLOCK_SIZE,
  1773. AES_MIN_KEY_SIZE);
  1774. if (ret)
  1775. return ret;
  1776. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_XCBC128;
  1777. ctx->key_sz = AES_MIN_KEY_SIZE + 2 * AES_BLOCK_SIZE;
  1778. ctx->cbcmac = false;
  1779. return 0;
  1780. }
  1781. static int safexcel_xcbcmac_cra_init(struct crypto_tfm *tfm)
  1782. {
  1783. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm);
  1784. safexcel_ahash_cra_init(tfm);
  1785. ctx->aes = kmalloc(sizeof(*ctx->aes), GFP_KERNEL);
  1786. return PTR_ERR_OR_ZERO(ctx->aes);
  1787. }
  1788. static void safexcel_xcbcmac_cra_exit(struct crypto_tfm *tfm)
  1789. {
  1790. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm);
  1791. kfree(ctx->aes);
  1792. safexcel_ahash_cra_exit(tfm);
  1793. }
  1794. struct safexcel_alg_template safexcel_alg_xcbcmac = {
  1795. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1796. .algo_mask = 0,
  1797. .alg.ahash = {
  1798. .init = safexcel_cbcmac_init,
  1799. .update = safexcel_ahash_update,
  1800. .final = safexcel_ahash_final,
  1801. .finup = safexcel_ahash_finup,
  1802. .digest = safexcel_cbcmac_digest,
  1803. .setkey = safexcel_xcbcmac_setkey,
  1804. .export = safexcel_ahash_export,
  1805. .import = safexcel_ahash_import,
  1806. .halg = {
  1807. .digestsize = AES_BLOCK_SIZE,
  1808. .statesize = sizeof(struct safexcel_ahash_export_state),
  1809. .base = {
  1810. .cra_name = "xcbc(aes)",
  1811. .cra_driver_name = "safexcel-xcbc-aes",
  1812. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1813. .cra_flags = CRYPTO_ALG_ASYNC |
  1814. CRYPTO_ALG_ALLOCATES_MEMORY |
  1815. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1816. .cra_blocksize = AES_BLOCK_SIZE,
  1817. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1818. .cra_init = safexcel_xcbcmac_cra_init,
  1819. .cra_exit = safexcel_xcbcmac_cra_exit,
  1820. .cra_module = THIS_MODULE,
  1821. },
  1822. },
  1823. },
  1824. };
  1825. static int safexcel_cmac_setkey(struct crypto_ahash *tfm, const u8 *key,
  1826. unsigned int len)
  1827. {
  1828. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(crypto_ahash_tfm(tfm));
  1829. __be64 consts[4];
  1830. u64 _const[2];
  1831. u8 msb_mask, gfmask;
  1832. int ret, i;
  1833. /* precompute the CMAC key material */
  1834. ret = aes_expandkey(ctx->aes, key, len);
  1835. if (ret)
  1836. return ret;
  1837. for (i = 0; i < len / sizeof(u32); i++)
  1838. ctx->base.ipad.word[i + 8] = swab32(ctx->aes->key_enc[i]);
  1839. /* code below borrowed from crypto/cmac.c */
  1840. /* encrypt the zero block */
  1841. memset(consts, 0, AES_BLOCK_SIZE);
  1842. aes_encrypt(ctx->aes, (u8 *)consts, (u8 *)consts);
  1843. gfmask = 0x87;
  1844. _const[0] = be64_to_cpu(consts[1]);
  1845. _const[1] = be64_to_cpu(consts[0]);
  1846. /* gf(2^128) multiply zero-ciphertext with u and u^2 */
  1847. for (i = 0; i < 4; i += 2) {
  1848. msb_mask = ((s64)_const[1] >> 63) & gfmask;
  1849. _const[1] = (_const[1] << 1) | (_const[0] >> 63);
  1850. _const[0] = (_const[0] << 1) ^ msb_mask;
  1851. consts[i + 0] = cpu_to_be64(_const[1]);
  1852. consts[i + 1] = cpu_to_be64(_const[0]);
  1853. }
  1854. /* end of code borrowed from crypto/cmac.c */
  1855. for (i = 0; i < 2 * AES_BLOCK_SIZE / sizeof(u32); i++)
  1856. ctx->base.ipad.be[i] = cpu_to_be32(((u32 *)consts)[i]);
  1857. if (len == AES_KEYSIZE_192) {
  1858. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_XCBC192;
  1859. ctx->key_sz = AES_MAX_KEY_SIZE + 2 * AES_BLOCK_SIZE;
  1860. } else if (len == AES_KEYSIZE_256) {
  1861. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_XCBC256;
  1862. ctx->key_sz = AES_MAX_KEY_SIZE + 2 * AES_BLOCK_SIZE;
  1863. } else {
  1864. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_XCBC128;
  1865. ctx->key_sz = AES_MIN_KEY_SIZE + 2 * AES_BLOCK_SIZE;
  1866. }
  1867. ctx->cbcmac = false;
  1868. return 0;
  1869. }
  1870. struct safexcel_alg_template safexcel_alg_cmac = {
  1871. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1872. .algo_mask = 0,
  1873. .alg.ahash = {
  1874. .init = safexcel_cbcmac_init,
  1875. .update = safexcel_ahash_update,
  1876. .final = safexcel_ahash_final,
  1877. .finup = safexcel_ahash_finup,
  1878. .digest = safexcel_cbcmac_digest,
  1879. .setkey = safexcel_cmac_setkey,
  1880. .export = safexcel_ahash_export,
  1881. .import = safexcel_ahash_import,
  1882. .halg = {
  1883. .digestsize = AES_BLOCK_SIZE,
  1884. .statesize = sizeof(struct safexcel_ahash_export_state),
  1885. .base = {
  1886. .cra_name = "cmac(aes)",
  1887. .cra_driver_name = "safexcel-cmac-aes",
  1888. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1889. .cra_flags = CRYPTO_ALG_ASYNC |
  1890. CRYPTO_ALG_ALLOCATES_MEMORY |
  1891. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1892. .cra_blocksize = AES_BLOCK_SIZE,
  1893. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1894. .cra_init = safexcel_xcbcmac_cra_init,
  1895. .cra_exit = safexcel_xcbcmac_cra_exit,
  1896. .cra_module = THIS_MODULE,
  1897. },
  1898. },
  1899. },
  1900. };
  1901. static int safexcel_sm3_init(struct ahash_request *areq)
  1902. {
  1903. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1904. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  1905. memset(req, 0, sizeof(*req));
  1906. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SM3;
  1907. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  1908. req->state_sz = SM3_DIGEST_SIZE;
  1909. req->digest_sz = SM3_DIGEST_SIZE;
  1910. req->block_sz = SM3_BLOCK_SIZE;
  1911. return 0;
  1912. }
  1913. static int safexcel_sm3_digest(struct ahash_request *areq)
  1914. {
  1915. int ret = safexcel_sm3_init(areq);
  1916. if (ret)
  1917. return ret;
  1918. return safexcel_ahash_finup(areq);
  1919. }
  1920. struct safexcel_alg_template safexcel_alg_sm3 = {
  1921. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1922. .algo_mask = SAFEXCEL_ALG_SM3,
  1923. .alg.ahash = {
  1924. .init = safexcel_sm3_init,
  1925. .update = safexcel_ahash_update,
  1926. .final = safexcel_ahash_final,
  1927. .finup = safexcel_ahash_finup,
  1928. .digest = safexcel_sm3_digest,
  1929. .export = safexcel_ahash_export,
  1930. .import = safexcel_ahash_import,
  1931. .halg = {
  1932. .digestsize = SM3_DIGEST_SIZE,
  1933. .statesize = sizeof(struct safexcel_ahash_export_state),
  1934. .base = {
  1935. .cra_name = "sm3",
  1936. .cra_driver_name = "safexcel-sm3",
  1937. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1938. .cra_flags = CRYPTO_ALG_ASYNC |
  1939. CRYPTO_ALG_ALLOCATES_MEMORY |
  1940. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1941. .cra_blocksize = SM3_BLOCK_SIZE,
  1942. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1943. .cra_init = safexcel_ahash_cra_init,
  1944. .cra_exit = safexcel_ahash_cra_exit,
  1945. .cra_module = THIS_MODULE,
  1946. },
  1947. },
  1948. },
  1949. };
  1950. static int safexcel_hmac_sm3_setkey(struct crypto_ahash *tfm, const u8 *key,
  1951. unsigned int keylen)
  1952. {
  1953. return safexcel_hmac_alg_setkey(tfm, key, keylen, "safexcel-sm3",
  1954. SM3_DIGEST_SIZE);
  1955. }
  1956. static int safexcel_hmac_sm3_init(struct ahash_request *areq)
  1957. {
  1958. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1959. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  1960. memset(req, 0, sizeof(*req));
  1961. /* Start from ipad precompute */
  1962. memcpy(req->state, &ctx->base.ipad, SM3_DIGEST_SIZE);
  1963. /* Already processed the key^ipad part now! */
  1964. req->len = SM3_BLOCK_SIZE;
  1965. req->processed = SM3_BLOCK_SIZE;
  1966. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SM3;
  1967. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  1968. req->state_sz = SM3_DIGEST_SIZE;
  1969. req->digest_sz = SM3_DIGEST_SIZE;
  1970. req->block_sz = SM3_BLOCK_SIZE;
  1971. req->hmac = true;
  1972. return 0;
  1973. }
  1974. static int safexcel_hmac_sm3_digest(struct ahash_request *areq)
  1975. {
  1976. int ret = safexcel_hmac_sm3_init(areq);
  1977. if (ret)
  1978. return ret;
  1979. return safexcel_ahash_finup(areq);
  1980. }
  1981. struct safexcel_alg_template safexcel_alg_hmac_sm3 = {
  1982. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1983. .algo_mask = SAFEXCEL_ALG_SM3,
  1984. .alg.ahash = {
  1985. .init = safexcel_hmac_sm3_init,
  1986. .update = safexcel_ahash_update,
  1987. .final = safexcel_ahash_final,
  1988. .finup = safexcel_ahash_finup,
  1989. .digest = safexcel_hmac_sm3_digest,
  1990. .setkey = safexcel_hmac_sm3_setkey,
  1991. .export = safexcel_ahash_export,
  1992. .import = safexcel_ahash_import,
  1993. .halg = {
  1994. .digestsize = SM3_DIGEST_SIZE,
  1995. .statesize = sizeof(struct safexcel_ahash_export_state),
  1996. .base = {
  1997. .cra_name = "hmac(sm3)",
  1998. .cra_driver_name = "safexcel-hmac-sm3",
  1999. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  2000. .cra_flags = CRYPTO_ALG_ASYNC |
  2001. CRYPTO_ALG_ALLOCATES_MEMORY |
  2002. CRYPTO_ALG_KERN_DRIVER_ONLY,
  2003. .cra_blocksize = SM3_BLOCK_SIZE,
  2004. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  2005. .cra_init = safexcel_ahash_cra_init,
  2006. .cra_exit = safexcel_ahash_cra_exit,
  2007. .cra_module = THIS_MODULE,
  2008. },
  2009. },
  2010. },
  2011. };
  2012. static int safexcel_sha3_224_init(struct ahash_request *areq)
  2013. {
  2014. struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
  2015. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2016. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  2017. memset(req, 0, sizeof(*req));
  2018. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA3_224;
  2019. req->digest = CONTEXT_CONTROL_DIGEST_INITIAL;
  2020. req->state_sz = SHA3_224_DIGEST_SIZE;
  2021. req->digest_sz = SHA3_224_DIGEST_SIZE;
  2022. req->block_sz = SHA3_224_BLOCK_SIZE;
  2023. ctx->do_fallback = false;
  2024. ctx->fb_init_done = false;
  2025. return 0;
  2026. }
  2027. static int safexcel_sha3_fbcheck(struct ahash_request *req)
  2028. {
  2029. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  2030. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2031. struct ahash_request *subreq = ahash_request_ctx(req);
  2032. int ret = 0;
  2033. if (ctx->do_fallback) {
  2034. ahash_request_set_tfm(subreq, ctx->fback);
  2035. ahash_request_set_callback(subreq, req->base.flags,
  2036. req->base.complete, req->base.data);
  2037. ahash_request_set_crypt(subreq, req->src, req->result,
  2038. req->nbytes);
  2039. if (!ctx->fb_init_done) {
  2040. if (ctx->fb_do_setkey) {
  2041. /* Set fallback cipher HMAC key */
  2042. u8 key[SHA3_224_BLOCK_SIZE];
  2043. memcpy(key, &ctx->base.ipad,
  2044. crypto_ahash_blocksize(ctx->fback) / 2);
  2045. memcpy(key +
  2046. crypto_ahash_blocksize(ctx->fback) / 2,
  2047. &ctx->base.opad,
  2048. crypto_ahash_blocksize(ctx->fback) / 2);
  2049. ret = crypto_ahash_setkey(ctx->fback, key,
  2050. crypto_ahash_blocksize(ctx->fback));
  2051. memzero_explicit(key,
  2052. crypto_ahash_blocksize(ctx->fback));
  2053. ctx->fb_do_setkey = false;
  2054. }
  2055. ret = ret ?: crypto_ahash_init(subreq);
  2056. ctx->fb_init_done = true;
  2057. }
  2058. }
  2059. return ret;
  2060. }
  2061. static int safexcel_sha3_update(struct ahash_request *req)
  2062. {
  2063. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  2064. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2065. struct ahash_request *subreq = ahash_request_ctx(req);
  2066. ctx->do_fallback = true;
  2067. return safexcel_sha3_fbcheck(req) ?: crypto_ahash_update(subreq);
  2068. }
  2069. static int safexcel_sha3_final(struct ahash_request *req)
  2070. {
  2071. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  2072. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2073. struct ahash_request *subreq = ahash_request_ctx(req);
  2074. ctx->do_fallback = true;
  2075. return safexcel_sha3_fbcheck(req) ?: crypto_ahash_final(subreq);
  2076. }
  2077. static int safexcel_sha3_finup(struct ahash_request *req)
  2078. {
  2079. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  2080. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2081. struct ahash_request *subreq = ahash_request_ctx(req);
  2082. ctx->do_fallback |= !req->nbytes;
  2083. if (ctx->do_fallback)
  2084. /* Update or ex/import happened or len 0, cannot use the HW */
  2085. return safexcel_sha3_fbcheck(req) ?:
  2086. crypto_ahash_finup(subreq);
  2087. else
  2088. return safexcel_ahash_finup(req);
  2089. }
  2090. static int safexcel_sha3_digest_fallback(struct ahash_request *req)
  2091. {
  2092. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  2093. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2094. struct ahash_request *subreq = ahash_request_ctx(req);
  2095. ctx->do_fallback = true;
  2096. ctx->fb_init_done = false;
  2097. return safexcel_sha3_fbcheck(req) ?: crypto_ahash_finup(subreq);
  2098. }
  2099. static int safexcel_sha3_224_digest(struct ahash_request *req)
  2100. {
  2101. if (req->nbytes)
  2102. return safexcel_sha3_224_init(req) ?: safexcel_ahash_finup(req);
  2103. /* HW cannot do zero length hash, use fallback instead */
  2104. return safexcel_sha3_digest_fallback(req);
  2105. }
  2106. static int safexcel_sha3_export(struct ahash_request *req, void *out)
  2107. {
  2108. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  2109. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2110. struct ahash_request *subreq = ahash_request_ctx(req);
  2111. ctx->do_fallback = true;
  2112. return safexcel_sha3_fbcheck(req) ?: crypto_ahash_export(subreq, out);
  2113. }
  2114. static int safexcel_sha3_import(struct ahash_request *req, const void *in)
  2115. {
  2116. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  2117. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2118. struct ahash_request *subreq = ahash_request_ctx(req);
  2119. ctx->do_fallback = true;
  2120. return safexcel_sha3_fbcheck(req) ?: crypto_ahash_import(subreq, in);
  2121. // return safexcel_ahash_import(req, in);
  2122. }
  2123. static int safexcel_sha3_cra_init(struct crypto_tfm *tfm)
  2124. {
  2125. struct crypto_ahash *ahash = __crypto_ahash_cast(tfm);
  2126. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm);
  2127. safexcel_ahash_cra_init(tfm);
  2128. /* Allocate fallback implementation */
  2129. ctx->fback = crypto_alloc_ahash(crypto_tfm_alg_name(tfm), 0,
  2130. CRYPTO_ALG_ASYNC |
  2131. CRYPTO_ALG_NEED_FALLBACK);
  2132. if (IS_ERR(ctx->fback))
  2133. return PTR_ERR(ctx->fback);
  2134. /* Update statesize from fallback algorithm! */
  2135. crypto_hash_alg_common(ahash)->statesize =
  2136. crypto_ahash_statesize(ctx->fback);
  2137. crypto_ahash_set_reqsize(ahash, max(sizeof(struct safexcel_ahash_req),
  2138. sizeof(struct ahash_request) +
  2139. crypto_ahash_reqsize(ctx->fback)));
  2140. return 0;
  2141. }
  2142. static void safexcel_sha3_cra_exit(struct crypto_tfm *tfm)
  2143. {
  2144. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm);
  2145. crypto_free_ahash(ctx->fback);
  2146. safexcel_ahash_cra_exit(tfm);
  2147. }
  2148. struct safexcel_alg_template safexcel_alg_sha3_224 = {
  2149. .type = SAFEXCEL_ALG_TYPE_AHASH,
  2150. .algo_mask = SAFEXCEL_ALG_SHA3,
  2151. .alg.ahash = {
  2152. .init = safexcel_sha3_224_init,
  2153. .update = safexcel_sha3_update,
  2154. .final = safexcel_sha3_final,
  2155. .finup = safexcel_sha3_finup,
  2156. .digest = safexcel_sha3_224_digest,
  2157. .export = safexcel_sha3_export,
  2158. .import = safexcel_sha3_import,
  2159. .halg = {
  2160. .digestsize = SHA3_224_DIGEST_SIZE,
  2161. .statesize = sizeof(struct safexcel_ahash_export_state),
  2162. .base = {
  2163. .cra_name = "sha3-224",
  2164. .cra_driver_name = "safexcel-sha3-224",
  2165. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  2166. .cra_flags = CRYPTO_ALG_ASYNC |
  2167. CRYPTO_ALG_KERN_DRIVER_ONLY |
  2168. CRYPTO_ALG_NEED_FALLBACK,
  2169. .cra_blocksize = SHA3_224_BLOCK_SIZE,
  2170. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  2171. .cra_init = safexcel_sha3_cra_init,
  2172. .cra_exit = safexcel_sha3_cra_exit,
  2173. .cra_module = THIS_MODULE,
  2174. },
  2175. },
  2176. },
  2177. };
  2178. static int safexcel_sha3_256_init(struct ahash_request *areq)
  2179. {
  2180. struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
  2181. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2182. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  2183. memset(req, 0, sizeof(*req));
  2184. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA3_256;
  2185. req->digest = CONTEXT_CONTROL_DIGEST_INITIAL;
  2186. req->state_sz = SHA3_256_DIGEST_SIZE;
  2187. req->digest_sz = SHA3_256_DIGEST_SIZE;
  2188. req->block_sz = SHA3_256_BLOCK_SIZE;
  2189. ctx->do_fallback = false;
  2190. ctx->fb_init_done = false;
  2191. return 0;
  2192. }
  2193. static int safexcel_sha3_256_digest(struct ahash_request *req)
  2194. {
  2195. if (req->nbytes)
  2196. return safexcel_sha3_256_init(req) ?: safexcel_ahash_finup(req);
  2197. /* HW cannot do zero length hash, use fallback instead */
  2198. return safexcel_sha3_digest_fallback(req);
  2199. }
  2200. struct safexcel_alg_template safexcel_alg_sha3_256 = {
  2201. .type = SAFEXCEL_ALG_TYPE_AHASH,
  2202. .algo_mask = SAFEXCEL_ALG_SHA3,
  2203. .alg.ahash = {
  2204. .init = safexcel_sha3_256_init,
  2205. .update = safexcel_sha3_update,
  2206. .final = safexcel_sha3_final,
  2207. .finup = safexcel_sha3_finup,
  2208. .digest = safexcel_sha3_256_digest,
  2209. .export = safexcel_sha3_export,
  2210. .import = safexcel_sha3_import,
  2211. .halg = {
  2212. .digestsize = SHA3_256_DIGEST_SIZE,
  2213. .statesize = sizeof(struct safexcel_ahash_export_state),
  2214. .base = {
  2215. .cra_name = "sha3-256",
  2216. .cra_driver_name = "safexcel-sha3-256",
  2217. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  2218. .cra_flags = CRYPTO_ALG_ASYNC |
  2219. CRYPTO_ALG_KERN_DRIVER_ONLY |
  2220. CRYPTO_ALG_NEED_FALLBACK,
  2221. .cra_blocksize = SHA3_256_BLOCK_SIZE,
  2222. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  2223. .cra_init = safexcel_sha3_cra_init,
  2224. .cra_exit = safexcel_sha3_cra_exit,
  2225. .cra_module = THIS_MODULE,
  2226. },
  2227. },
  2228. },
  2229. };
  2230. static int safexcel_sha3_384_init(struct ahash_request *areq)
  2231. {
  2232. struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
  2233. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2234. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  2235. memset(req, 0, sizeof(*req));
  2236. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA3_384;
  2237. req->digest = CONTEXT_CONTROL_DIGEST_INITIAL;
  2238. req->state_sz = SHA3_384_DIGEST_SIZE;
  2239. req->digest_sz = SHA3_384_DIGEST_SIZE;
  2240. req->block_sz = SHA3_384_BLOCK_SIZE;
  2241. ctx->do_fallback = false;
  2242. ctx->fb_init_done = false;
  2243. return 0;
  2244. }
  2245. static int safexcel_sha3_384_digest(struct ahash_request *req)
  2246. {
  2247. if (req->nbytes)
  2248. return safexcel_sha3_384_init(req) ?: safexcel_ahash_finup(req);
  2249. /* HW cannot do zero length hash, use fallback instead */
  2250. return safexcel_sha3_digest_fallback(req);
  2251. }
  2252. struct safexcel_alg_template safexcel_alg_sha3_384 = {
  2253. .type = SAFEXCEL_ALG_TYPE_AHASH,
  2254. .algo_mask = SAFEXCEL_ALG_SHA3,
  2255. .alg.ahash = {
  2256. .init = safexcel_sha3_384_init,
  2257. .update = safexcel_sha3_update,
  2258. .final = safexcel_sha3_final,
  2259. .finup = safexcel_sha3_finup,
  2260. .digest = safexcel_sha3_384_digest,
  2261. .export = safexcel_sha3_export,
  2262. .import = safexcel_sha3_import,
  2263. .halg = {
  2264. .digestsize = SHA3_384_DIGEST_SIZE,
  2265. .statesize = sizeof(struct safexcel_ahash_export_state),
  2266. .base = {
  2267. .cra_name = "sha3-384",
  2268. .cra_driver_name = "safexcel-sha3-384",
  2269. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  2270. .cra_flags = CRYPTO_ALG_ASYNC |
  2271. CRYPTO_ALG_KERN_DRIVER_ONLY |
  2272. CRYPTO_ALG_NEED_FALLBACK,
  2273. .cra_blocksize = SHA3_384_BLOCK_SIZE,
  2274. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  2275. .cra_init = safexcel_sha3_cra_init,
  2276. .cra_exit = safexcel_sha3_cra_exit,
  2277. .cra_module = THIS_MODULE,
  2278. },
  2279. },
  2280. },
  2281. };
  2282. static int safexcel_sha3_512_init(struct ahash_request *areq)
  2283. {
  2284. struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
  2285. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2286. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  2287. memset(req, 0, sizeof(*req));
  2288. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA3_512;
  2289. req->digest = CONTEXT_CONTROL_DIGEST_INITIAL;
  2290. req->state_sz = SHA3_512_DIGEST_SIZE;
  2291. req->digest_sz = SHA3_512_DIGEST_SIZE;
  2292. req->block_sz = SHA3_512_BLOCK_SIZE;
  2293. ctx->do_fallback = false;
  2294. ctx->fb_init_done = false;
  2295. return 0;
  2296. }
  2297. static int safexcel_sha3_512_digest(struct ahash_request *req)
  2298. {
  2299. if (req->nbytes)
  2300. return safexcel_sha3_512_init(req) ?: safexcel_ahash_finup(req);
  2301. /* HW cannot do zero length hash, use fallback instead */
  2302. return safexcel_sha3_digest_fallback(req);
  2303. }
  2304. struct safexcel_alg_template safexcel_alg_sha3_512 = {
  2305. .type = SAFEXCEL_ALG_TYPE_AHASH,
  2306. .algo_mask = SAFEXCEL_ALG_SHA3,
  2307. .alg.ahash = {
  2308. .init = safexcel_sha3_512_init,
  2309. .update = safexcel_sha3_update,
  2310. .final = safexcel_sha3_final,
  2311. .finup = safexcel_sha3_finup,
  2312. .digest = safexcel_sha3_512_digest,
  2313. .export = safexcel_sha3_export,
  2314. .import = safexcel_sha3_import,
  2315. .halg = {
  2316. .digestsize = SHA3_512_DIGEST_SIZE,
  2317. .statesize = sizeof(struct safexcel_ahash_export_state),
  2318. .base = {
  2319. .cra_name = "sha3-512",
  2320. .cra_driver_name = "safexcel-sha3-512",
  2321. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  2322. .cra_flags = CRYPTO_ALG_ASYNC |
  2323. CRYPTO_ALG_KERN_DRIVER_ONLY |
  2324. CRYPTO_ALG_NEED_FALLBACK,
  2325. .cra_blocksize = SHA3_512_BLOCK_SIZE,
  2326. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  2327. .cra_init = safexcel_sha3_cra_init,
  2328. .cra_exit = safexcel_sha3_cra_exit,
  2329. .cra_module = THIS_MODULE,
  2330. },
  2331. },
  2332. },
  2333. };
  2334. static int safexcel_hmac_sha3_cra_init(struct crypto_tfm *tfm, const char *alg)
  2335. {
  2336. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm);
  2337. int ret;
  2338. ret = safexcel_sha3_cra_init(tfm);
  2339. if (ret)
  2340. return ret;
  2341. /* Allocate precalc basic digest implementation */
  2342. ctx->shpre = crypto_alloc_shash(alg, 0, CRYPTO_ALG_NEED_FALLBACK);
  2343. if (IS_ERR(ctx->shpre))
  2344. return PTR_ERR(ctx->shpre);
  2345. ctx->shdesc = kmalloc(sizeof(*ctx->shdesc) +
  2346. crypto_shash_descsize(ctx->shpre), GFP_KERNEL);
  2347. if (!ctx->shdesc) {
  2348. crypto_free_shash(ctx->shpre);
  2349. return -ENOMEM;
  2350. }
  2351. ctx->shdesc->tfm = ctx->shpre;
  2352. return 0;
  2353. }
  2354. static void safexcel_hmac_sha3_cra_exit(struct crypto_tfm *tfm)
  2355. {
  2356. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm);
  2357. crypto_free_ahash(ctx->fback);
  2358. crypto_free_shash(ctx->shpre);
  2359. kfree(ctx->shdesc);
  2360. safexcel_ahash_cra_exit(tfm);
  2361. }
  2362. static int safexcel_hmac_sha3_setkey(struct crypto_ahash *tfm, const u8 *key,
  2363. unsigned int keylen)
  2364. {
  2365. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2366. int ret = 0;
  2367. if (keylen > crypto_ahash_blocksize(tfm)) {
  2368. /*
  2369. * If the key is larger than the blocksize, then hash it
  2370. * first using our fallback cipher
  2371. */
  2372. ret = crypto_shash_digest(ctx->shdesc, key, keylen,
  2373. ctx->base.ipad.byte);
  2374. keylen = crypto_shash_digestsize(ctx->shpre);
  2375. /*
  2376. * If the digest is larger than half the blocksize, we need to
  2377. * move the rest to opad due to the way our HMAC infra works.
  2378. */
  2379. if (keylen > crypto_ahash_blocksize(tfm) / 2)
  2380. /* Buffers overlap, need to use memmove iso memcpy! */
  2381. memmove(&ctx->base.opad,
  2382. ctx->base.ipad.byte +
  2383. crypto_ahash_blocksize(tfm) / 2,
  2384. keylen - crypto_ahash_blocksize(tfm) / 2);
  2385. } else {
  2386. /*
  2387. * Copy the key to our ipad & opad buffers
  2388. * Note that ipad and opad each contain one half of the key,
  2389. * to match the existing HMAC driver infrastructure.
  2390. */
  2391. if (keylen <= crypto_ahash_blocksize(tfm) / 2) {
  2392. memcpy(&ctx->base.ipad, key, keylen);
  2393. } else {
  2394. memcpy(&ctx->base.ipad, key,
  2395. crypto_ahash_blocksize(tfm) / 2);
  2396. memcpy(&ctx->base.opad,
  2397. key + crypto_ahash_blocksize(tfm) / 2,
  2398. keylen - crypto_ahash_blocksize(tfm) / 2);
  2399. }
  2400. }
  2401. /* Pad key with zeroes */
  2402. if (keylen <= crypto_ahash_blocksize(tfm) / 2) {
  2403. memset(ctx->base.ipad.byte + keylen, 0,
  2404. crypto_ahash_blocksize(tfm) / 2 - keylen);
  2405. memset(&ctx->base.opad, 0, crypto_ahash_blocksize(tfm) / 2);
  2406. } else {
  2407. memset(ctx->base.opad.byte + keylen -
  2408. crypto_ahash_blocksize(tfm) / 2, 0,
  2409. crypto_ahash_blocksize(tfm) - keylen);
  2410. }
  2411. /* If doing fallback, still need to set the new key! */
  2412. ctx->fb_do_setkey = true;
  2413. return ret;
  2414. }
  2415. static int safexcel_hmac_sha3_224_init(struct ahash_request *areq)
  2416. {
  2417. struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
  2418. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2419. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  2420. memset(req, 0, sizeof(*req));
  2421. /* Copy (half of) the key */
  2422. memcpy(req->state, &ctx->base.ipad, SHA3_224_BLOCK_SIZE / 2);
  2423. /* Start of HMAC should have len == processed == blocksize */
  2424. req->len = SHA3_224_BLOCK_SIZE;
  2425. req->processed = SHA3_224_BLOCK_SIZE;
  2426. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA3_224;
  2427. req->digest = CONTEXT_CONTROL_DIGEST_HMAC;
  2428. req->state_sz = SHA3_224_BLOCK_SIZE / 2;
  2429. req->digest_sz = SHA3_224_DIGEST_SIZE;
  2430. req->block_sz = SHA3_224_BLOCK_SIZE;
  2431. req->hmac = true;
  2432. ctx->do_fallback = false;
  2433. ctx->fb_init_done = false;
  2434. return 0;
  2435. }
  2436. static int safexcel_hmac_sha3_224_digest(struct ahash_request *req)
  2437. {
  2438. if (req->nbytes)
  2439. return safexcel_hmac_sha3_224_init(req) ?:
  2440. safexcel_ahash_finup(req);
  2441. /* HW cannot do zero length HMAC, use fallback instead */
  2442. return safexcel_sha3_digest_fallback(req);
  2443. }
  2444. static int safexcel_hmac_sha3_224_cra_init(struct crypto_tfm *tfm)
  2445. {
  2446. return safexcel_hmac_sha3_cra_init(tfm, "sha3-224");
  2447. }
  2448. struct safexcel_alg_template safexcel_alg_hmac_sha3_224 = {
  2449. .type = SAFEXCEL_ALG_TYPE_AHASH,
  2450. .algo_mask = SAFEXCEL_ALG_SHA3,
  2451. .alg.ahash = {
  2452. .init = safexcel_hmac_sha3_224_init,
  2453. .update = safexcel_sha3_update,
  2454. .final = safexcel_sha3_final,
  2455. .finup = safexcel_sha3_finup,
  2456. .digest = safexcel_hmac_sha3_224_digest,
  2457. .setkey = safexcel_hmac_sha3_setkey,
  2458. .export = safexcel_sha3_export,
  2459. .import = safexcel_sha3_import,
  2460. .halg = {
  2461. .digestsize = SHA3_224_DIGEST_SIZE,
  2462. .statesize = sizeof(struct safexcel_ahash_export_state),
  2463. .base = {
  2464. .cra_name = "hmac(sha3-224)",
  2465. .cra_driver_name = "safexcel-hmac-sha3-224",
  2466. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  2467. .cra_flags = CRYPTO_ALG_ASYNC |
  2468. CRYPTO_ALG_KERN_DRIVER_ONLY |
  2469. CRYPTO_ALG_NEED_FALLBACK,
  2470. .cra_blocksize = SHA3_224_BLOCK_SIZE,
  2471. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  2472. .cra_init = safexcel_hmac_sha3_224_cra_init,
  2473. .cra_exit = safexcel_hmac_sha3_cra_exit,
  2474. .cra_module = THIS_MODULE,
  2475. },
  2476. },
  2477. },
  2478. };
  2479. static int safexcel_hmac_sha3_256_init(struct ahash_request *areq)
  2480. {
  2481. struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
  2482. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2483. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  2484. memset(req, 0, sizeof(*req));
  2485. /* Copy (half of) the key */
  2486. memcpy(req->state, &ctx->base.ipad, SHA3_256_BLOCK_SIZE / 2);
  2487. /* Start of HMAC should have len == processed == blocksize */
  2488. req->len = SHA3_256_BLOCK_SIZE;
  2489. req->processed = SHA3_256_BLOCK_SIZE;
  2490. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA3_256;
  2491. req->digest = CONTEXT_CONTROL_DIGEST_HMAC;
  2492. req->state_sz = SHA3_256_BLOCK_SIZE / 2;
  2493. req->digest_sz = SHA3_256_DIGEST_SIZE;
  2494. req->block_sz = SHA3_256_BLOCK_SIZE;
  2495. req->hmac = true;
  2496. ctx->do_fallback = false;
  2497. ctx->fb_init_done = false;
  2498. return 0;
  2499. }
  2500. static int safexcel_hmac_sha3_256_digest(struct ahash_request *req)
  2501. {
  2502. if (req->nbytes)
  2503. return safexcel_hmac_sha3_256_init(req) ?:
  2504. safexcel_ahash_finup(req);
  2505. /* HW cannot do zero length HMAC, use fallback instead */
  2506. return safexcel_sha3_digest_fallback(req);
  2507. }
  2508. static int safexcel_hmac_sha3_256_cra_init(struct crypto_tfm *tfm)
  2509. {
  2510. return safexcel_hmac_sha3_cra_init(tfm, "sha3-256");
  2511. }
  2512. struct safexcel_alg_template safexcel_alg_hmac_sha3_256 = {
  2513. .type = SAFEXCEL_ALG_TYPE_AHASH,
  2514. .algo_mask = SAFEXCEL_ALG_SHA3,
  2515. .alg.ahash = {
  2516. .init = safexcel_hmac_sha3_256_init,
  2517. .update = safexcel_sha3_update,
  2518. .final = safexcel_sha3_final,
  2519. .finup = safexcel_sha3_finup,
  2520. .digest = safexcel_hmac_sha3_256_digest,
  2521. .setkey = safexcel_hmac_sha3_setkey,
  2522. .export = safexcel_sha3_export,
  2523. .import = safexcel_sha3_import,
  2524. .halg = {
  2525. .digestsize = SHA3_256_DIGEST_SIZE,
  2526. .statesize = sizeof(struct safexcel_ahash_export_state),
  2527. .base = {
  2528. .cra_name = "hmac(sha3-256)",
  2529. .cra_driver_name = "safexcel-hmac-sha3-256",
  2530. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  2531. .cra_flags = CRYPTO_ALG_ASYNC |
  2532. CRYPTO_ALG_KERN_DRIVER_ONLY |
  2533. CRYPTO_ALG_NEED_FALLBACK,
  2534. .cra_blocksize = SHA3_256_BLOCK_SIZE,
  2535. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  2536. .cra_init = safexcel_hmac_sha3_256_cra_init,
  2537. .cra_exit = safexcel_hmac_sha3_cra_exit,
  2538. .cra_module = THIS_MODULE,
  2539. },
  2540. },
  2541. },
  2542. };
  2543. static int safexcel_hmac_sha3_384_init(struct ahash_request *areq)
  2544. {
  2545. struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
  2546. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2547. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  2548. memset(req, 0, sizeof(*req));
  2549. /* Copy (half of) the key */
  2550. memcpy(req->state, &ctx->base.ipad, SHA3_384_BLOCK_SIZE / 2);
  2551. /* Start of HMAC should have len == processed == blocksize */
  2552. req->len = SHA3_384_BLOCK_SIZE;
  2553. req->processed = SHA3_384_BLOCK_SIZE;
  2554. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA3_384;
  2555. req->digest = CONTEXT_CONTROL_DIGEST_HMAC;
  2556. req->state_sz = SHA3_384_BLOCK_SIZE / 2;
  2557. req->digest_sz = SHA3_384_DIGEST_SIZE;
  2558. req->block_sz = SHA3_384_BLOCK_SIZE;
  2559. req->hmac = true;
  2560. ctx->do_fallback = false;
  2561. ctx->fb_init_done = false;
  2562. return 0;
  2563. }
  2564. static int safexcel_hmac_sha3_384_digest(struct ahash_request *req)
  2565. {
  2566. if (req->nbytes)
  2567. return safexcel_hmac_sha3_384_init(req) ?:
  2568. safexcel_ahash_finup(req);
  2569. /* HW cannot do zero length HMAC, use fallback instead */
  2570. return safexcel_sha3_digest_fallback(req);
  2571. }
  2572. static int safexcel_hmac_sha3_384_cra_init(struct crypto_tfm *tfm)
  2573. {
  2574. return safexcel_hmac_sha3_cra_init(tfm, "sha3-384");
  2575. }
  2576. struct safexcel_alg_template safexcel_alg_hmac_sha3_384 = {
  2577. .type = SAFEXCEL_ALG_TYPE_AHASH,
  2578. .algo_mask = SAFEXCEL_ALG_SHA3,
  2579. .alg.ahash = {
  2580. .init = safexcel_hmac_sha3_384_init,
  2581. .update = safexcel_sha3_update,
  2582. .final = safexcel_sha3_final,
  2583. .finup = safexcel_sha3_finup,
  2584. .digest = safexcel_hmac_sha3_384_digest,
  2585. .setkey = safexcel_hmac_sha3_setkey,
  2586. .export = safexcel_sha3_export,
  2587. .import = safexcel_sha3_import,
  2588. .halg = {
  2589. .digestsize = SHA3_384_DIGEST_SIZE,
  2590. .statesize = sizeof(struct safexcel_ahash_export_state),
  2591. .base = {
  2592. .cra_name = "hmac(sha3-384)",
  2593. .cra_driver_name = "safexcel-hmac-sha3-384",
  2594. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  2595. .cra_flags = CRYPTO_ALG_ASYNC |
  2596. CRYPTO_ALG_KERN_DRIVER_ONLY |
  2597. CRYPTO_ALG_NEED_FALLBACK,
  2598. .cra_blocksize = SHA3_384_BLOCK_SIZE,
  2599. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  2600. .cra_init = safexcel_hmac_sha3_384_cra_init,
  2601. .cra_exit = safexcel_hmac_sha3_cra_exit,
  2602. .cra_module = THIS_MODULE,
  2603. },
  2604. },
  2605. },
  2606. };
  2607. static int safexcel_hmac_sha3_512_init(struct ahash_request *areq)
  2608. {
  2609. struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
  2610. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2611. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  2612. memset(req, 0, sizeof(*req));
  2613. /* Copy (half of) the key */
  2614. memcpy(req->state, &ctx->base.ipad, SHA3_512_BLOCK_SIZE / 2);
  2615. /* Start of HMAC should have len == processed == blocksize */
  2616. req->len = SHA3_512_BLOCK_SIZE;
  2617. req->processed = SHA3_512_BLOCK_SIZE;
  2618. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA3_512;
  2619. req->digest = CONTEXT_CONTROL_DIGEST_HMAC;
  2620. req->state_sz = SHA3_512_BLOCK_SIZE / 2;
  2621. req->digest_sz = SHA3_512_DIGEST_SIZE;
  2622. req->block_sz = SHA3_512_BLOCK_SIZE;
  2623. req->hmac = true;
  2624. ctx->do_fallback = false;
  2625. ctx->fb_init_done = false;
  2626. return 0;
  2627. }
  2628. static int safexcel_hmac_sha3_512_digest(struct ahash_request *req)
  2629. {
  2630. if (req->nbytes)
  2631. return safexcel_hmac_sha3_512_init(req) ?:
  2632. safexcel_ahash_finup(req);
  2633. /* HW cannot do zero length HMAC, use fallback instead */
  2634. return safexcel_sha3_digest_fallback(req);
  2635. }
  2636. static int safexcel_hmac_sha3_512_cra_init(struct crypto_tfm *tfm)
  2637. {
  2638. return safexcel_hmac_sha3_cra_init(tfm, "sha3-512");
  2639. }
  2640. struct safexcel_alg_template safexcel_alg_hmac_sha3_512 = {
  2641. .type = SAFEXCEL_ALG_TYPE_AHASH,
  2642. .algo_mask = SAFEXCEL_ALG_SHA3,
  2643. .alg.ahash = {
  2644. .init = safexcel_hmac_sha3_512_init,
  2645. .update = safexcel_sha3_update,
  2646. .final = safexcel_sha3_final,
  2647. .finup = safexcel_sha3_finup,
  2648. .digest = safexcel_hmac_sha3_512_digest,
  2649. .setkey = safexcel_hmac_sha3_setkey,
  2650. .export = safexcel_sha3_export,
  2651. .import = safexcel_sha3_import,
  2652. .halg = {
  2653. .digestsize = SHA3_512_DIGEST_SIZE,
  2654. .statesize = sizeof(struct safexcel_ahash_export_state),
  2655. .base = {
  2656. .cra_name = "hmac(sha3-512)",
  2657. .cra_driver_name = "safexcel-hmac-sha3-512",
  2658. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  2659. .cra_flags = CRYPTO_ALG_ASYNC |
  2660. CRYPTO_ALG_KERN_DRIVER_ONLY |
  2661. CRYPTO_ALG_NEED_FALLBACK,
  2662. .cra_blocksize = SHA3_512_BLOCK_SIZE,
  2663. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  2664. .cra_init = safexcel_hmac_sha3_512_cra_init,
  2665. .cra_exit = safexcel_hmac_sha3_cra_exit,
  2666. .cra_module = THIS_MODULE,
  2667. },
  2668. },
  2669. },
  2670. };