Kconfig 25 KB

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  1. # SPDX-License-Identifier: GPL-2.0-only
  2. menuconfig CRYPTO_HW
  3. bool "Hardware crypto devices"
  4. default y
  5. help
  6. Say Y here to get to see options for hardware crypto devices and
  7. processors. This option alone does not add any kernel code.
  8. If you say N, all options in this submenu will be skipped and disabled.
  9. if CRYPTO_HW
  10. source "drivers/crypto/allwinner/Kconfig"
  11. config CRYPTO_DEV_PADLOCK
  12. tristate "Support for VIA PadLock ACE"
  13. depends on X86 && !UML
  14. help
  15. Some VIA processors come with an integrated crypto engine
  16. (so called VIA PadLock ACE, Advanced Cryptography Engine)
  17. that provides instructions for very fast cryptographic
  18. operations with supported algorithms.
  19. The instructions are used only when the CPU supports them.
  20. Otherwise software encryption is used.
  21. config CRYPTO_DEV_PADLOCK_AES
  22. tristate "PadLock driver for AES algorithm"
  23. depends on CRYPTO_DEV_PADLOCK
  24. select CRYPTO_SKCIPHER
  25. select CRYPTO_LIB_AES
  26. help
  27. Use VIA PadLock for AES algorithm.
  28. Available in VIA C3 and newer CPUs.
  29. If unsure say M. The compiled module will be
  30. called padlock-aes.
  31. config CRYPTO_DEV_PADLOCK_SHA
  32. tristate "PadLock driver for SHA1 and SHA256 algorithms"
  33. depends on CRYPTO_DEV_PADLOCK
  34. select CRYPTO_HASH
  35. select CRYPTO_SHA1
  36. select CRYPTO_SHA256
  37. help
  38. Use VIA PadLock for SHA1/SHA256 algorithms.
  39. Available in VIA C7 and newer processors.
  40. If unsure say M. The compiled module will be
  41. called padlock-sha.
  42. config CRYPTO_DEV_GEODE
  43. tristate "Support for the Geode LX AES engine"
  44. depends on X86_32 && PCI
  45. select CRYPTO_ALGAPI
  46. select CRYPTO_SKCIPHER
  47. help
  48. Say 'Y' here to use the AMD Geode LX processor on-board AES
  49. engine for the CryptoAPI AES algorithm.
  50. To compile this driver as a module, choose M here: the module
  51. will be called geode-aes.
  52. config ZCRYPT
  53. tristate "Support for s390 cryptographic adapters"
  54. depends on S390
  55. select HW_RANDOM
  56. help
  57. Select this option if you want to enable support for
  58. s390 cryptographic adapters like:
  59. + Crypto Express 2 up to 7 Coprocessor (CEXxC)
  60. + Crypto Express 2 up to 7 Accelerator (CEXxA)
  61. + Crypto Express 4 up to 7 EP11 Coprocessor (CEXxP)
  62. config ZCRYPT_DEBUG
  63. bool "Enable debug features for s390 cryptographic adapters"
  64. default n
  65. depends on DEBUG_KERNEL
  66. depends on ZCRYPT
  67. help
  68. Say 'Y' here to enable some additional debug features on the
  69. s390 cryptographic adapters driver.
  70. There will be some more sysfs attributes displayed for ap cards
  71. and queues and some flags on crypto requests are interpreted as
  72. debugging messages to force error injection.
  73. Do not enable on production level kernel build.
  74. If unsure, say N.
  75. config ZCRYPT_MULTIDEVNODES
  76. bool "Support for multiple zcrypt device nodes"
  77. default y
  78. depends on S390
  79. depends on ZCRYPT
  80. help
  81. With this option enabled the zcrypt device driver can
  82. provide multiple devices nodes in /dev. Each device
  83. node can get customized to limit access and narrow
  84. down the use of the available crypto hardware.
  85. config PKEY
  86. tristate "Kernel API for protected key handling"
  87. depends on S390
  88. depends on ZCRYPT
  89. help
  90. With this option enabled the pkey kernel module provides an API
  91. for creation and handling of protected keys. Other parts of the
  92. kernel or userspace applications may use these functions.
  93. Select this option if you want to enable the kernel and userspace
  94. API for proteced key handling.
  95. Please note that creation of protected keys from secure keys
  96. requires to have at least one CEX card in coprocessor mode
  97. available at runtime.
  98. config CRYPTO_PAES_S390
  99. tristate "PAES cipher algorithms"
  100. depends on S390
  101. depends on ZCRYPT
  102. depends on PKEY
  103. select CRYPTO_ALGAPI
  104. select CRYPTO_SKCIPHER
  105. help
  106. This is the s390 hardware accelerated implementation of the
  107. AES cipher algorithms for use with protected key.
  108. Select this option if you want to use the paes cipher
  109. for example to use protected key encrypted devices.
  110. config S390_PRNG
  111. tristate "Pseudo random number generator device driver"
  112. depends on S390
  113. default "m"
  114. help
  115. Select this option if you want to use the s390 pseudo random number
  116. generator. The PRNG is part of the cryptographic processor functions
  117. and uses triple-DES to generate secure random numbers like the
  118. ANSI X9.17 standard. User-space programs access the
  119. pseudo-random-number device through the char device /dev/prandom.
  120. It is available as of z9.
  121. config CRYPTO_DEV_NIAGARA2
  122. tristate "Niagara2 Stream Processing Unit driver"
  123. select CRYPTO_LIB_DES
  124. select CRYPTO_SKCIPHER
  125. select CRYPTO_HASH
  126. select CRYPTO_MD5
  127. select CRYPTO_SHA1
  128. select CRYPTO_SHA256
  129. depends on SPARC64
  130. help
  131. Each core of a Niagara2 processor contains a Stream
  132. Processing Unit, which itself contains several cryptographic
  133. sub-units. One set provides the Modular Arithmetic Unit,
  134. used for SSL offload. The other set provides the Cipher
  135. Group, which can perform encryption, decryption, hashing,
  136. checksumming, and raw copies.
  137. config CRYPTO_DEV_SL3516
  138. tristate "Storlink SL3516 crypto offloader"
  139. depends on ARCH_GEMINI || COMPILE_TEST
  140. depends on HAS_IOMEM && PM
  141. select CRYPTO_SKCIPHER
  142. select CRYPTO_ENGINE
  143. select CRYPTO_ECB
  144. select CRYPTO_AES
  145. select HW_RANDOM
  146. help
  147. This option allows you to have support for SL3516 crypto offloader.
  148. config CRYPTO_DEV_SL3516_DEBUG
  149. bool "Enable SL3516 stats"
  150. depends on CRYPTO_DEV_SL3516
  151. depends on DEBUG_FS
  152. help
  153. Say y to enable SL3516 debug stats.
  154. This will create /sys/kernel/debug/sl3516/stats for displaying
  155. the number of requests per algorithm and other internal stats.
  156. config CRYPTO_DEV_HIFN_795X
  157. tristate "Driver HIFN 795x crypto accelerator chips"
  158. select CRYPTO_LIB_DES
  159. select CRYPTO_SKCIPHER
  160. select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
  161. depends on PCI
  162. depends on !ARCH_DMA_ADDR_T_64BIT
  163. help
  164. This option allows you to have support for HIFN 795x crypto adapters.
  165. config CRYPTO_DEV_HIFN_795X_RNG
  166. bool "HIFN 795x random number generator"
  167. depends on CRYPTO_DEV_HIFN_795X
  168. help
  169. Select this option if you want to enable the random number generator
  170. on the HIFN 795x crypto adapters.
  171. source "drivers/crypto/caam/Kconfig"
  172. config CRYPTO_DEV_TALITOS
  173. tristate "Talitos Freescale Security Engine (SEC)"
  174. select CRYPTO_AEAD
  175. select CRYPTO_AUTHENC
  176. select CRYPTO_SKCIPHER
  177. select CRYPTO_HASH
  178. select CRYPTO_LIB_DES
  179. select HW_RANDOM
  180. depends on FSL_SOC
  181. help
  182. Say 'Y' here to use the Freescale Security Engine (SEC)
  183. to offload cryptographic algorithm computation.
  184. The Freescale SEC is present on PowerQUICC 'E' processors, such
  185. as the MPC8349E and MPC8548E.
  186. To compile this driver as a module, choose M here: the module
  187. will be called talitos.
  188. config CRYPTO_DEV_TALITOS1
  189. bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
  190. depends on CRYPTO_DEV_TALITOS
  191. depends on PPC_8xx || PPC_82xx
  192. default y
  193. help
  194. Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
  195. found on MPC82xx or the Freescale Security Engine (SEC Lite)
  196. version 1.2 found on MPC8xx
  197. config CRYPTO_DEV_TALITOS2
  198. bool "SEC2+ (SEC version 2.0 or upper)"
  199. depends on CRYPTO_DEV_TALITOS
  200. default y if !PPC_8xx
  201. help
  202. Say 'Y' here to use the Freescale Security Engine (SEC)
  203. version 2 and following as found on MPC83xx, MPC85xx, etc ...
  204. config CRYPTO_DEV_IXP4XX
  205. tristate "Driver for IXP4xx crypto hardware acceleration"
  206. depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
  207. select CRYPTO_AES
  208. select CRYPTO_DES
  209. select CRYPTO_ECB
  210. select CRYPTO_CBC
  211. select CRYPTO_CTR
  212. select CRYPTO_LIB_DES
  213. select CRYPTO_AEAD
  214. select CRYPTO_AUTHENC
  215. select CRYPTO_SKCIPHER
  216. help
  217. Driver for the IXP4xx NPE crypto engine.
  218. config CRYPTO_DEV_PPC4XX
  219. tristate "Driver AMCC PPC4xx crypto accelerator"
  220. depends on PPC && 4xx
  221. select CRYPTO_HASH
  222. select CRYPTO_AEAD
  223. select CRYPTO_AES
  224. select CRYPTO_LIB_AES
  225. select CRYPTO_CCM
  226. select CRYPTO_CTR
  227. select CRYPTO_GCM
  228. select CRYPTO_SKCIPHER
  229. help
  230. This option allows you to have support for AMCC crypto acceleration.
  231. config HW_RANDOM_PPC4XX
  232. bool "PowerPC 4xx generic true random number generator support"
  233. depends on CRYPTO_DEV_PPC4XX && HW_RANDOM=y
  234. default y
  235. help
  236. This option provides the kernel-side support for the TRNG hardware
  237. found in the security function of some PowerPC 4xx SoCs.
  238. config CRYPTO_DEV_OMAP
  239. tristate "Support for OMAP crypto HW accelerators"
  240. depends on ARCH_OMAP2PLUS
  241. help
  242. OMAP processors have various crypto HW accelerators. Select this if
  243. you want to use the OMAP modules for any of the crypto algorithms.
  244. if CRYPTO_DEV_OMAP
  245. config CRYPTO_DEV_OMAP_SHAM
  246. tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
  247. depends on ARCH_OMAP2PLUS
  248. select CRYPTO_ENGINE
  249. select CRYPTO_SHA1
  250. select CRYPTO_MD5
  251. select CRYPTO_SHA256
  252. select CRYPTO_SHA512
  253. select CRYPTO_HMAC
  254. help
  255. OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
  256. want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
  257. config CRYPTO_DEV_OMAP_AES
  258. tristate "Support for OMAP AES hw engine"
  259. depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
  260. select CRYPTO_AES
  261. select CRYPTO_SKCIPHER
  262. select CRYPTO_ENGINE
  263. select CRYPTO_CBC
  264. select CRYPTO_ECB
  265. select CRYPTO_CTR
  266. select CRYPTO_AEAD
  267. help
  268. OMAP processors have AES module accelerator. Select this if you
  269. want to use the OMAP module for AES algorithms.
  270. config CRYPTO_DEV_OMAP_DES
  271. tristate "Support for OMAP DES/3DES hw engine"
  272. depends on ARCH_OMAP2PLUS
  273. select CRYPTO_LIB_DES
  274. select CRYPTO_SKCIPHER
  275. select CRYPTO_ENGINE
  276. help
  277. OMAP processors have DES/3DES module accelerator. Select this if you
  278. want to use the OMAP module for DES and 3DES algorithms. Currently
  279. the ECB and CBC modes of operation are supported by the driver. Also
  280. accesses made on unaligned boundaries are supported.
  281. endif # CRYPTO_DEV_OMAP
  282. config CRYPTO_DEV_SAHARA
  283. tristate "Support for SAHARA crypto accelerator"
  284. depends on ARCH_MXC && OF
  285. select CRYPTO_SKCIPHER
  286. select CRYPTO_AES
  287. select CRYPTO_ECB
  288. help
  289. This option enables support for the SAHARA HW crypto accelerator
  290. found in some Freescale i.MX chips.
  291. config CRYPTO_DEV_EXYNOS_RNG
  292. tristate "Exynos HW pseudo random number generator support"
  293. depends on ARCH_EXYNOS || COMPILE_TEST
  294. depends on HAS_IOMEM
  295. select CRYPTO_RNG
  296. help
  297. This driver provides kernel-side support through the
  298. cryptographic API for the pseudo random number generator hardware
  299. found on Exynos SoCs.
  300. To compile this driver as a module, choose M here: the
  301. module will be called exynos-rng.
  302. If unsure, say Y.
  303. config CRYPTO_DEV_S5P
  304. tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
  305. depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
  306. depends on HAS_IOMEM
  307. select CRYPTO_AES
  308. select CRYPTO_SKCIPHER
  309. help
  310. This option allows you to have support for S5P crypto acceleration.
  311. Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
  312. algorithms execution.
  313. config CRYPTO_DEV_EXYNOS_HASH
  314. bool "Support for Samsung Exynos HASH accelerator"
  315. depends on CRYPTO_DEV_S5P
  316. depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m
  317. select CRYPTO_SHA1
  318. select CRYPTO_MD5
  319. select CRYPTO_SHA256
  320. help
  321. Select this to offload Exynos from HASH MD5/SHA1/SHA256.
  322. This will select software SHA1, MD5 and SHA256 as they are
  323. needed for small and zero-size messages.
  324. HASH algorithms will be disabled if EXYNOS_RNG
  325. is enabled due to hw conflict.
  326. config CRYPTO_DEV_NX
  327. bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
  328. depends on PPC64
  329. help
  330. This enables support for the NX hardware cryptographic accelerator
  331. coprocessor that is in IBM PowerPC P7+ or later processors. This
  332. does not actually enable any drivers, it only allows you to select
  333. which acceleration type (encryption and/or compression) to enable.
  334. if CRYPTO_DEV_NX
  335. source "drivers/crypto/nx/Kconfig"
  336. endif
  337. config CRYPTO_DEV_UX500
  338. tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
  339. depends on ARCH_U8500
  340. help
  341. Driver for ST-Ericsson UX500 crypto engine.
  342. if CRYPTO_DEV_UX500
  343. source "drivers/crypto/ux500/Kconfig"
  344. endif # if CRYPTO_DEV_UX500
  345. config CRYPTO_DEV_ATMEL_AUTHENC
  346. bool "Support for Atmel IPSEC/SSL hw accelerator"
  347. depends on ARCH_AT91 || COMPILE_TEST
  348. depends on CRYPTO_DEV_ATMEL_AES
  349. help
  350. Some Atmel processors can combine the AES and SHA hw accelerators
  351. to enhance support of IPSEC/SSL.
  352. Select this if you want to use the Atmel modules for
  353. authenc(hmac(shaX),Y(cbc)) algorithms.
  354. config CRYPTO_DEV_ATMEL_AES
  355. tristate "Support for Atmel AES hw accelerator"
  356. depends on ARCH_AT91 || COMPILE_TEST
  357. select CRYPTO_AES
  358. select CRYPTO_AEAD
  359. select CRYPTO_SKCIPHER
  360. select CRYPTO_AUTHENC if CRYPTO_DEV_ATMEL_AUTHENC
  361. select CRYPTO_DEV_ATMEL_SHA if CRYPTO_DEV_ATMEL_AUTHENC
  362. help
  363. Some Atmel processors have AES hw accelerator.
  364. Select this if you want to use the Atmel module for
  365. AES algorithms.
  366. To compile this driver as a module, choose M here: the module
  367. will be called atmel-aes.
  368. config CRYPTO_DEV_ATMEL_TDES
  369. tristate "Support for Atmel DES/TDES hw accelerator"
  370. depends on ARCH_AT91 || COMPILE_TEST
  371. select CRYPTO_LIB_DES
  372. select CRYPTO_SKCIPHER
  373. help
  374. Some Atmel processors have DES/TDES hw accelerator.
  375. Select this if you want to use the Atmel module for
  376. DES/TDES algorithms.
  377. To compile this driver as a module, choose M here: the module
  378. will be called atmel-tdes.
  379. config CRYPTO_DEV_ATMEL_SHA
  380. tristate "Support for Atmel SHA hw accelerator"
  381. depends on ARCH_AT91 || COMPILE_TEST
  382. select CRYPTO_HASH
  383. help
  384. Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
  385. hw accelerator.
  386. Select this if you want to use the Atmel module for
  387. SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
  388. To compile this driver as a module, choose M here: the module
  389. will be called atmel-sha.
  390. config CRYPTO_DEV_ATMEL_I2C
  391. tristate
  392. select BITREVERSE
  393. config CRYPTO_DEV_ATMEL_ECC
  394. tristate "Support for Microchip / Atmel ECC hw accelerator"
  395. depends on I2C
  396. select CRYPTO_DEV_ATMEL_I2C
  397. select CRYPTO_ECDH
  398. select CRC16
  399. help
  400. Microhip / Atmel ECC hw accelerator.
  401. Select this if you want to use the Microchip / Atmel module for
  402. ECDH algorithm.
  403. To compile this driver as a module, choose M here: the module
  404. will be called atmel-ecc.
  405. config CRYPTO_DEV_ATMEL_SHA204A
  406. tristate "Support for Microchip / Atmel SHA accelerator and RNG"
  407. depends on I2C
  408. select CRYPTO_DEV_ATMEL_I2C
  409. select HW_RANDOM
  410. select CRC16
  411. help
  412. Microhip / Atmel SHA accelerator and RNG.
  413. Select this if you want to use the Microchip / Atmel SHA204A
  414. module as a random number generator. (Other functions of the
  415. chip are currently not exposed by this driver)
  416. To compile this driver as a module, choose M here: the module
  417. will be called atmel-sha204a.
  418. config CRYPTO_DEV_CCP
  419. bool "Support for AMD Secure Processor"
  420. depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
  421. help
  422. The AMD Secure Processor provides support for the Cryptographic Coprocessor
  423. (CCP) and the Platform Security Processor (PSP) devices.
  424. if CRYPTO_DEV_CCP
  425. source "drivers/crypto/ccp/Kconfig"
  426. endif
  427. config CRYPTO_DEV_MXS_DCP
  428. tristate "Support for Freescale MXS DCP"
  429. depends on (ARCH_MXS || ARCH_MXC)
  430. select STMP_DEVICE
  431. select CRYPTO_CBC
  432. select CRYPTO_ECB
  433. select CRYPTO_AES
  434. select CRYPTO_SKCIPHER
  435. select CRYPTO_HASH
  436. help
  437. The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
  438. co-processor on the die.
  439. To compile this driver as a module, choose M here: the module
  440. will be called mxs-dcp.
  441. source "drivers/crypto/qat/Kconfig"
  442. source "drivers/crypto/cavium/cpt/Kconfig"
  443. source "drivers/crypto/cavium/nitrox/Kconfig"
  444. source "drivers/crypto/marvell/Kconfig"
  445. config CRYPTO_DEV_CAVIUM_ZIP
  446. tristate "Cavium ZIP driver"
  447. depends on PCI && 64BIT && (ARM64 || COMPILE_TEST)
  448. help
  449. Select this option if you want to enable compression/decompression
  450. acceleration on Cavium's ARM based SoCs
  451. config CRYPTO_DEV_QCE
  452. tristate "Qualcomm crypto engine accelerator"
  453. depends on ARCH_QCOM || COMPILE_TEST
  454. depends on HAS_IOMEM
  455. help
  456. This driver supports Qualcomm crypto engine accelerator
  457. hardware. To compile this driver as a module, choose M here. The
  458. module will be called qcrypto.
  459. config CRYPTO_DEV_QCE_SKCIPHER
  460. bool
  461. depends on CRYPTO_DEV_QCE
  462. select CRYPTO_AES
  463. select CRYPTO_LIB_DES
  464. select CRYPTO_ECB
  465. select CRYPTO_CBC
  466. select CRYPTO_XTS
  467. select CRYPTO_CTR
  468. select CRYPTO_SKCIPHER
  469. config CRYPTO_DEV_QCEDEV
  470. tristate "QCEDEV Interface to CE module"
  471. depends on ARCH_QCOM
  472. help
  473. This driver supports QTI QCEDEV Crypto Engine 5.0.
  474. This exposes the interface to the QCE hardware accelerator
  475. via IOCTLs.
  476. To compile this driver as a module, choose M here: the
  477. module will be called qcedev.
  478. config CRYPTO_DEV_QCOM_MSM_QCE
  479. tristate "QTI Crypto Engine (QCE) module"
  480. depends on ARCH_QCOM
  481. help
  482. This driver supports QTI Crypto Engine accelerator hardware, which
  483. is present on SDM845, etc. This is the core crypto driver which adds
  484. CE5.0 functionalities. To compile this driver as a module, choose
  485. M here. The module will be called QCE50.
  486. config CRYPTO_DEV_QCE_SHA
  487. bool
  488. depends on CRYPTO_DEV_QCE
  489. select CRYPTO_SHA1
  490. select CRYPTO_SHA256
  491. config CRYPTO_DEV_QCE_AEAD
  492. bool
  493. depends on CRYPTO_DEV_QCE
  494. select CRYPTO_AUTHENC
  495. select CRYPTO_LIB_DES
  496. choice
  497. prompt "Algorithms enabled for QCE acceleration"
  498. default CRYPTO_DEV_QCE_ENABLE_ALL
  499. depends on CRYPTO_DEV_QCE
  500. help
  501. This option allows to choose whether to build support for all algorithms
  502. (default), hashes-only, or skciphers-only.
  503. The QCE engine does not appear to scale as well as the CPU to handle
  504. multiple crypto requests. While the ipq40xx chips have 4-core CPUs, the
  505. QCE handles only 2 requests in parallel.
  506. Ipsec throughput seems to improve when disabling either family of
  507. algorithms, sharing the load with the CPU. Enabling skciphers-only
  508. appears to work best.
  509. config CRYPTO_DEV_QCE_ENABLE_ALL
  510. bool "All supported algorithms"
  511. select CRYPTO_DEV_QCE_SKCIPHER
  512. select CRYPTO_DEV_QCE_SHA
  513. select CRYPTO_DEV_QCE_AEAD
  514. help
  515. Enable all supported algorithms:
  516. - AES (CBC, CTR, ECB, XTS)
  517. - 3DES (CBC, ECB)
  518. - DES (CBC, ECB)
  519. - SHA1, HMAC-SHA1
  520. - SHA256, HMAC-SHA256
  521. config CRYPTO_DEV_QCE_ENABLE_SKCIPHER
  522. bool "Symmetric-key ciphers only"
  523. select CRYPTO_DEV_QCE_SKCIPHER
  524. help
  525. Enable symmetric-key ciphers only:
  526. - AES (CBC, CTR, ECB, XTS)
  527. - 3DES (ECB, CBC)
  528. - DES (ECB, CBC)
  529. config CRYPTO_DEV_QCE_ENABLE_SHA
  530. bool "Hash/HMAC only"
  531. select CRYPTO_DEV_QCE_SHA
  532. help
  533. Enable hashes/HMAC algorithms only:
  534. - SHA1, HMAC-SHA1
  535. - SHA256, HMAC-SHA256
  536. config CRYPTO_DEV_QCE_ENABLE_AEAD
  537. bool "AEAD algorithms only"
  538. select CRYPTO_DEV_QCE_AEAD
  539. help
  540. Enable AEAD algorithms only:
  541. - authenc()
  542. - ccm(aes)
  543. - rfc4309(ccm(aes))
  544. endchoice
  545. config CRYPTO_DEV_QCE_SW_MAX_LEN
  546. int "Default maximum request size to use software for AES"
  547. depends on CRYPTO_DEV_QCE && CRYPTO_DEV_QCE_SKCIPHER
  548. default 512
  549. help
  550. This sets the default maximum request size to perform AES requests
  551. using software instead of the crypto engine. It can be changed by
  552. setting the aes_sw_max_len parameter.
  553. Small blocks are processed faster in software than hardware.
  554. Considering the 256-bit ciphers, software is 2-3 times faster than
  555. qce at 256-bytes, 30% faster at 512, and about even at 768-bytes.
  556. With 128-bit keys, the break-even point would be around 1024-bytes.
  557. The default is set a little lower, to 512 bytes, to balance the
  558. cost in CPU usage. The minimum recommended setting is 16-bytes
  559. (1 AES block), since AES-GCM will fail if you set it lower.
  560. Setting this to zero will send all requests to the hardware.
  561. Note that 192-bit keys are not supported by the hardware and are
  562. always processed by the software fallback, and all DES requests
  563. are done by the hardware.
  564. config CRYPTO_DEV_QCOM_RNG
  565. tristate "Qualcomm Random Number Generator Driver"
  566. depends on ARCH_QCOM || COMPILE_TEST
  567. select CRYPTO_RNG
  568. help
  569. This driver provides support for the Random Number
  570. Generator hardware found on Qualcomm SoCs.
  571. To compile this driver as a module, choose M here. The
  572. module will be called qcom-rng. If unsure, say N.
  573. config CRYPTO_DEV_VMX
  574. bool "Support for VMX cryptographic acceleration instructions"
  575. depends on PPC64 && VSX
  576. help
  577. Support for VMX cryptographic acceleration instructions.
  578. source "drivers/crypto/vmx/Kconfig"
  579. config CRYPTO_DEV_IMGTEC_HASH
  580. tristate "Imagination Technologies hardware hash accelerator"
  581. depends on MIPS || COMPILE_TEST
  582. select CRYPTO_MD5
  583. select CRYPTO_SHA1
  584. select CRYPTO_SHA256
  585. select CRYPTO_HASH
  586. help
  587. This driver interfaces with the Imagination Technologies
  588. hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
  589. hashing algorithms.
  590. config CRYPTO_DEV_ROCKCHIP
  591. tristate "Rockchip's Cryptographic Engine driver"
  592. depends on OF && ARCH_ROCKCHIP
  593. depends on PM
  594. select CRYPTO_ECB
  595. select CRYPTO_CBC
  596. select CRYPTO_DES
  597. select CRYPTO_AES
  598. select CRYPTO_ENGINE
  599. select CRYPTO_LIB_DES
  600. select CRYPTO_MD5
  601. select CRYPTO_SHA1
  602. select CRYPTO_SHA256
  603. select CRYPTO_HASH
  604. select CRYPTO_SKCIPHER
  605. help
  606. This driver interfaces with the hardware crypto accelerator.
  607. Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
  608. config CRYPTO_DEV_ZYNQMP_AES
  609. tristate "Support for Xilinx ZynqMP AES hw accelerator"
  610. depends on ZYNQMP_FIRMWARE || COMPILE_TEST
  611. select CRYPTO_AES
  612. select CRYPTO_ENGINE
  613. select CRYPTO_AEAD
  614. help
  615. Xilinx ZynqMP has AES-GCM engine used for symmetric key
  616. encryption and decryption. This driver interfaces with AES hw
  617. accelerator. Select this if you want to use the ZynqMP module
  618. for AES algorithms.
  619. config CRYPTO_DEV_ZYNQMP_SHA3
  620. tristate "Support for Xilinx ZynqMP SHA3 hardware accelerator"
  621. depends on ZYNQMP_FIRMWARE || COMPILE_TEST
  622. select CRYPTO_SHA3
  623. help
  624. Xilinx ZynqMP has SHA3 engine used for secure hash calculation.
  625. This driver interfaces with SHA3 hardware engine.
  626. Select this if you want to use the ZynqMP module
  627. for SHA3 hash computation.
  628. source "drivers/crypto/chelsio/Kconfig"
  629. source "drivers/crypto/virtio/Kconfig"
  630. config CRYPTO_DEV_BCM_SPU
  631. tristate "Broadcom symmetric crypto/hash acceleration support"
  632. depends on ARCH_BCM_IPROC
  633. depends on MAILBOX
  634. default m
  635. select CRYPTO_AUTHENC
  636. select CRYPTO_LIB_DES
  637. select CRYPTO_MD5
  638. select CRYPTO_SHA1
  639. select CRYPTO_SHA256
  640. select CRYPTO_SHA512
  641. help
  642. This driver provides support for Broadcom crypto acceleration using the
  643. Secure Processing Unit (SPU). The SPU driver registers skcipher,
  644. ahash, and aead algorithms with the kernel cryptographic API.
  645. source "drivers/crypto/stm32/Kconfig"
  646. config CRYPTO_DEV_SAFEXCEL
  647. tristate "Inside Secure's SafeXcel cryptographic engine driver"
  648. depends on (OF || PCI || COMPILE_TEST) && HAS_IOMEM
  649. select CRYPTO_LIB_AES
  650. select CRYPTO_AUTHENC
  651. select CRYPTO_SKCIPHER
  652. select CRYPTO_LIB_DES
  653. select CRYPTO_HASH
  654. select CRYPTO_HMAC
  655. select CRYPTO_MD5
  656. select CRYPTO_SHA1
  657. select CRYPTO_SHA256
  658. select CRYPTO_SHA512
  659. select CRYPTO_CHACHA20POLY1305
  660. select CRYPTO_SHA3
  661. help
  662. This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic
  663. engines designed by Inside Secure. It currently accelerates DES, 3DES and
  664. AES block ciphers in ECB and CBC mode, as well as SHA1, SHA224, SHA256,
  665. SHA384 and SHA512 hash algorithms for both basic hash and HMAC.
  666. Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations.
  667. config CRYPTO_DEV_ARTPEC6
  668. tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration."
  669. depends on ARM && (ARCH_ARTPEC || COMPILE_TEST)
  670. depends on OF
  671. select CRYPTO_AEAD
  672. select CRYPTO_AES
  673. select CRYPTO_ALGAPI
  674. select CRYPTO_SKCIPHER
  675. select CRYPTO_CTR
  676. select CRYPTO_HASH
  677. select CRYPTO_SHA1
  678. select CRYPTO_SHA256
  679. select CRYPTO_SHA512
  680. help
  681. Enables the driver for the on-chip crypto accelerator
  682. of Axis ARTPEC SoCs.
  683. To compile this driver as a module, choose M here.
  684. config CRYPTO_DEV_CCREE
  685. tristate "Support for ARM TrustZone CryptoCell family of security processors"
  686. depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA
  687. default n
  688. select CRYPTO_HASH
  689. select CRYPTO_SKCIPHER
  690. select CRYPTO_LIB_DES
  691. select CRYPTO_AEAD
  692. select CRYPTO_AUTHENC
  693. select CRYPTO_SHA1
  694. select CRYPTO_MD5
  695. select CRYPTO_SHA256
  696. select CRYPTO_SHA512
  697. select CRYPTO_HMAC
  698. select CRYPTO_AES
  699. select CRYPTO_CBC
  700. select CRYPTO_ECB
  701. select CRYPTO_CTR
  702. select CRYPTO_XTS
  703. select CRYPTO_SM4_GENERIC
  704. select CRYPTO_SM3_GENERIC
  705. help
  706. Say 'Y' to enable a driver for the REE interface of the Arm
  707. TrustZone CryptoCell family of processors. Currently the
  708. CryptoCell 713, 703, 712, 710 and 630 are supported.
  709. Choose this if you wish to use hardware acceleration of
  710. cryptographic operations on the system REE.
  711. If unsure say Y.
  712. source "drivers/crypto/hisilicon/Kconfig"
  713. source "drivers/crypto/amlogic/Kconfig"
  714. config CRYPTO_DEV_SA2UL
  715. tristate "Support for TI security accelerator"
  716. depends on ARCH_K3 || COMPILE_TEST
  717. select CRYPTO_AES
  718. select CRYPTO_ALGAPI
  719. select CRYPTO_AUTHENC
  720. select CRYPTO_DES
  721. select CRYPTO_SHA1
  722. select CRYPTO_SHA256
  723. select CRYPTO_SHA512
  724. select HW_RANDOM
  725. select SG_SPLIT
  726. help
  727. K3 devices include a security accelerator engine that may be
  728. used for crypto offload. Select this if you want to use hardware
  729. acceleration for cryptographic algorithms on these devices.
  730. source "drivers/crypto/keembay/Kconfig"
  731. source "drivers/crypto/aspeed/Kconfig"
  732. endif # CRYPTO_HW