clk-prcmu.c 9.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * PRCMU clock implementation for ux500 platform.
  4. *
  5. * Copyright (C) 2012 ST-Ericsson SA
  6. * Author: Ulf Hansson <[email protected]>
  7. */
  8. #include <linux/clk-provider.h>
  9. #include <linux/mfd/dbx500-prcmu.h>
  10. #include <linux/slab.h>
  11. #include <linux/io.h>
  12. #include <linux/err.h>
  13. #include "clk.h"
  14. #define to_clk_prcmu(_hw) container_of(_hw, struct clk_prcmu, hw)
  15. #define to_clk_prcmu_clkout(_hw) container_of(_hw, struct clk_prcmu_clkout, hw)
  16. struct clk_prcmu {
  17. struct clk_hw hw;
  18. u8 cg_sel;
  19. int opp_requested;
  20. };
  21. struct clk_prcmu_clkout {
  22. struct clk_hw hw;
  23. u8 clkout_id;
  24. u8 source;
  25. u8 divider;
  26. };
  27. /* PRCMU clock operations. */
  28. static int clk_prcmu_prepare(struct clk_hw *hw)
  29. {
  30. struct clk_prcmu *clk = to_clk_prcmu(hw);
  31. return prcmu_request_clock(clk->cg_sel, true);
  32. }
  33. static void clk_prcmu_unprepare(struct clk_hw *hw)
  34. {
  35. struct clk_prcmu *clk = to_clk_prcmu(hw);
  36. if (prcmu_request_clock(clk->cg_sel, false))
  37. pr_err("clk_prcmu: %s failed to disable %s.\n", __func__,
  38. clk_hw_get_name(hw));
  39. }
  40. static unsigned long clk_prcmu_recalc_rate(struct clk_hw *hw,
  41. unsigned long parent_rate)
  42. {
  43. struct clk_prcmu *clk = to_clk_prcmu(hw);
  44. return prcmu_clock_rate(clk->cg_sel);
  45. }
  46. static long clk_prcmu_round_rate(struct clk_hw *hw, unsigned long rate,
  47. unsigned long *parent_rate)
  48. {
  49. struct clk_prcmu *clk = to_clk_prcmu(hw);
  50. return prcmu_round_clock_rate(clk->cg_sel, rate);
  51. }
  52. static int clk_prcmu_set_rate(struct clk_hw *hw, unsigned long rate,
  53. unsigned long parent_rate)
  54. {
  55. struct clk_prcmu *clk = to_clk_prcmu(hw);
  56. return prcmu_set_clock_rate(clk->cg_sel, rate);
  57. }
  58. static int clk_prcmu_opp_prepare(struct clk_hw *hw)
  59. {
  60. int err;
  61. struct clk_prcmu *clk = to_clk_prcmu(hw);
  62. if (!clk->opp_requested) {
  63. err = prcmu_qos_add_requirement(PRCMU_QOS_APE_OPP,
  64. (char *)clk_hw_get_name(hw),
  65. 100);
  66. if (err) {
  67. pr_err("clk_prcmu: %s fail req APE OPP for %s.\n",
  68. __func__, clk_hw_get_name(hw));
  69. return err;
  70. }
  71. clk->opp_requested = 1;
  72. }
  73. err = prcmu_request_clock(clk->cg_sel, true);
  74. if (err) {
  75. prcmu_qos_remove_requirement(PRCMU_QOS_APE_OPP,
  76. (char *)clk_hw_get_name(hw));
  77. clk->opp_requested = 0;
  78. return err;
  79. }
  80. return 0;
  81. }
  82. static void clk_prcmu_opp_unprepare(struct clk_hw *hw)
  83. {
  84. struct clk_prcmu *clk = to_clk_prcmu(hw);
  85. if (prcmu_request_clock(clk->cg_sel, false)) {
  86. pr_err("clk_prcmu: %s failed to disable %s.\n", __func__,
  87. clk_hw_get_name(hw));
  88. return;
  89. }
  90. if (clk->opp_requested) {
  91. prcmu_qos_remove_requirement(PRCMU_QOS_APE_OPP,
  92. (char *)clk_hw_get_name(hw));
  93. clk->opp_requested = 0;
  94. }
  95. }
  96. static int clk_prcmu_opp_volt_prepare(struct clk_hw *hw)
  97. {
  98. int err;
  99. struct clk_prcmu *clk = to_clk_prcmu(hw);
  100. if (!clk->opp_requested) {
  101. err = prcmu_request_ape_opp_100_voltage(true);
  102. if (err) {
  103. pr_err("clk_prcmu: %s fail req APE OPP VOLT for %s.\n",
  104. __func__, clk_hw_get_name(hw));
  105. return err;
  106. }
  107. clk->opp_requested = 1;
  108. }
  109. err = prcmu_request_clock(clk->cg_sel, true);
  110. if (err) {
  111. prcmu_request_ape_opp_100_voltage(false);
  112. clk->opp_requested = 0;
  113. return err;
  114. }
  115. return 0;
  116. }
  117. static void clk_prcmu_opp_volt_unprepare(struct clk_hw *hw)
  118. {
  119. struct clk_prcmu *clk = to_clk_prcmu(hw);
  120. if (prcmu_request_clock(clk->cg_sel, false)) {
  121. pr_err("clk_prcmu: %s failed to disable %s.\n", __func__,
  122. clk_hw_get_name(hw));
  123. return;
  124. }
  125. if (clk->opp_requested) {
  126. prcmu_request_ape_opp_100_voltage(false);
  127. clk->opp_requested = 0;
  128. }
  129. }
  130. static const struct clk_ops clk_prcmu_scalable_ops = {
  131. .prepare = clk_prcmu_prepare,
  132. .unprepare = clk_prcmu_unprepare,
  133. .recalc_rate = clk_prcmu_recalc_rate,
  134. .round_rate = clk_prcmu_round_rate,
  135. .set_rate = clk_prcmu_set_rate,
  136. };
  137. static const struct clk_ops clk_prcmu_gate_ops = {
  138. .prepare = clk_prcmu_prepare,
  139. .unprepare = clk_prcmu_unprepare,
  140. .recalc_rate = clk_prcmu_recalc_rate,
  141. };
  142. static const struct clk_ops clk_prcmu_scalable_rate_ops = {
  143. .recalc_rate = clk_prcmu_recalc_rate,
  144. .round_rate = clk_prcmu_round_rate,
  145. .set_rate = clk_prcmu_set_rate,
  146. };
  147. static const struct clk_ops clk_prcmu_rate_ops = {
  148. .recalc_rate = clk_prcmu_recalc_rate,
  149. };
  150. static const struct clk_ops clk_prcmu_opp_gate_ops = {
  151. .prepare = clk_prcmu_opp_prepare,
  152. .unprepare = clk_prcmu_opp_unprepare,
  153. .recalc_rate = clk_prcmu_recalc_rate,
  154. };
  155. static const struct clk_ops clk_prcmu_opp_volt_scalable_ops = {
  156. .prepare = clk_prcmu_opp_volt_prepare,
  157. .unprepare = clk_prcmu_opp_volt_unprepare,
  158. .recalc_rate = clk_prcmu_recalc_rate,
  159. .round_rate = clk_prcmu_round_rate,
  160. .set_rate = clk_prcmu_set_rate,
  161. };
  162. static struct clk_hw *clk_reg_prcmu(const char *name,
  163. const char *parent_name,
  164. u8 cg_sel,
  165. unsigned long rate,
  166. unsigned long flags,
  167. const struct clk_ops *clk_prcmu_ops)
  168. {
  169. struct clk_prcmu *clk;
  170. struct clk_init_data clk_prcmu_init;
  171. int ret;
  172. if (!name) {
  173. pr_err("clk_prcmu: %s invalid arguments passed\n", __func__);
  174. return ERR_PTR(-EINVAL);
  175. }
  176. clk = kzalloc(sizeof(*clk), GFP_KERNEL);
  177. if (!clk)
  178. return ERR_PTR(-ENOMEM);
  179. clk->cg_sel = cg_sel;
  180. clk->opp_requested = 0;
  181. /* "rate" can be used for changing the initial frequency */
  182. if (rate)
  183. prcmu_set_clock_rate(cg_sel, rate);
  184. clk_prcmu_init.name = name;
  185. clk_prcmu_init.ops = clk_prcmu_ops;
  186. clk_prcmu_init.flags = flags;
  187. clk_prcmu_init.parent_names = (parent_name ? &parent_name : NULL);
  188. clk_prcmu_init.num_parents = (parent_name ? 1 : 0);
  189. clk->hw.init = &clk_prcmu_init;
  190. ret = clk_hw_register(NULL, &clk->hw);
  191. if (ret)
  192. goto free_clk;
  193. return &clk->hw;
  194. free_clk:
  195. kfree(clk);
  196. pr_err("clk_prcmu: %s failed to register clk\n", __func__);
  197. return ERR_PTR(-ENOMEM);
  198. }
  199. struct clk_hw *clk_reg_prcmu_scalable(const char *name,
  200. const char *parent_name,
  201. u8 cg_sel,
  202. unsigned long rate,
  203. unsigned long flags)
  204. {
  205. return clk_reg_prcmu(name, parent_name, cg_sel, rate, flags,
  206. &clk_prcmu_scalable_ops);
  207. }
  208. struct clk_hw *clk_reg_prcmu_gate(const char *name,
  209. const char *parent_name,
  210. u8 cg_sel,
  211. unsigned long flags)
  212. {
  213. return clk_reg_prcmu(name, parent_name, cg_sel, 0, flags,
  214. &clk_prcmu_gate_ops);
  215. }
  216. struct clk_hw *clk_reg_prcmu_scalable_rate(const char *name,
  217. const char *parent_name,
  218. u8 cg_sel,
  219. unsigned long rate,
  220. unsigned long flags)
  221. {
  222. return clk_reg_prcmu(name, parent_name, cg_sel, rate, flags,
  223. &clk_prcmu_scalable_rate_ops);
  224. }
  225. struct clk_hw *clk_reg_prcmu_rate(const char *name,
  226. const char *parent_name,
  227. u8 cg_sel,
  228. unsigned long flags)
  229. {
  230. return clk_reg_prcmu(name, parent_name, cg_sel, 0, flags,
  231. &clk_prcmu_rate_ops);
  232. }
  233. struct clk_hw *clk_reg_prcmu_opp_gate(const char *name,
  234. const char *parent_name,
  235. u8 cg_sel,
  236. unsigned long flags)
  237. {
  238. return clk_reg_prcmu(name, parent_name, cg_sel, 0, flags,
  239. &clk_prcmu_opp_gate_ops);
  240. }
  241. struct clk_hw *clk_reg_prcmu_opp_volt_scalable(const char *name,
  242. const char *parent_name,
  243. u8 cg_sel,
  244. unsigned long rate,
  245. unsigned long flags)
  246. {
  247. return clk_reg_prcmu(name, parent_name, cg_sel, rate, flags,
  248. &clk_prcmu_opp_volt_scalable_ops);
  249. }
  250. /* The clkout (external) clock is special and need special ops */
  251. static int clk_prcmu_clkout_prepare(struct clk_hw *hw)
  252. {
  253. struct clk_prcmu_clkout *clk = to_clk_prcmu_clkout(hw);
  254. return prcmu_config_clkout(clk->clkout_id, clk->source, clk->divider);
  255. }
  256. static void clk_prcmu_clkout_unprepare(struct clk_hw *hw)
  257. {
  258. struct clk_prcmu_clkout *clk = to_clk_prcmu_clkout(hw);
  259. int ret;
  260. /* The clkout clock is disabled by dividing by 0 */
  261. ret = prcmu_config_clkout(clk->clkout_id, clk->source, 0);
  262. if (ret)
  263. pr_err("clk_prcmu: %s failed to disable %s\n", __func__,
  264. clk_hw_get_name(hw));
  265. }
  266. static unsigned long clk_prcmu_clkout_recalc_rate(struct clk_hw *hw,
  267. unsigned long parent_rate)
  268. {
  269. struct clk_prcmu_clkout *clk = to_clk_prcmu_clkout(hw);
  270. return (parent_rate / clk->divider);
  271. }
  272. static u8 clk_prcmu_clkout_get_parent(struct clk_hw *hw)
  273. {
  274. struct clk_prcmu_clkout *clk = to_clk_prcmu_clkout(hw);
  275. return clk->source;
  276. }
  277. static int clk_prcmu_clkout_set_parent(struct clk_hw *hw, u8 index)
  278. {
  279. struct clk_prcmu_clkout *clk = to_clk_prcmu_clkout(hw);
  280. clk->source = index;
  281. /* Make sure the change reaches the hardware immediately */
  282. if (clk_hw_is_prepared(hw))
  283. return clk_prcmu_clkout_prepare(hw);
  284. return 0;
  285. }
  286. static const struct clk_ops clk_prcmu_clkout_ops = {
  287. .prepare = clk_prcmu_clkout_prepare,
  288. .unprepare = clk_prcmu_clkout_unprepare,
  289. .recalc_rate = clk_prcmu_clkout_recalc_rate,
  290. .get_parent = clk_prcmu_clkout_get_parent,
  291. .set_parent = clk_prcmu_clkout_set_parent,
  292. };
  293. struct clk_hw *clk_reg_prcmu_clkout(const char *name,
  294. const char * const *parent_names,
  295. int num_parents,
  296. u8 source, u8 divider)
  297. {
  298. struct clk_prcmu_clkout *clk;
  299. struct clk_init_data clk_prcmu_clkout_init;
  300. u8 clkout_id;
  301. int ret;
  302. if (!name) {
  303. pr_err("clk_prcmu_clkout: %s invalid arguments passed\n", __func__);
  304. return ERR_PTR(-EINVAL);
  305. }
  306. if (!strcmp(name, "clkout1"))
  307. clkout_id = 0;
  308. else if (!strcmp(name, "clkout2"))
  309. clkout_id = 1;
  310. else {
  311. pr_err("clk_prcmu_clkout: %s bad clock name\n", __func__);
  312. return ERR_PTR(-EINVAL);
  313. }
  314. clk = kzalloc(sizeof(*clk), GFP_KERNEL);
  315. if (!clk)
  316. return ERR_PTR(-ENOMEM);
  317. clk->clkout_id = clkout_id;
  318. clk->source = source;
  319. clk->divider = divider;
  320. clk_prcmu_clkout_init.name = name;
  321. clk_prcmu_clkout_init.ops = &clk_prcmu_clkout_ops;
  322. clk_prcmu_clkout_init.flags = CLK_GET_RATE_NOCACHE;
  323. clk_prcmu_clkout_init.parent_names = parent_names;
  324. clk_prcmu_clkout_init.num_parents = num_parents;
  325. clk->hw.init = &clk_prcmu_clkout_init;
  326. ret = clk_hw_register(NULL, &clk->hw);
  327. if (ret)
  328. goto free_clkout;
  329. return &clk->hw;
  330. free_clkout:
  331. kfree(clk);
  332. pr_err("clk_prcmu_clkout: %s failed to register clk\n", __func__);
  333. return ERR_PTR(-ENOMEM);
  334. }