ccu_sdm.c 4.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright (C) 2017 Chen-Yu Tsai <[email protected]>
  4. */
  5. #include <linux/clk-provider.h>
  6. #include <linux/io.h>
  7. #include <linux/spinlock.h>
  8. #include "ccu_sdm.h"
  9. bool ccu_sdm_helper_is_enabled(struct ccu_common *common,
  10. struct ccu_sdm_internal *sdm)
  11. {
  12. if (!(common->features & CCU_FEATURE_SIGMA_DELTA_MOD))
  13. return false;
  14. if (sdm->enable && !(readl(common->base + common->reg) & sdm->enable))
  15. return false;
  16. return !!(readl(common->base + sdm->tuning_reg) & sdm->tuning_enable);
  17. }
  18. EXPORT_SYMBOL_NS_GPL(ccu_sdm_helper_is_enabled, SUNXI_CCU);
  19. void ccu_sdm_helper_enable(struct ccu_common *common,
  20. struct ccu_sdm_internal *sdm,
  21. unsigned long rate)
  22. {
  23. unsigned long flags;
  24. unsigned int i;
  25. u32 reg;
  26. if (!(common->features & CCU_FEATURE_SIGMA_DELTA_MOD))
  27. return;
  28. /* Set the pattern */
  29. for (i = 0; i < sdm->table_size; i++)
  30. if (sdm->table[i].rate == rate)
  31. writel(sdm->table[i].pattern,
  32. common->base + sdm->tuning_reg);
  33. /* Make sure SDM is enabled */
  34. spin_lock_irqsave(common->lock, flags);
  35. reg = readl(common->base + sdm->tuning_reg);
  36. writel(reg | sdm->tuning_enable, common->base + sdm->tuning_reg);
  37. spin_unlock_irqrestore(common->lock, flags);
  38. spin_lock_irqsave(common->lock, flags);
  39. reg = readl(common->base + common->reg);
  40. writel(reg | sdm->enable, common->base + common->reg);
  41. spin_unlock_irqrestore(common->lock, flags);
  42. }
  43. EXPORT_SYMBOL_NS_GPL(ccu_sdm_helper_enable, SUNXI_CCU);
  44. void ccu_sdm_helper_disable(struct ccu_common *common,
  45. struct ccu_sdm_internal *sdm)
  46. {
  47. unsigned long flags;
  48. u32 reg;
  49. if (!(common->features & CCU_FEATURE_SIGMA_DELTA_MOD))
  50. return;
  51. spin_lock_irqsave(common->lock, flags);
  52. reg = readl(common->base + common->reg);
  53. writel(reg & ~sdm->enable, common->base + common->reg);
  54. spin_unlock_irqrestore(common->lock, flags);
  55. spin_lock_irqsave(common->lock, flags);
  56. reg = readl(common->base + sdm->tuning_reg);
  57. writel(reg & ~sdm->tuning_enable, common->base + sdm->tuning_reg);
  58. spin_unlock_irqrestore(common->lock, flags);
  59. }
  60. EXPORT_SYMBOL_NS_GPL(ccu_sdm_helper_disable, SUNXI_CCU);
  61. /*
  62. * Sigma delta modulation provides a way to do fractional-N frequency
  63. * synthesis, in essence allowing the PLL to output any frequency
  64. * within its operational range. On earlier SoCs such as the A10/A20,
  65. * some PLLs support this. On later SoCs, all PLLs support this.
  66. *
  67. * The datasheets do not explain what the "wave top" and "wave bottom"
  68. * parameters mean or do, nor how to calculate the effective output
  69. * frequency. The only examples (and real world usage) are for the audio
  70. * PLL to generate 24.576 and 22.5792 MHz clock rates used by the audio
  71. * peripherals. The author lacks the underlying domain knowledge to
  72. * pursue this.
  73. *
  74. * The goal and function of the following code is to support the two
  75. * clock rates used by the audio subsystem, allowing for proper audio
  76. * playback and capture without any pitch or speed changes.
  77. */
  78. bool ccu_sdm_helper_has_rate(struct ccu_common *common,
  79. struct ccu_sdm_internal *sdm,
  80. unsigned long rate)
  81. {
  82. unsigned int i;
  83. if (!(common->features & CCU_FEATURE_SIGMA_DELTA_MOD))
  84. return false;
  85. for (i = 0; i < sdm->table_size; i++)
  86. if (sdm->table[i].rate == rate)
  87. return true;
  88. return false;
  89. }
  90. EXPORT_SYMBOL_NS_GPL(ccu_sdm_helper_has_rate, SUNXI_CCU);
  91. unsigned long ccu_sdm_helper_read_rate(struct ccu_common *common,
  92. struct ccu_sdm_internal *sdm,
  93. u32 m, u32 n)
  94. {
  95. unsigned int i;
  96. u32 reg;
  97. pr_debug("%s: Read sigma-delta modulation setting\n",
  98. clk_hw_get_name(&common->hw));
  99. if (!(common->features & CCU_FEATURE_SIGMA_DELTA_MOD))
  100. return 0;
  101. pr_debug("%s: clock is sigma-delta modulated\n",
  102. clk_hw_get_name(&common->hw));
  103. reg = readl(common->base + sdm->tuning_reg);
  104. pr_debug("%s: pattern reg is 0x%x",
  105. clk_hw_get_name(&common->hw), reg);
  106. for (i = 0; i < sdm->table_size; i++)
  107. if (sdm->table[i].pattern == reg &&
  108. sdm->table[i].m == m && sdm->table[i].n == n)
  109. return sdm->table[i].rate;
  110. /* We can't calculate the effective clock rate, so just fail. */
  111. return 0;
  112. }
  113. EXPORT_SYMBOL_NS_GPL(ccu_sdm_helper_read_rate, SUNXI_CCU);
  114. int ccu_sdm_helper_get_factors(struct ccu_common *common,
  115. struct ccu_sdm_internal *sdm,
  116. unsigned long rate,
  117. unsigned long *m, unsigned long *n)
  118. {
  119. unsigned int i;
  120. if (!(common->features & CCU_FEATURE_SIGMA_DELTA_MOD))
  121. return -EINVAL;
  122. for (i = 0; i < sdm->table_size; i++)
  123. if (sdm->table[i].rate == rate) {
  124. *m = sdm->table[i].m;
  125. *n = sdm->table[i].n;
  126. return 0;
  127. }
  128. /* nothing found */
  129. return -EINVAL;
  130. }
  131. EXPORT_SYMBOL_NS_GPL(ccu_sdm_helper_get_factors, SUNXI_CCU);