ccu_nm.h 4.3 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (c) 2016 Maxime Ripard. All rights reserved.
  4. */
  5. #ifndef _CCU_NM_H_
  6. #define _CCU_NM_H_
  7. #include <linux/clk-provider.h>
  8. #include "ccu_common.h"
  9. #include "ccu_div.h"
  10. #include "ccu_frac.h"
  11. #include "ccu_mult.h"
  12. #include "ccu_sdm.h"
  13. /*
  14. * struct ccu_nm - Definition of an N-M clock
  15. *
  16. * Clocks based on the formula parent * N / M
  17. */
  18. struct ccu_nm {
  19. u32 enable;
  20. u32 lock;
  21. struct ccu_mult_internal n;
  22. struct ccu_div_internal m;
  23. struct ccu_frac_internal frac;
  24. struct ccu_sdm_internal sdm;
  25. unsigned int fixed_post_div;
  26. unsigned int min_rate;
  27. unsigned int max_rate;
  28. struct ccu_common common;
  29. };
  30. #define SUNXI_CCU_NM_WITH_SDM_GATE_LOCK(_struct, _name, _parent, _reg, \
  31. _nshift, _nwidth, \
  32. _mshift, _mwidth, \
  33. _sdm_table, _sdm_en, \
  34. _sdm_reg, _sdm_reg_en, \
  35. _gate, _lock, _flags) \
  36. struct ccu_nm _struct = { \
  37. .enable = _gate, \
  38. .lock = _lock, \
  39. .n = _SUNXI_CCU_MULT(_nshift, _nwidth), \
  40. .m = _SUNXI_CCU_DIV(_mshift, _mwidth), \
  41. .sdm = _SUNXI_CCU_SDM(_sdm_table, _sdm_en, \
  42. _sdm_reg, _sdm_reg_en),\
  43. .common = { \
  44. .reg = _reg, \
  45. .features = CCU_FEATURE_SIGMA_DELTA_MOD, \
  46. .hw.init = CLK_HW_INIT(_name, \
  47. _parent, \
  48. &ccu_nm_ops, \
  49. _flags), \
  50. }, \
  51. }
  52. #define SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(_struct, _name, _parent, _reg, \
  53. _nshift, _nwidth, \
  54. _mshift, _mwidth, \
  55. _frac_en, _frac_sel, \
  56. _frac_rate_0, _frac_rate_1, \
  57. _gate, _lock, _flags) \
  58. struct ccu_nm _struct = { \
  59. .enable = _gate, \
  60. .lock = _lock, \
  61. .n = _SUNXI_CCU_MULT(_nshift, _nwidth), \
  62. .m = _SUNXI_CCU_DIV(_mshift, _mwidth), \
  63. .frac = _SUNXI_CCU_FRAC(_frac_en, _frac_sel, \
  64. _frac_rate_0, \
  65. _frac_rate_1), \
  66. .common = { \
  67. .reg = _reg, \
  68. .features = CCU_FEATURE_FRACTIONAL, \
  69. .hw.init = CLK_HW_INIT(_name, \
  70. _parent, \
  71. &ccu_nm_ops, \
  72. _flags), \
  73. }, \
  74. }
  75. #define SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN(_struct, _name, _parent, \
  76. _reg, _min_rate, \
  77. _nshift, _nwidth, \
  78. _mshift, _mwidth, \
  79. _frac_en, _frac_sel, \
  80. _frac_rate_0, _frac_rate_1,\
  81. _gate, _lock, _flags) \
  82. struct ccu_nm _struct = { \
  83. .enable = _gate, \
  84. .lock = _lock, \
  85. .n = _SUNXI_CCU_MULT(_nshift, _nwidth), \
  86. .m = _SUNXI_CCU_DIV(_mshift, _mwidth), \
  87. .frac = _SUNXI_CCU_FRAC(_frac_en, _frac_sel, \
  88. _frac_rate_0, \
  89. _frac_rate_1), \
  90. .min_rate = _min_rate, \
  91. .common = { \
  92. .reg = _reg, \
  93. .features = CCU_FEATURE_FRACTIONAL, \
  94. .hw.init = CLK_HW_INIT(_name, \
  95. _parent, \
  96. &ccu_nm_ops, \
  97. _flags), \
  98. }, \
  99. }
  100. #define SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN_MAX(_struct, _name, \
  101. _parent, _reg, \
  102. _min_rate, _max_rate, \
  103. _nshift, _nwidth, \
  104. _mshift, _mwidth, \
  105. _frac_en, _frac_sel, \
  106. _frac_rate_0, \
  107. _frac_rate_1, \
  108. _gate, _lock, _flags) \
  109. struct ccu_nm _struct = { \
  110. .enable = _gate, \
  111. .lock = _lock, \
  112. .n = _SUNXI_CCU_MULT(_nshift, _nwidth), \
  113. .m = _SUNXI_CCU_DIV(_mshift, _mwidth), \
  114. .frac = _SUNXI_CCU_FRAC(_frac_en, _frac_sel, \
  115. _frac_rate_0, \
  116. _frac_rate_1), \
  117. .min_rate = _min_rate, \
  118. .max_rate = _max_rate, \
  119. .common = { \
  120. .reg = _reg, \
  121. .features = CCU_FEATURE_FRACTIONAL, \
  122. .hw.init = CLK_HW_INIT(_name, \
  123. _parent, \
  124. &ccu_nm_ops, \
  125. _flags), \
  126. }, \
  127. }
  128. #define SUNXI_CCU_NM_WITH_GATE_LOCK(_struct, _name, _parent, _reg, \
  129. _nshift, _nwidth, \
  130. _mshift, _mwidth, \
  131. _gate, _lock, _flags) \
  132. struct ccu_nm _struct = { \
  133. .enable = _gate, \
  134. .lock = _lock, \
  135. .n = _SUNXI_CCU_MULT(_nshift, _nwidth), \
  136. .m = _SUNXI_CCU_DIV(_mshift, _mwidth), \
  137. .common = { \
  138. .reg = _reg, \
  139. .hw.init = CLK_HW_INIT(_name, \
  140. _parent, \
  141. &ccu_nm_ops, \
  142. _flags), \
  143. }, \
  144. }
  145. static inline struct ccu_nm *hw_to_ccu_nm(struct clk_hw *hw)
  146. {
  147. struct ccu_common *common = hw_to_ccu_common(hw);
  148. return container_of(common, struct ccu_nm, common);
  149. }
  150. extern const struct clk_ops ccu_nm_ops;
  151. #endif /* _CCU_NM_H_ */