meson-aoclk.c 2.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Amlogic Meson-AXG Clock Controller Driver
  4. *
  5. * Copyright (c) 2016 BayLibre, SAS.
  6. * Author: Neil Armstrong <[email protected]>
  7. *
  8. * Copyright (c) 2018 Amlogic, inc.
  9. * Author: Qiufang Dai <[email protected]>
  10. * Author: Yixun Lan <[email protected]>
  11. */
  12. #include <linux/platform_device.h>
  13. #include <linux/reset-controller.h>
  14. #include <linux/mfd/syscon.h>
  15. #include <linux/of_device.h>
  16. #include <linux/module.h>
  17. #include <linux/slab.h>
  18. #include "meson-aoclk.h"
  19. static int meson_aoclk_do_reset(struct reset_controller_dev *rcdev,
  20. unsigned long id)
  21. {
  22. struct meson_aoclk_reset_controller *rstc =
  23. container_of(rcdev, struct meson_aoclk_reset_controller, reset);
  24. return regmap_write(rstc->regmap, rstc->data->reset_reg,
  25. BIT(rstc->data->reset[id]));
  26. }
  27. static const struct reset_control_ops meson_aoclk_reset_ops = {
  28. .reset = meson_aoclk_do_reset,
  29. };
  30. int meson_aoclkc_probe(struct platform_device *pdev)
  31. {
  32. struct meson_aoclk_reset_controller *rstc;
  33. struct meson_aoclk_data *data;
  34. struct device *dev = &pdev->dev;
  35. struct device_node *np;
  36. struct regmap *regmap;
  37. int ret, clkid;
  38. data = (struct meson_aoclk_data *) of_device_get_match_data(dev);
  39. if (!data)
  40. return -ENODEV;
  41. rstc = devm_kzalloc(dev, sizeof(*rstc), GFP_KERNEL);
  42. if (!rstc)
  43. return -ENOMEM;
  44. np = of_get_parent(dev->of_node);
  45. regmap = syscon_node_to_regmap(np);
  46. of_node_put(np);
  47. if (IS_ERR(regmap)) {
  48. dev_err(dev, "failed to get regmap\n");
  49. return PTR_ERR(regmap);
  50. }
  51. /* Reset Controller */
  52. rstc->data = data;
  53. rstc->regmap = regmap;
  54. rstc->reset.ops = &meson_aoclk_reset_ops;
  55. rstc->reset.nr_resets = data->num_reset;
  56. rstc->reset.of_node = dev->of_node;
  57. ret = devm_reset_controller_register(dev, &rstc->reset);
  58. if (ret) {
  59. dev_err(dev, "failed to register reset controller\n");
  60. return ret;
  61. }
  62. /* Populate regmap */
  63. for (clkid = 0; clkid < data->num_clks; clkid++)
  64. data->clks[clkid]->map = regmap;
  65. /* Register all clks */
  66. for (clkid = 0; clkid < data->hw_data->num; clkid++) {
  67. if (!data->hw_data->hws[clkid])
  68. continue;
  69. ret = devm_clk_hw_register(dev, data->hw_data->hws[clkid]);
  70. if (ret) {
  71. dev_err(dev, "Clock registration failed\n");
  72. return ret;
  73. }
  74. }
  75. return devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,
  76. (void *) data->hw_data);
  77. }
  78. EXPORT_SYMBOL_GPL(meson_aoclkc_probe);
  79. MODULE_LICENSE("GPL v2");