clk-mt8195-ipe.c 1.3 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. //
  3. // Copyright (c) 2021 MediaTek Inc.
  4. // Author: Chun-Jie Chen <[email protected]>
  5. #include "clk-gate.h"
  6. #include "clk-mtk.h"
  7. #include <dt-bindings/clock/mt8195-clk.h>
  8. #include <linux/clk-provider.h>
  9. #include <linux/platform_device.h>
  10. static const struct mtk_gate_regs ipe_cg_regs = {
  11. .set_ofs = 0x0,
  12. .clr_ofs = 0x0,
  13. .sta_ofs = 0x0,
  14. };
  15. #define GATE_IPE(_id, _name, _parent, _shift) \
  16. GATE_MTK(_id, _name, _parent, &ipe_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr)
  17. static const struct mtk_gate ipe_clks[] = {
  18. GATE_IPE(CLK_IPE_DPE, "ipe_dpe", "top_ipe", 0),
  19. GATE_IPE(CLK_IPE_FDVT, "ipe_fdvt", "top_ipe", 1),
  20. GATE_IPE(CLK_IPE_ME, "ipe_me", "top_ipe", 2),
  21. GATE_IPE(CLK_IPE_TOP, "ipe_top", "top_ipe", 3),
  22. GATE_IPE(CLK_IPE_SMI_LARB12, "ipe_smi_larb12", "top_ipe", 4),
  23. };
  24. static const struct mtk_clk_desc ipe_desc = {
  25. .clks = ipe_clks,
  26. .num_clks = ARRAY_SIZE(ipe_clks),
  27. };
  28. static const struct of_device_id of_match_clk_mt8195_ipe[] = {
  29. {
  30. .compatible = "mediatek,mt8195-ipesys",
  31. .data = &ipe_desc,
  32. }, {
  33. /* sentinel */
  34. }
  35. };
  36. static struct platform_driver clk_mt8195_ipe_drv = {
  37. .probe = mtk_clk_simple_probe,
  38. .remove = mtk_clk_simple_remove,
  39. .driver = {
  40. .name = "clk-mt8195-ipe",
  41. .of_match_table = of_match_clk_mt8195_ipe,
  42. },
  43. };
  44. builtin_platform_driver(clk_mt8195_ipe_drv);