clk-mt8186-ipe.c 1.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. //
  3. // Copyright (c) 2022 MediaTek Inc.
  4. // Author: Chun-Jie Chen <[email protected]>
  5. #include <linux/clk-provider.h>
  6. #include <linux/platform_device.h>
  7. #include <dt-bindings/clock/mt8186-clk.h>
  8. #include "clk-gate.h"
  9. #include "clk-mtk.h"
  10. static const struct mtk_gate_regs ipe_cg_regs = {
  11. .set_ofs = 0x4,
  12. .clr_ofs = 0x8,
  13. .sta_ofs = 0x0,
  14. };
  15. #define GATE_IPE(_id, _name, _parent, _shift) \
  16. GATE_MTK(_id, _name, _parent, &ipe_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
  17. static const struct mtk_gate ipe_clks[] = {
  18. GATE_IPE(CLK_IPE_LARB19, "ipe_larb19", "top_ipe", 0),
  19. GATE_IPE(CLK_IPE_LARB20, "ipe_larb20", "top_ipe", 1),
  20. GATE_IPE(CLK_IPE_SMI_SUBCOM, "ipe_smi_subcom", "top_ipe", 2),
  21. GATE_IPE(CLK_IPE_FD, "ipe_fd", "top_ipe", 3),
  22. GATE_IPE(CLK_IPE_FE, "ipe_fe", "top_ipe", 4),
  23. GATE_IPE(CLK_IPE_RSC, "ipe_rsc", "top_ipe", 5),
  24. GATE_IPE(CLK_IPE_DPE, "ipe_dpe", "top_ipe", 6),
  25. GATE_IPE(CLK_IPE_GALS_IPE, "ipe_gals_ipe", "top_img1", 8),
  26. };
  27. static const struct mtk_clk_desc ipe_desc = {
  28. .clks = ipe_clks,
  29. .num_clks = ARRAY_SIZE(ipe_clks),
  30. };
  31. static const struct of_device_id of_match_clk_mt8186_ipe[] = {
  32. {
  33. .compatible = "mediatek,mt8186-ipesys",
  34. .data = &ipe_desc,
  35. }, {
  36. /* sentinel */
  37. }
  38. };
  39. static struct platform_driver clk_mt8186_ipe_drv = {
  40. .probe = mtk_clk_simple_probe,
  41. .remove = mtk_clk_simple_remove,
  42. .driver = {
  43. .name = "clk-mt8186-ipe",
  44. .of_match_table = of_match_clk_mt8186_ipe,
  45. },
  46. };
  47. builtin_platform_driver(clk_mt8186_ipe_drv);