pata_cypress.c 4.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * pata_cypress.c - Cypress PATA for new ATA layer
  4. * (C) 2006 Red Hat Inc
  5. * Alan Cox
  6. *
  7. * Based heavily on
  8. * linux/drivers/ide/pci/cy82c693.c Version 0.40 Sep. 10, 2002
  9. *
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/module.h>
  13. #include <linux/pci.h>
  14. #include <linux/blkdev.h>
  15. #include <linux/delay.h>
  16. #include <scsi/scsi_host.h>
  17. #include <linux/libata.h>
  18. #define DRV_NAME "pata_cypress"
  19. #define DRV_VERSION "0.1.5"
  20. /* here are the offset definitions for the registers */
  21. enum {
  22. CY82_IDE_CMDREG = 0x04,
  23. CY82_IDE_ADDRSETUP = 0x48,
  24. CY82_IDE_MASTER_IOR = 0x4C,
  25. CY82_IDE_MASTER_IOW = 0x4D,
  26. CY82_IDE_SLAVE_IOR = 0x4E,
  27. CY82_IDE_SLAVE_IOW = 0x4F,
  28. CY82_IDE_MASTER_8BIT = 0x50,
  29. CY82_IDE_SLAVE_8BIT = 0x51,
  30. CY82_INDEX_PORT = 0x22,
  31. CY82_DATA_PORT = 0x23,
  32. CY82_INDEX_CTRLREG1 = 0x01,
  33. CY82_INDEX_CHANNEL0 = 0x30,
  34. CY82_INDEX_CHANNEL1 = 0x31,
  35. CY82_INDEX_TIMEOUT = 0x32
  36. };
  37. static bool enable_dma = true;
  38. module_param(enable_dma, bool, 0);
  39. MODULE_PARM_DESC(enable_dma, "Enable bus master DMA operations");
  40. /**
  41. * cy82c693_set_piomode - set initial PIO mode data
  42. * @ap: ATA interface
  43. * @adev: ATA device
  44. *
  45. * Called to do the PIO mode setup.
  46. */
  47. static void cy82c693_set_piomode(struct ata_port *ap, struct ata_device *adev)
  48. {
  49. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  50. struct ata_timing t;
  51. const unsigned long T = 1000000 / 33;
  52. short time_16, time_8;
  53. u32 addr;
  54. if (ata_timing_compute(adev, adev->pio_mode, &t, T, 1) < 0) {
  55. ata_dev_err(adev, DRV_NAME ": mome computation failed.\n");
  56. return;
  57. }
  58. time_16 = clamp_val(t.recover - 1, 0, 15) |
  59. (clamp_val(t.active - 1, 0, 15) << 4);
  60. time_8 = clamp_val(t.act8b - 1, 0, 15) |
  61. (clamp_val(t.rec8b - 1, 0, 15) << 4);
  62. if (adev->devno == 0) {
  63. pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr);
  64. addr &= ~0x0F; /* Mask bits */
  65. addr |= clamp_val(t.setup - 1, 0, 15);
  66. pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr);
  67. pci_write_config_byte(pdev, CY82_IDE_MASTER_IOR, time_16);
  68. pci_write_config_byte(pdev, CY82_IDE_MASTER_IOW, time_16);
  69. pci_write_config_byte(pdev, CY82_IDE_MASTER_8BIT, time_8);
  70. } else {
  71. pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr);
  72. addr &= ~0xF0; /* Mask bits */
  73. addr |= (clamp_val(t.setup - 1, 0, 15) << 4);
  74. pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr);
  75. pci_write_config_byte(pdev, CY82_IDE_SLAVE_IOR, time_16);
  76. pci_write_config_byte(pdev, CY82_IDE_SLAVE_IOW, time_16);
  77. pci_write_config_byte(pdev, CY82_IDE_SLAVE_8BIT, time_8);
  78. }
  79. }
  80. /**
  81. * cy82c693_set_dmamode - set initial DMA mode data
  82. * @ap: ATA interface
  83. * @adev: ATA device
  84. *
  85. * Called to do the DMA mode setup.
  86. */
  87. static void cy82c693_set_dmamode(struct ata_port *ap, struct ata_device *adev)
  88. {
  89. int reg = CY82_INDEX_CHANNEL0 + ap->port_no;
  90. /* Be afraid, be very afraid. Magic registers in low I/O space */
  91. outb(reg, 0x22);
  92. outb(adev->dma_mode - XFER_MW_DMA_0, 0x23);
  93. /* 0x50 gives the best behaviour on the Alpha's using this chip */
  94. outb(CY82_INDEX_TIMEOUT, 0x22);
  95. outb(0x50, 0x23);
  96. }
  97. static struct scsi_host_template cy82c693_sht = {
  98. ATA_BMDMA_SHT(DRV_NAME),
  99. };
  100. static struct ata_port_operations cy82c693_port_ops = {
  101. .inherits = &ata_bmdma_port_ops,
  102. .cable_detect = ata_cable_40wire,
  103. .set_piomode = cy82c693_set_piomode,
  104. .set_dmamode = cy82c693_set_dmamode,
  105. };
  106. static int cy82c693_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
  107. {
  108. static struct ata_port_info info = {
  109. .flags = ATA_FLAG_SLAVE_POSS,
  110. .pio_mask = ATA_PIO4,
  111. .port_ops = &cy82c693_port_ops
  112. };
  113. const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info };
  114. if (enable_dma)
  115. info.mwdma_mask = ATA_MWDMA2;
  116. /* Devfn 1 is the ATA primary. The secondary is magic and on devfn2.
  117. For the moment we don't handle the secondary. FIXME */
  118. if (PCI_FUNC(pdev->devfn) != 1)
  119. return -ENODEV;
  120. return ata_pci_bmdma_init_one(pdev, ppi, &cy82c693_sht, NULL, 0);
  121. }
  122. static const struct pci_device_id cy82c693[] = {
  123. { PCI_VDEVICE(CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693), },
  124. { },
  125. };
  126. static struct pci_driver cy82c693_pci_driver = {
  127. .name = DRV_NAME,
  128. .id_table = cy82c693,
  129. .probe = cy82c693_init_one,
  130. .remove = ata_pci_remove_one,
  131. #ifdef CONFIG_PM_SLEEP
  132. .suspend = ata_pci_device_suspend,
  133. .resume = ata_pci_device_resume,
  134. #endif
  135. };
  136. module_pci_driver(cy82c693_pci_driver);
  137. MODULE_AUTHOR("Alan Cox");
  138. MODULE_DESCRIPTION("low-level driver for the CY82C693 PATA controller");
  139. MODULE_LICENSE("GPL");
  140. MODULE_DEVICE_TABLE(pci, cy82c693);
  141. MODULE_VERSION(DRV_VERSION);