x2apic_phys.c 4.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203
  1. // SPDX-License-Identifier: GPL-2.0
  2. #include <linux/cpumask.h>
  3. #include <linux/acpi.h>
  4. #include "local.h"
  5. int x2apic_phys;
  6. static struct apic apic_x2apic_phys;
  7. static u32 x2apic_max_apicid __ro_after_init;
  8. void __init x2apic_set_max_apicid(u32 apicid)
  9. {
  10. x2apic_max_apicid = apicid;
  11. }
  12. static int __init set_x2apic_phys_mode(char *arg)
  13. {
  14. x2apic_phys = 1;
  15. return 0;
  16. }
  17. early_param("x2apic_phys", set_x2apic_phys_mode);
  18. static bool x2apic_fadt_phys(void)
  19. {
  20. #ifdef CONFIG_ACPI
  21. if ((acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID) &&
  22. (acpi_gbl_FADT.flags & ACPI_FADT_APIC_PHYSICAL)) {
  23. printk(KERN_DEBUG "System requires x2apic physical mode\n");
  24. return true;
  25. }
  26. #endif
  27. return false;
  28. }
  29. static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
  30. {
  31. return x2apic_enabled() && (x2apic_phys || x2apic_fadt_phys());
  32. }
  33. static void x2apic_send_IPI(int cpu, int vector)
  34. {
  35. u32 dest = per_cpu(x86_cpu_to_apicid, cpu);
  36. /* x2apic MSRs are special and need a special fence: */
  37. weak_wrmsr_fence();
  38. __x2apic_send_IPI_dest(dest, vector, APIC_DEST_PHYSICAL);
  39. }
  40. static void
  41. __x2apic_send_IPI_mask(const struct cpumask *mask, int vector, int apic_dest)
  42. {
  43. unsigned long query_cpu;
  44. unsigned long this_cpu;
  45. unsigned long flags;
  46. /* x2apic MSRs are special and need a special fence: */
  47. weak_wrmsr_fence();
  48. local_irq_save(flags);
  49. this_cpu = smp_processor_id();
  50. for_each_cpu(query_cpu, mask) {
  51. if (apic_dest == APIC_DEST_ALLBUT && this_cpu == query_cpu)
  52. continue;
  53. __x2apic_send_IPI_dest(per_cpu(x86_cpu_to_apicid, query_cpu),
  54. vector, APIC_DEST_PHYSICAL);
  55. }
  56. local_irq_restore(flags);
  57. }
  58. static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
  59. {
  60. __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLINC);
  61. }
  62. static void
  63. x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
  64. {
  65. __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLBUT);
  66. }
  67. static void x2apic_send_IPI_allbutself(int vector)
  68. {
  69. __x2apic_send_IPI_shorthand(vector, APIC_DEST_ALLBUT);
  70. }
  71. static void x2apic_send_IPI_all(int vector)
  72. {
  73. __x2apic_send_IPI_shorthand(vector, APIC_DEST_ALLINC);
  74. }
  75. static void init_x2apic_ldr(void)
  76. {
  77. }
  78. static int x2apic_phys_probe(void)
  79. {
  80. if (!x2apic_mode)
  81. return 0;
  82. if (x2apic_phys || x2apic_fadt_phys())
  83. return 1;
  84. return apic == &apic_x2apic_phys;
  85. }
  86. /* Common x2apic functions, also used by x2apic_cluster */
  87. int x2apic_apic_id_valid(u32 apicid)
  88. {
  89. if (x2apic_max_apicid && apicid > x2apic_max_apicid)
  90. return 0;
  91. return 1;
  92. }
  93. int x2apic_apic_id_registered(void)
  94. {
  95. return 1;
  96. }
  97. void __x2apic_send_IPI_dest(unsigned int apicid, int vector, unsigned int dest)
  98. {
  99. unsigned long cfg = __prepare_ICR(0, vector, dest);
  100. native_x2apic_icr_write(cfg, apicid);
  101. }
  102. void __x2apic_send_IPI_shorthand(int vector, u32 which)
  103. {
  104. unsigned long cfg = __prepare_ICR(which, vector, 0);
  105. /* x2apic MSRs are special and need a special fence: */
  106. weak_wrmsr_fence();
  107. native_x2apic_icr_write(cfg, 0);
  108. }
  109. unsigned int x2apic_get_apic_id(unsigned long id)
  110. {
  111. return id;
  112. }
  113. u32 x2apic_set_apic_id(unsigned int id)
  114. {
  115. return id;
  116. }
  117. int x2apic_phys_pkg_id(int initial_apicid, int index_msb)
  118. {
  119. return initial_apicid >> index_msb;
  120. }
  121. void x2apic_send_IPI_self(int vector)
  122. {
  123. apic_write(APIC_SELF_IPI, vector);
  124. }
  125. static struct apic apic_x2apic_phys __ro_after_init = {
  126. .name = "physical x2apic",
  127. .probe = x2apic_phys_probe,
  128. .acpi_madt_oem_check = x2apic_acpi_madt_oem_check,
  129. .apic_id_valid = x2apic_apic_id_valid,
  130. .apic_id_registered = x2apic_apic_id_registered,
  131. .delivery_mode = APIC_DELIVERY_MODE_FIXED,
  132. .dest_mode_logical = false,
  133. .disable_esr = 0,
  134. .check_apicid_used = NULL,
  135. .init_apic_ldr = init_x2apic_ldr,
  136. .ioapic_phys_id_map = NULL,
  137. .setup_apic_routing = NULL,
  138. .cpu_present_to_apicid = default_cpu_present_to_apicid,
  139. .apicid_to_cpu_present = NULL,
  140. .check_phys_apicid_present = default_check_phys_apicid_present,
  141. .phys_pkg_id = x2apic_phys_pkg_id,
  142. .get_apic_id = x2apic_get_apic_id,
  143. .set_apic_id = x2apic_set_apic_id,
  144. .calc_dest_apicid = apic_default_calc_apicid,
  145. .send_IPI = x2apic_send_IPI,
  146. .send_IPI_mask = x2apic_send_IPI_mask,
  147. .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself,
  148. .send_IPI_allbutself = x2apic_send_IPI_allbutself,
  149. .send_IPI_all = x2apic_send_IPI_all,
  150. .send_IPI_self = x2apic_send_IPI_self,
  151. .inquire_remote_apic = NULL,
  152. .read = native_apic_msr_read,
  153. .write = native_apic_msr_write,
  154. .eoi_write = native_apic_msr_eoi_write,
  155. .icr_read = native_x2apic_icr_read,
  156. .icr_write = native_x2apic_icr_write,
  157. .wait_icr_idle = native_x2apic_wait_icr_idle,
  158. .safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle,
  159. };
  160. apic_driver(apic_x2apic_phys);