acenv.h 1.4 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * X86 specific ACPICA environments and implementation
  4. *
  5. * Copyright (C) 2014, Intel Corporation
  6. * Author: Lv Zheng <[email protected]>
  7. */
  8. #ifndef _ASM_X86_ACENV_H
  9. #define _ASM_X86_ACENV_H
  10. #include <asm/special_insns.h>
  11. /* Asm macros */
  12. /*
  13. * ACPI_FLUSH_CPU_CACHE() flushes caches on entering sleep states.
  14. * It is required to prevent data loss.
  15. *
  16. * While running inside virtual machine, the kernel can bypass cache flushing.
  17. * Changing sleep state in a virtual machine doesn't affect the host system
  18. * sleep state and cannot lead to data loss.
  19. */
  20. #define ACPI_FLUSH_CPU_CACHE() \
  21. do { \
  22. if (!cpu_feature_enabled(X86_FEATURE_HYPERVISOR)) \
  23. wbinvd(); \
  24. } while (0)
  25. int __acpi_acquire_global_lock(unsigned int *lock);
  26. int __acpi_release_global_lock(unsigned int *lock);
  27. #define ACPI_ACQUIRE_GLOBAL_LOCK(facs, Acq) \
  28. ((Acq) = __acpi_acquire_global_lock(&facs->global_lock))
  29. #define ACPI_RELEASE_GLOBAL_LOCK(facs, Acq) \
  30. ((Acq) = __acpi_release_global_lock(&facs->global_lock))
  31. /*
  32. * Math helper asm macros
  33. */
  34. #define ACPI_DIV_64_BY_32(n_hi, n_lo, d32, q32, r32) \
  35. asm("divl %2;" \
  36. : "=a"(q32), "=d"(r32) \
  37. : "r"(d32), \
  38. "0"(n_lo), "1"(n_hi))
  39. #define ACPI_SHIFT_RIGHT_64(n_hi, n_lo) \
  40. asm("shrl $1,%2 ;" \
  41. "rcrl $1,%3;" \
  42. : "=r"(n_hi), "=r"(n_lo) \
  43. : "0"(n_hi), "1"(n_lo))
  44. #endif /* _ASM_X86_ACENV_H */