aesni-intel_glue.c 36 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Support for Intel AES-NI instructions. This file contains glue
  4. * code, the real AES implementation is in intel-aes_asm.S.
  5. *
  6. * Copyright (C) 2008, Intel Corp.
  7. * Author: Huang Ying <[email protected]>
  8. *
  9. * Added RFC4106 AES-GCM support for 128-bit keys under the AEAD
  10. * interface for 64-bit kernels.
  11. * Authors: Adrian Hoban <[email protected]>
  12. * Gabriele Paoloni <[email protected]>
  13. * Tadeusz Struk ([email protected])
  14. * Aidan O'Mahony ([email protected])
  15. * Copyright (c) 2010, Intel Corporation.
  16. */
  17. #include <linux/hardirq.h>
  18. #include <linux/types.h>
  19. #include <linux/module.h>
  20. #include <linux/err.h>
  21. #include <crypto/algapi.h>
  22. #include <crypto/aes.h>
  23. #include <crypto/ctr.h>
  24. #include <crypto/b128ops.h>
  25. #include <crypto/gcm.h>
  26. #include <crypto/xts.h>
  27. #include <asm/cpu_device_id.h>
  28. #include <asm/simd.h>
  29. #include <crypto/scatterwalk.h>
  30. #include <crypto/internal/aead.h>
  31. #include <crypto/internal/simd.h>
  32. #include <crypto/internal/skcipher.h>
  33. #include <linux/jump_label.h>
  34. #include <linux/workqueue.h>
  35. #include <linux/spinlock.h>
  36. #include <linux/static_call.h>
  37. #define AESNI_ALIGN 16
  38. #define AESNI_ALIGN_ATTR __attribute__ ((__aligned__(AESNI_ALIGN)))
  39. #define AES_BLOCK_MASK (~(AES_BLOCK_SIZE - 1))
  40. #define RFC4106_HASH_SUBKEY_SIZE 16
  41. #define AESNI_ALIGN_EXTRA ((AESNI_ALIGN - 1) & ~(CRYPTO_MINALIGN - 1))
  42. #define CRYPTO_AES_CTX_SIZE (sizeof(struct crypto_aes_ctx) + AESNI_ALIGN_EXTRA)
  43. #define XTS_AES_CTX_SIZE (sizeof(struct aesni_xts_ctx) + AESNI_ALIGN_EXTRA)
  44. /* This data is stored at the end of the crypto_tfm struct.
  45. * It's a type of per "session" data storage location.
  46. * This needs to be 16 byte aligned.
  47. */
  48. struct aesni_rfc4106_gcm_ctx {
  49. u8 hash_subkey[16] AESNI_ALIGN_ATTR;
  50. struct crypto_aes_ctx aes_key_expanded AESNI_ALIGN_ATTR;
  51. u8 nonce[4];
  52. };
  53. struct generic_gcmaes_ctx {
  54. u8 hash_subkey[16] AESNI_ALIGN_ATTR;
  55. struct crypto_aes_ctx aes_key_expanded AESNI_ALIGN_ATTR;
  56. };
  57. struct aesni_xts_ctx {
  58. u8 raw_tweak_ctx[sizeof(struct crypto_aes_ctx)] AESNI_ALIGN_ATTR;
  59. u8 raw_crypt_ctx[sizeof(struct crypto_aes_ctx)] AESNI_ALIGN_ATTR;
  60. };
  61. #define GCM_BLOCK_LEN 16
  62. struct gcm_context_data {
  63. /* init, update and finalize context data */
  64. u8 aad_hash[GCM_BLOCK_LEN];
  65. u64 aad_length;
  66. u64 in_length;
  67. u8 partial_block_enc_key[GCM_BLOCK_LEN];
  68. u8 orig_IV[GCM_BLOCK_LEN];
  69. u8 current_counter[GCM_BLOCK_LEN];
  70. u64 partial_block_len;
  71. u64 unused;
  72. u8 hash_keys[GCM_BLOCK_LEN * 16];
  73. };
  74. asmlinkage int aesni_set_key(struct crypto_aes_ctx *ctx, const u8 *in_key,
  75. unsigned int key_len);
  76. asmlinkage void aesni_enc(const void *ctx, u8 *out, const u8 *in);
  77. asmlinkage void aesni_dec(const void *ctx, u8 *out, const u8 *in);
  78. asmlinkage void aesni_ecb_enc(struct crypto_aes_ctx *ctx, u8 *out,
  79. const u8 *in, unsigned int len);
  80. asmlinkage void aesni_ecb_dec(struct crypto_aes_ctx *ctx, u8 *out,
  81. const u8 *in, unsigned int len);
  82. asmlinkage void aesni_cbc_enc(struct crypto_aes_ctx *ctx, u8 *out,
  83. const u8 *in, unsigned int len, u8 *iv);
  84. asmlinkage void aesni_cbc_dec(struct crypto_aes_ctx *ctx, u8 *out,
  85. const u8 *in, unsigned int len, u8 *iv);
  86. asmlinkage void aesni_cts_cbc_enc(struct crypto_aes_ctx *ctx, u8 *out,
  87. const u8 *in, unsigned int len, u8 *iv);
  88. asmlinkage void aesni_cts_cbc_dec(struct crypto_aes_ctx *ctx, u8 *out,
  89. const u8 *in, unsigned int len, u8 *iv);
  90. #define AVX_GEN2_OPTSIZE 640
  91. #define AVX_GEN4_OPTSIZE 4096
  92. asmlinkage void aesni_xts_encrypt(const struct crypto_aes_ctx *ctx, u8 *out,
  93. const u8 *in, unsigned int len, u8 *iv);
  94. asmlinkage void aesni_xts_decrypt(const struct crypto_aes_ctx *ctx, u8 *out,
  95. const u8 *in, unsigned int len, u8 *iv);
  96. #ifdef CONFIG_X86_64
  97. asmlinkage void aesni_ctr_enc(struct crypto_aes_ctx *ctx, u8 *out,
  98. const u8 *in, unsigned int len, u8 *iv);
  99. DEFINE_STATIC_CALL(aesni_ctr_enc_tfm, aesni_ctr_enc);
  100. /* Scatter / Gather routines, with args similar to above */
  101. asmlinkage void aesni_gcm_init(void *ctx,
  102. struct gcm_context_data *gdata,
  103. u8 *iv,
  104. u8 *hash_subkey, const u8 *aad,
  105. unsigned long aad_len);
  106. asmlinkage void aesni_gcm_enc_update(void *ctx,
  107. struct gcm_context_data *gdata, u8 *out,
  108. const u8 *in, unsigned long plaintext_len);
  109. asmlinkage void aesni_gcm_dec_update(void *ctx,
  110. struct gcm_context_data *gdata, u8 *out,
  111. const u8 *in,
  112. unsigned long ciphertext_len);
  113. asmlinkage void aesni_gcm_finalize(void *ctx,
  114. struct gcm_context_data *gdata,
  115. u8 *auth_tag, unsigned long auth_tag_len);
  116. asmlinkage void aes_ctr_enc_128_avx_by8(const u8 *in, u8 *iv,
  117. void *keys, u8 *out, unsigned int num_bytes);
  118. asmlinkage void aes_ctr_enc_192_avx_by8(const u8 *in, u8 *iv,
  119. void *keys, u8 *out, unsigned int num_bytes);
  120. asmlinkage void aes_ctr_enc_256_avx_by8(const u8 *in, u8 *iv,
  121. void *keys, u8 *out, unsigned int num_bytes);
  122. asmlinkage void aes_xctr_enc_128_avx_by8(const u8 *in, const u8 *iv,
  123. const void *keys, u8 *out, unsigned int num_bytes,
  124. unsigned int byte_ctr);
  125. asmlinkage void aes_xctr_enc_192_avx_by8(const u8 *in, const u8 *iv,
  126. const void *keys, u8 *out, unsigned int num_bytes,
  127. unsigned int byte_ctr);
  128. asmlinkage void aes_xctr_enc_256_avx_by8(const u8 *in, const u8 *iv,
  129. const void *keys, u8 *out, unsigned int num_bytes,
  130. unsigned int byte_ctr);
  131. /*
  132. * asmlinkage void aesni_gcm_init_avx_gen2()
  133. * gcm_data *my_ctx_data, context data
  134. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  135. */
  136. asmlinkage void aesni_gcm_init_avx_gen2(void *my_ctx_data,
  137. struct gcm_context_data *gdata,
  138. u8 *iv,
  139. u8 *hash_subkey,
  140. const u8 *aad,
  141. unsigned long aad_len);
  142. asmlinkage void aesni_gcm_enc_update_avx_gen2(void *ctx,
  143. struct gcm_context_data *gdata, u8 *out,
  144. const u8 *in, unsigned long plaintext_len);
  145. asmlinkage void aesni_gcm_dec_update_avx_gen2(void *ctx,
  146. struct gcm_context_data *gdata, u8 *out,
  147. const u8 *in,
  148. unsigned long ciphertext_len);
  149. asmlinkage void aesni_gcm_finalize_avx_gen2(void *ctx,
  150. struct gcm_context_data *gdata,
  151. u8 *auth_tag, unsigned long auth_tag_len);
  152. /*
  153. * asmlinkage void aesni_gcm_init_avx_gen4()
  154. * gcm_data *my_ctx_data, context data
  155. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  156. */
  157. asmlinkage void aesni_gcm_init_avx_gen4(void *my_ctx_data,
  158. struct gcm_context_data *gdata,
  159. u8 *iv,
  160. u8 *hash_subkey,
  161. const u8 *aad,
  162. unsigned long aad_len);
  163. asmlinkage void aesni_gcm_enc_update_avx_gen4(void *ctx,
  164. struct gcm_context_data *gdata, u8 *out,
  165. const u8 *in, unsigned long plaintext_len);
  166. asmlinkage void aesni_gcm_dec_update_avx_gen4(void *ctx,
  167. struct gcm_context_data *gdata, u8 *out,
  168. const u8 *in,
  169. unsigned long ciphertext_len);
  170. asmlinkage void aesni_gcm_finalize_avx_gen4(void *ctx,
  171. struct gcm_context_data *gdata,
  172. u8 *auth_tag, unsigned long auth_tag_len);
  173. static __ro_after_init DEFINE_STATIC_KEY_FALSE(gcm_use_avx);
  174. static __ro_after_init DEFINE_STATIC_KEY_FALSE(gcm_use_avx2);
  175. static inline struct
  176. aesni_rfc4106_gcm_ctx *aesni_rfc4106_gcm_ctx_get(struct crypto_aead *tfm)
  177. {
  178. unsigned long align = AESNI_ALIGN;
  179. if (align <= crypto_tfm_ctx_alignment())
  180. align = 1;
  181. return PTR_ALIGN(crypto_aead_ctx(tfm), align);
  182. }
  183. static inline struct
  184. generic_gcmaes_ctx *generic_gcmaes_ctx_get(struct crypto_aead *tfm)
  185. {
  186. unsigned long align = AESNI_ALIGN;
  187. if (align <= crypto_tfm_ctx_alignment())
  188. align = 1;
  189. return PTR_ALIGN(crypto_aead_ctx(tfm), align);
  190. }
  191. #endif
  192. static inline struct crypto_aes_ctx *aes_ctx(void *raw_ctx)
  193. {
  194. unsigned long addr = (unsigned long)raw_ctx;
  195. unsigned long align = AESNI_ALIGN;
  196. if (align <= crypto_tfm_ctx_alignment())
  197. align = 1;
  198. return (struct crypto_aes_ctx *)ALIGN(addr, align);
  199. }
  200. static int aes_set_key_common(struct crypto_tfm *tfm, void *raw_ctx,
  201. const u8 *in_key, unsigned int key_len)
  202. {
  203. struct crypto_aes_ctx *ctx = aes_ctx(raw_ctx);
  204. int err;
  205. if (key_len != AES_KEYSIZE_128 && key_len != AES_KEYSIZE_192 &&
  206. key_len != AES_KEYSIZE_256)
  207. return -EINVAL;
  208. if (!crypto_simd_usable())
  209. err = aes_expandkey(ctx, in_key, key_len);
  210. else {
  211. kernel_fpu_begin();
  212. err = aesni_set_key(ctx, in_key, key_len);
  213. kernel_fpu_end();
  214. }
  215. return err;
  216. }
  217. static int aes_set_key(struct crypto_tfm *tfm, const u8 *in_key,
  218. unsigned int key_len)
  219. {
  220. return aes_set_key_common(tfm, crypto_tfm_ctx(tfm), in_key, key_len);
  221. }
  222. static void aesni_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  223. {
  224. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  225. if (!crypto_simd_usable()) {
  226. aes_encrypt(ctx, dst, src);
  227. } else {
  228. kernel_fpu_begin();
  229. aesni_enc(ctx, dst, src);
  230. kernel_fpu_end();
  231. }
  232. }
  233. static void aesni_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  234. {
  235. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  236. if (!crypto_simd_usable()) {
  237. aes_decrypt(ctx, dst, src);
  238. } else {
  239. kernel_fpu_begin();
  240. aesni_dec(ctx, dst, src);
  241. kernel_fpu_end();
  242. }
  243. }
  244. static int aesni_skcipher_setkey(struct crypto_skcipher *tfm, const u8 *key,
  245. unsigned int len)
  246. {
  247. return aes_set_key_common(crypto_skcipher_tfm(tfm),
  248. crypto_skcipher_ctx(tfm), key, len);
  249. }
  250. static int ecb_encrypt(struct skcipher_request *req)
  251. {
  252. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  253. struct crypto_aes_ctx *ctx = aes_ctx(crypto_skcipher_ctx(tfm));
  254. struct skcipher_walk walk;
  255. unsigned int nbytes;
  256. int err;
  257. err = skcipher_walk_virt(&walk, req, false);
  258. while ((nbytes = walk.nbytes)) {
  259. kernel_fpu_begin();
  260. aesni_ecb_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  261. nbytes & AES_BLOCK_MASK);
  262. kernel_fpu_end();
  263. nbytes &= AES_BLOCK_SIZE - 1;
  264. err = skcipher_walk_done(&walk, nbytes);
  265. }
  266. return err;
  267. }
  268. static int ecb_decrypt(struct skcipher_request *req)
  269. {
  270. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  271. struct crypto_aes_ctx *ctx = aes_ctx(crypto_skcipher_ctx(tfm));
  272. struct skcipher_walk walk;
  273. unsigned int nbytes;
  274. int err;
  275. err = skcipher_walk_virt(&walk, req, false);
  276. while ((nbytes = walk.nbytes)) {
  277. kernel_fpu_begin();
  278. aesni_ecb_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  279. nbytes & AES_BLOCK_MASK);
  280. kernel_fpu_end();
  281. nbytes &= AES_BLOCK_SIZE - 1;
  282. err = skcipher_walk_done(&walk, nbytes);
  283. }
  284. return err;
  285. }
  286. static int cbc_encrypt(struct skcipher_request *req)
  287. {
  288. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  289. struct crypto_aes_ctx *ctx = aes_ctx(crypto_skcipher_ctx(tfm));
  290. struct skcipher_walk walk;
  291. unsigned int nbytes;
  292. int err;
  293. err = skcipher_walk_virt(&walk, req, false);
  294. while ((nbytes = walk.nbytes)) {
  295. kernel_fpu_begin();
  296. aesni_cbc_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  297. nbytes & AES_BLOCK_MASK, walk.iv);
  298. kernel_fpu_end();
  299. nbytes &= AES_BLOCK_SIZE - 1;
  300. err = skcipher_walk_done(&walk, nbytes);
  301. }
  302. return err;
  303. }
  304. static int cbc_decrypt(struct skcipher_request *req)
  305. {
  306. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  307. struct crypto_aes_ctx *ctx = aes_ctx(crypto_skcipher_ctx(tfm));
  308. struct skcipher_walk walk;
  309. unsigned int nbytes;
  310. int err;
  311. err = skcipher_walk_virt(&walk, req, false);
  312. while ((nbytes = walk.nbytes)) {
  313. kernel_fpu_begin();
  314. aesni_cbc_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  315. nbytes & AES_BLOCK_MASK, walk.iv);
  316. kernel_fpu_end();
  317. nbytes &= AES_BLOCK_SIZE - 1;
  318. err = skcipher_walk_done(&walk, nbytes);
  319. }
  320. return err;
  321. }
  322. static int cts_cbc_encrypt(struct skcipher_request *req)
  323. {
  324. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  325. struct crypto_aes_ctx *ctx = aes_ctx(crypto_skcipher_ctx(tfm));
  326. int cbc_blocks = DIV_ROUND_UP(req->cryptlen, AES_BLOCK_SIZE) - 2;
  327. struct scatterlist *src = req->src, *dst = req->dst;
  328. struct scatterlist sg_src[2], sg_dst[2];
  329. struct skcipher_request subreq;
  330. struct skcipher_walk walk;
  331. int err;
  332. skcipher_request_set_tfm(&subreq, tfm);
  333. skcipher_request_set_callback(&subreq, skcipher_request_flags(req),
  334. NULL, NULL);
  335. if (req->cryptlen <= AES_BLOCK_SIZE) {
  336. if (req->cryptlen < AES_BLOCK_SIZE)
  337. return -EINVAL;
  338. cbc_blocks = 1;
  339. }
  340. if (cbc_blocks > 0) {
  341. skcipher_request_set_crypt(&subreq, req->src, req->dst,
  342. cbc_blocks * AES_BLOCK_SIZE,
  343. req->iv);
  344. err = cbc_encrypt(&subreq);
  345. if (err)
  346. return err;
  347. if (req->cryptlen == AES_BLOCK_SIZE)
  348. return 0;
  349. dst = src = scatterwalk_ffwd(sg_src, req->src, subreq.cryptlen);
  350. if (req->dst != req->src)
  351. dst = scatterwalk_ffwd(sg_dst, req->dst,
  352. subreq.cryptlen);
  353. }
  354. /* handle ciphertext stealing */
  355. skcipher_request_set_crypt(&subreq, src, dst,
  356. req->cryptlen - cbc_blocks * AES_BLOCK_SIZE,
  357. req->iv);
  358. err = skcipher_walk_virt(&walk, &subreq, false);
  359. if (err)
  360. return err;
  361. kernel_fpu_begin();
  362. aesni_cts_cbc_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  363. walk.nbytes, walk.iv);
  364. kernel_fpu_end();
  365. return skcipher_walk_done(&walk, 0);
  366. }
  367. static int cts_cbc_decrypt(struct skcipher_request *req)
  368. {
  369. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  370. struct crypto_aes_ctx *ctx = aes_ctx(crypto_skcipher_ctx(tfm));
  371. int cbc_blocks = DIV_ROUND_UP(req->cryptlen, AES_BLOCK_SIZE) - 2;
  372. struct scatterlist *src = req->src, *dst = req->dst;
  373. struct scatterlist sg_src[2], sg_dst[2];
  374. struct skcipher_request subreq;
  375. struct skcipher_walk walk;
  376. int err;
  377. skcipher_request_set_tfm(&subreq, tfm);
  378. skcipher_request_set_callback(&subreq, skcipher_request_flags(req),
  379. NULL, NULL);
  380. if (req->cryptlen <= AES_BLOCK_SIZE) {
  381. if (req->cryptlen < AES_BLOCK_SIZE)
  382. return -EINVAL;
  383. cbc_blocks = 1;
  384. }
  385. if (cbc_blocks > 0) {
  386. skcipher_request_set_crypt(&subreq, req->src, req->dst,
  387. cbc_blocks * AES_BLOCK_SIZE,
  388. req->iv);
  389. err = cbc_decrypt(&subreq);
  390. if (err)
  391. return err;
  392. if (req->cryptlen == AES_BLOCK_SIZE)
  393. return 0;
  394. dst = src = scatterwalk_ffwd(sg_src, req->src, subreq.cryptlen);
  395. if (req->dst != req->src)
  396. dst = scatterwalk_ffwd(sg_dst, req->dst,
  397. subreq.cryptlen);
  398. }
  399. /* handle ciphertext stealing */
  400. skcipher_request_set_crypt(&subreq, src, dst,
  401. req->cryptlen - cbc_blocks * AES_BLOCK_SIZE,
  402. req->iv);
  403. err = skcipher_walk_virt(&walk, &subreq, false);
  404. if (err)
  405. return err;
  406. kernel_fpu_begin();
  407. aesni_cts_cbc_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  408. walk.nbytes, walk.iv);
  409. kernel_fpu_end();
  410. return skcipher_walk_done(&walk, 0);
  411. }
  412. #ifdef CONFIG_X86_64
  413. static void aesni_ctr_enc_avx_tfm(struct crypto_aes_ctx *ctx, u8 *out,
  414. const u8 *in, unsigned int len, u8 *iv)
  415. {
  416. /*
  417. * based on key length, override with the by8 version
  418. * of ctr mode encryption/decryption for improved performance
  419. * aes_set_key_common() ensures that key length is one of
  420. * {128,192,256}
  421. */
  422. if (ctx->key_length == AES_KEYSIZE_128)
  423. aes_ctr_enc_128_avx_by8(in, iv, (void *)ctx, out, len);
  424. else if (ctx->key_length == AES_KEYSIZE_192)
  425. aes_ctr_enc_192_avx_by8(in, iv, (void *)ctx, out, len);
  426. else
  427. aes_ctr_enc_256_avx_by8(in, iv, (void *)ctx, out, len);
  428. }
  429. static int ctr_crypt(struct skcipher_request *req)
  430. {
  431. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  432. struct crypto_aes_ctx *ctx = aes_ctx(crypto_skcipher_ctx(tfm));
  433. u8 keystream[AES_BLOCK_SIZE];
  434. struct skcipher_walk walk;
  435. unsigned int nbytes;
  436. int err;
  437. err = skcipher_walk_virt(&walk, req, false);
  438. while ((nbytes = walk.nbytes) > 0) {
  439. kernel_fpu_begin();
  440. if (nbytes & AES_BLOCK_MASK)
  441. static_call(aesni_ctr_enc_tfm)(ctx, walk.dst.virt.addr,
  442. walk.src.virt.addr,
  443. nbytes & AES_BLOCK_MASK,
  444. walk.iv);
  445. nbytes &= ~AES_BLOCK_MASK;
  446. if (walk.nbytes == walk.total && nbytes > 0) {
  447. aesni_enc(ctx, keystream, walk.iv);
  448. crypto_xor_cpy(walk.dst.virt.addr + walk.nbytes - nbytes,
  449. walk.src.virt.addr + walk.nbytes - nbytes,
  450. keystream, nbytes);
  451. crypto_inc(walk.iv, AES_BLOCK_SIZE);
  452. nbytes = 0;
  453. }
  454. kernel_fpu_end();
  455. err = skcipher_walk_done(&walk, nbytes);
  456. }
  457. return err;
  458. }
  459. static void aesni_xctr_enc_avx_tfm(struct crypto_aes_ctx *ctx, u8 *out,
  460. const u8 *in, unsigned int len, u8 *iv,
  461. unsigned int byte_ctr)
  462. {
  463. if (ctx->key_length == AES_KEYSIZE_128)
  464. aes_xctr_enc_128_avx_by8(in, iv, (void *)ctx, out, len,
  465. byte_ctr);
  466. else if (ctx->key_length == AES_KEYSIZE_192)
  467. aes_xctr_enc_192_avx_by8(in, iv, (void *)ctx, out, len,
  468. byte_ctr);
  469. else
  470. aes_xctr_enc_256_avx_by8(in, iv, (void *)ctx, out, len,
  471. byte_ctr);
  472. }
  473. static int xctr_crypt(struct skcipher_request *req)
  474. {
  475. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  476. struct crypto_aes_ctx *ctx = aes_ctx(crypto_skcipher_ctx(tfm));
  477. u8 keystream[AES_BLOCK_SIZE];
  478. struct skcipher_walk walk;
  479. unsigned int nbytes;
  480. unsigned int byte_ctr = 0;
  481. int err;
  482. __le32 block[AES_BLOCK_SIZE / sizeof(__le32)];
  483. err = skcipher_walk_virt(&walk, req, false);
  484. while ((nbytes = walk.nbytes) > 0) {
  485. kernel_fpu_begin();
  486. if (nbytes & AES_BLOCK_MASK)
  487. aesni_xctr_enc_avx_tfm(ctx, walk.dst.virt.addr,
  488. walk.src.virt.addr, nbytes & AES_BLOCK_MASK,
  489. walk.iv, byte_ctr);
  490. nbytes &= ~AES_BLOCK_MASK;
  491. byte_ctr += walk.nbytes - nbytes;
  492. if (walk.nbytes == walk.total && nbytes > 0) {
  493. memcpy(block, walk.iv, AES_BLOCK_SIZE);
  494. block[0] ^= cpu_to_le32(1 + byte_ctr / AES_BLOCK_SIZE);
  495. aesni_enc(ctx, keystream, (u8 *)block);
  496. crypto_xor_cpy(walk.dst.virt.addr + walk.nbytes -
  497. nbytes, walk.src.virt.addr + walk.nbytes
  498. - nbytes, keystream, nbytes);
  499. byte_ctr += nbytes;
  500. nbytes = 0;
  501. }
  502. kernel_fpu_end();
  503. err = skcipher_walk_done(&walk, nbytes);
  504. }
  505. return err;
  506. }
  507. static int
  508. rfc4106_set_hash_subkey(u8 *hash_subkey, const u8 *key, unsigned int key_len)
  509. {
  510. struct crypto_aes_ctx ctx;
  511. int ret;
  512. ret = aes_expandkey(&ctx, key, key_len);
  513. if (ret)
  514. return ret;
  515. /* Clear the data in the hash sub key container to zero.*/
  516. /* We want to cipher all zeros to create the hash sub key. */
  517. memset(hash_subkey, 0, RFC4106_HASH_SUBKEY_SIZE);
  518. aes_encrypt(&ctx, hash_subkey, hash_subkey);
  519. memzero_explicit(&ctx, sizeof(ctx));
  520. return 0;
  521. }
  522. static int common_rfc4106_set_key(struct crypto_aead *aead, const u8 *key,
  523. unsigned int key_len)
  524. {
  525. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(aead);
  526. if (key_len < 4)
  527. return -EINVAL;
  528. /*Account for 4 byte nonce at the end.*/
  529. key_len -= 4;
  530. memcpy(ctx->nonce, key + key_len, sizeof(ctx->nonce));
  531. return aes_set_key_common(crypto_aead_tfm(aead),
  532. &ctx->aes_key_expanded, key, key_len) ?:
  533. rfc4106_set_hash_subkey(ctx->hash_subkey, key, key_len);
  534. }
  535. /* This is the Integrity Check Value (aka the authentication tag) length and can
  536. * be 8, 12 or 16 bytes long. */
  537. static int common_rfc4106_set_authsize(struct crypto_aead *aead,
  538. unsigned int authsize)
  539. {
  540. switch (authsize) {
  541. case 8:
  542. case 12:
  543. case 16:
  544. break;
  545. default:
  546. return -EINVAL;
  547. }
  548. return 0;
  549. }
  550. static int generic_gcmaes_set_authsize(struct crypto_aead *tfm,
  551. unsigned int authsize)
  552. {
  553. switch (authsize) {
  554. case 4:
  555. case 8:
  556. case 12:
  557. case 13:
  558. case 14:
  559. case 15:
  560. case 16:
  561. break;
  562. default:
  563. return -EINVAL;
  564. }
  565. return 0;
  566. }
  567. static int gcmaes_crypt_by_sg(bool enc, struct aead_request *req,
  568. unsigned int assoclen, u8 *hash_subkey,
  569. u8 *iv, void *aes_ctx, u8 *auth_tag,
  570. unsigned long auth_tag_len)
  571. {
  572. u8 databuf[sizeof(struct gcm_context_data) + (AESNI_ALIGN - 8)] __aligned(8);
  573. struct gcm_context_data *data = PTR_ALIGN((void *)databuf, AESNI_ALIGN);
  574. unsigned long left = req->cryptlen;
  575. struct scatter_walk assoc_sg_walk;
  576. struct skcipher_walk walk;
  577. bool do_avx, do_avx2;
  578. u8 *assocmem = NULL;
  579. u8 *assoc;
  580. int err;
  581. if (!enc)
  582. left -= auth_tag_len;
  583. do_avx = (left >= AVX_GEN2_OPTSIZE);
  584. do_avx2 = (left >= AVX_GEN4_OPTSIZE);
  585. /* Linearize assoc, if not already linear */
  586. if (req->src->length >= assoclen && req->src->length) {
  587. scatterwalk_start(&assoc_sg_walk, req->src);
  588. assoc = scatterwalk_map(&assoc_sg_walk);
  589. } else {
  590. gfp_t flags = (req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP) ?
  591. GFP_KERNEL : GFP_ATOMIC;
  592. /* assoc can be any length, so must be on heap */
  593. assocmem = kmalloc(assoclen, flags);
  594. if (unlikely(!assocmem))
  595. return -ENOMEM;
  596. assoc = assocmem;
  597. scatterwalk_map_and_copy(assoc, req->src, 0, assoclen, 0);
  598. }
  599. kernel_fpu_begin();
  600. if (static_branch_likely(&gcm_use_avx2) && do_avx2)
  601. aesni_gcm_init_avx_gen4(aes_ctx, data, iv, hash_subkey, assoc,
  602. assoclen);
  603. else if (static_branch_likely(&gcm_use_avx) && do_avx)
  604. aesni_gcm_init_avx_gen2(aes_ctx, data, iv, hash_subkey, assoc,
  605. assoclen);
  606. else
  607. aesni_gcm_init(aes_ctx, data, iv, hash_subkey, assoc, assoclen);
  608. kernel_fpu_end();
  609. if (!assocmem)
  610. scatterwalk_unmap(assoc);
  611. else
  612. kfree(assocmem);
  613. err = enc ? skcipher_walk_aead_encrypt(&walk, req, false)
  614. : skcipher_walk_aead_decrypt(&walk, req, false);
  615. while (walk.nbytes > 0) {
  616. kernel_fpu_begin();
  617. if (static_branch_likely(&gcm_use_avx2) && do_avx2) {
  618. if (enc)
  619. aesni_gcm_enc_update_avx_gen4(aes_ctx, data,
  620. walk.dst.virt.addr,
  621. walk.src.virt.addr,
  622. walk.nbytes);
  623. else
  624. aesni_gcm_dec_update_avx_gen4(aes_ctx, data,
  625. walk.dst.virt.addr,
  626. walk.src.virt.addr,
  627. walk.nbytes);
  628. } else if (static_branch_likely(&gcm_use_avx) && do_avx) {
  629. if (enc)
  630. aesni_gcm_enc_update_avx_gen2(aes_ctx, data,
  631. walk.dst.virt.addr,
  632. walk.src.virt.addr,
  633. walk.nbytes);
  634. else
  635. aesni_gcm_dec_update_avx_gen2(aes_ctx, data,
  636. walk.dst.virt.addr,
  637. walk.src.virt.addr,
  638. walk.nbytes);
  639. } else if (enc) {
  640. aesni_gcm_enc_update(aes_ctx, data, walk.dst.virt.addr,
  641. walk.src.virt.addr, walk.nbytes);
  642. } else {
  643. aesni_gcm_dec_update(aes_ctx, data, walk.dst.virt.addr,
  644. walk.src.virt.addr, walk.nbytes);
  645. }
  646. kernel_fpu_end();
  647. err = skcipher_walk_done(&walk, 0);
  648. }
  649. if (err)
  650. return err;
  651. kernel_fpu_begin();
  652. if (static_branch_likely(&gcm_use_avx2) && do_avx2)
  653. aesni_gcm_finalize_avx_gen4(aes_ctx, data, auth_tag,
  654. auth_tag_len);
  655. else if (static_branch_likely(&gcm_use_avx) && do_avx)
  656. aesni_gcm_finalize_avx_gen2(aes_ctx, data, auth_tag,
  657. auth_tag_len);
  658. else
  659. aesni_gcm_finalize(aes_ctx, data, auth_tag, auth_tag_len);
  660. kernel_fpu_end();
  661. return 0;
  662. }
  663. static int gcmaes_encrypt(struct aead_request *req, unsigned int assoclen,
  664. u8 *hash_subkey, u8 *iv, void *aes_ctx)
  665. {
  666. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  667. unsigned long auth_tag_len = crypto_aead_authsize(tfm);
  668. u8 auth_tag[16];
  669. int err;
  670. err = gcmaes_crypt_by_sg(true, req, assoclen, hash_subkey, iv, aes_ctx,
  671. auth_tag, auth_tag_len);
  672. if (err)
  673. return err;
  674. scatterwalk_map_and_copy(auth_tag, req->dst,
  675. req->assoclen + req->cryptlen,
  676. auth_tag_len, 1);
  677. return 0;
  678. }
  679. static int gcmaes_decrypt(struct aead_request *req, unsigned int assoclen,
  680. u8 *hash_subkey, u8 *iv, void *aes_ctx)
  681. {
  682. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  683. unsigned long auth_tag_len = crypto_aead_authsize(tfm);
  684. u8 auth_tag_msg[16];
  685. u8 auth_tag[16];
  686. int err;
  687. err = gcmaes_crypt_by_sg(false, req, assoclen, hash_subkey, iv, aes_ctx,
  688. auth_tag, auth_tag_len);
  689. if (err)
  690. return err;
  691. /* Copy out original auth_tag */
  692. scatterwalk_map_and_copy(auth_tag_msg, req->src,
  693. req->assoclen + req->cryptlen - auth_tag_len,
  694. auth_tag_len, 0);
  695. /* Compare generated tag with passed in tag. */
  696. if (crypto_memneq(auth_tag_msg, auth_tag, auth_tag_len)) {
  697. memzero_explicit(auth_tag, sizeof(auth_tag));
  698. return -EBADMSG;
  699. }
  700. return 0;
  701. }
  702. static int helper_rfc4106_encrypt(struct aead_request *req)
  703. {
  704. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  705. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  706. void *aes_ctx = &(ctx->aes_key_expanded);
  707. u8 ivbuf[16 + (AESNI_ALIGN - 8)] __aligned(8);
  708. u8 *iv = PTR_ALIGN(&ivbuf[0], AESNI_ALIGN);
  709. unsigned int i;
  710. __be32 counter = cpu_to_be32(1);
  711. /* Assuming we are supporting rfc4106 64-bit extended */
  712. /* sequence numbers We need to have the AAD length equal */
  713. /* to 16 or 20 bytes */
  714. if (unlikely(req->assoclen != 16 && req->assoclen != 20))
  715. return -EINVAL;
  716. /* IV below built */
  717. for (i = 0; i < 4; i++)
  718. *(iv+i) = ctx->nonce[i];
  719. for (i = 0; i < 8; i++)
  720. *(iv+4+i) = req->iv[i];
  721. *((__be32 *)(iv+12)) = counter;
  722. return gcmaes_encrypt(req, req->assoclen - 8, ctx->hash_subkey, iv,
  723. aes_ctx);
  724. }
  725. static int helper_rfc4106_decrypt(struct aead_request *req)
  726. {
  727. __be32 counter = cpu_to_be32(1);
  728. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  729. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  730. void *aes_ctx = &(ctx->aes_key_expanded);
  731. u8 ivbuf[16 + (AESNI_ALIGN - 8)] __aligned(8);
  732. u8 *iv = PTR_ALIGN(&ivbuf[0], AESNI_ALIGN);
  733. unsigned int i;
  734. if (unlikely(req->assoclen != 16 && req->assoclen != 20))
  735. return -EINVAL;
  736. /* Assuming we are supporting rfc4106 64-bit extended */
  737. /* sequence numbers We need to have the AAD length */
  738. /* equal to 16 or 20 bytes */
  739. /* IV below built */
  740. for (i = 0; i < 4; i++)
  741. *(iv+i) = ctx->nonce[i];
  742. for (i = 0; i < 8; i++)
  743. *(iv+4+i) = req->iv[i];
  744. *((__be32 *)(iv+12)) = counter;
  745. return gcmaes_decrypt(req, req->assoclen - 8, ctx->hash_subkey, iv,
  746. aes_ctx);
  747. }
  748. #endif
  749. static int xts_aesni_setkey(struct crypto_skcipher *tfm, const u8 *key,
  750. unsigned int keylen)
  751. {
  752. struct aesni_xts_ctx *ctx = crypto_skcipher_ctx(tfm);
  753. int err;
  754. err = xts_verify_key(tfm, key, keylen);
  755. if (err)
  756. return err;
  757. keylen /= 2;
  758. /* first half of xts-key is for crypt */
  759. err = aes_set_key_common(crypto_skcipher_tfm(tfm), ctx->raw_crypt_ctx,
  760. key, keylen);
  761. if (err)
  762. return err;
  763. /* second half of xts-key is for tweak */
  764. return aes_set_key_common(crypto_skcipher_tfm(tfm), ctx->raw_tweak_ctx,
  765. key + keylen, keylen);
  766. }
  767. static int xts_crypt(struct skcipher_request *req, bool encrypt)
  768. {
  769. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  770. struct aesni_xts_ctx *ctx = crypto_skcipher_ctx(tfm);
  771. int tail = req->cryptlen % AES_BLOCK_SIZE;
  772. struct skcipher_request subreq;
  773. struct skcipher_walk walk;
  774. int err;
  775. if (req->cryptlen < AES_BLOCK_SIZE)
  776. return -EINVAL;
  777. err = skcipher_walk_virt(&walk, req, false);
  778. if (!walk.nbytes)
  779. return err;
  780. if (unlikely(tail > 0 && walk.nbytes < walk.total)) {
  781. int blocks = DIV_ROUND_UP(req->cryptlen, AES_BLOCK_SIZE) - 2;
  782. skcipher_walk_abort(&walk);
  783. skcipher_request_set_tfm(&subreq, tfm);
  784. skcipher_request_set_callback(&subreq,
  785. skcipher_request_flags(req),
  786. NULL, NULL);
  787. skcipher_request_set_crypt(&subreq, req->src, req->dst,
  788. blocks * AES_BLOCK_SIZE, req->iv);
  789. req = &subreq;
  790. err = skcipher_walk_virt(&walk, req, false);
  791. if (!walk.nbytes)
  792. return err;
  793. } else {
  794. tail = 0;
  795. }
  796. kernel_fpu_begin();
  797. /* calculate first value of T */
  798. aesni_enc(aes_ctx(ctx->raw_tweak_ctx), walk.iv, walk.iv);
  799. while (walk.nbytes > 0) {
  800. int nbytes = walk.nbytes;
  801. if (nbytes < walk.total)
  802. nbytes &= ~(AES_BLOCK_SIZE - 1);
  803. if (encrypt)
  804. aesni_xts_encrypt(aes_ctx(ctx->raw_crypt_ctx),
  805. walk.dst.virt.addr, walk.src.virt.addr,
  806. nbytes, walk.iv);
  807. else
  808. aesni_xts_decrypt(aes_ctx(ctx->raw_crypt_ctx),
  809. walk.dst.virt.addr, walk.src.virt.addr,
  810. nbytes, walk.iv);
  811. kernel_fpu_end();
  812. err = skcipher_walk_done(&walk, walk.nbytes - nbytes);
  813. if (walk.nbytes > 0)
  814. kernel_fpu_begin();
  815. }
  816. if (unlikely(tail > 0 && !err)) {
  817. struct scatterlist sg_src[2], sg_dst[2];
  818. struct scatterlist *src, *dst;
  819. dst = src = scatterwalk_ffwd(sg_src, req->src, req->cryptlen);
  820. if (req->dst != req->src)
  821. dst = scatterwalk_ffwd(sg_dst, req->dst, req->cryptlen);
  822. skcipher_request_set_crypt(req, src, dst, AES_BLOCK_SIZE + tail,
  823. req->iv);
  824. err = skcipher_walk_virt(&walk, &subreq, false);
  825. if (err)
  826. return err;
  827. kernel_fpu_begin();
  828. if (encrypt)
  829. aesni_xts_encrypt(aes_ctx(ctx->raw_crypt_ctx),
  830. walk.dst.virt.addr, walk.src.virt.addr,
  831. walk.nbytes, walk.iv);
  832. else
  833. aesni_xts_decrypt(aes_ctx(ctx->raw_crypt_ctx),
  834. walk.dst.virt.addr, walk.src.virt.addr,
  835. walk.nbytes, walk.iv);
  836. kernel_fpu_end();
  837. err = skcipher_walk_done(&walk, 0);
  838. }
  839. return err;
  840. }
  841. static int xts_encrypt(struct skcipher_request *req)
  842. {
  843. return xts_crypt(req, true);
  844. }
  845. static int xts_decrypt(struct skcipher_request *req)
  846. {
  847. return xts_crypt(req, false);
  848. }
  849. static struct crypto_alg aesni_cipher_alg = {
  850. .cra_name = "aes",
  851. .cra_driver_name = "aes-aesni",
  852. .cra_priority = 300,
  853. .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
  854. .cra_blocksize = AES_BLOCK_SIZE,
  855. .cra_ctxsize = CRYPTO_AES_CTX_SIZE,
  856. .cra_module = THIS_MODULE,
  857. .cra_u = {
  858. .cipher = {
  859. .cia_min_keysize = AES_MIN_KEY_SIZE,
  860. .cia_max_keysize = AES_MAX_KEY_SIZE,
  861. .cia_setkey = aes_set_key,
  862. .cia_encrypt = aesni_encrypt,
  863. .cia_decrypt = aesni_decrypt
  864. }
  865. }
  866. };
  867. static struct skcipher_alg aesni_skciphers[] = {
  868. {
  869. .base = {
  870. .cra_name = "__ecb(aes)",
  871. .cra_driver_name = "__ecb-aes-aesni",
  872. .cra_priority = 400,
  873. .cra_flags = CRYPTO_ALG_INTERNAL,
  874. .cra_blocksize = AES_BLOCK_SIZE,
  875. .cra_ctxsize = CRYPTO_AES_CTX_SIZE,
  876. .cra_module = THIS_MODULE,
  877. },
  878. .min_keysize = AES_MIN_KEY_SIZE,
  879. .max_keysize = AES_MAX_KEY_SIZE,
  880. .setkey = aesni_skcipher_setkey,
  881. .encrypt = ecb_encrypt,
  882. .decrypt = ecb_decrypt,
  883. }, {
  884. .base = {
  885. .cra_name = "__cbc(aes)",
  886. .cra_driver_name = "__cbc-aes-aesni",
  887. .cra_priority = 400,
  888. .cra_flags = CRYPTO_ALG_INTERNAL,
  889. .cra_blocksize = AES_BLOCK_SIZE,
  890. .cra_ctxsize = CRYPTO_AES_CTX_SIZE,
  891. .cra_module = THIS_MODULE,
  892. },
  893. .min_keysize = AES_MIN_KEY_SIZE,
  894. .max_keysize = AES_MAX_KEY_SIZE,
  895. .ivsize = AES_BLOCK_SIZE,
  896. .setkey = aesni_skcipher_setkey,
  897. .encrypt = cbc_encrypt,
  898. .decrypt = cbc_decrypt,
  899. }, {
  900. .base = {
  901. .cra_name = "__cts(cbc(aes))",
  902. .cra_driver_name = "__cts-cbc-aes-aesni",
  903. .cra_priority = 400,
  904. .cra_flags = CRYPTO_ALG_INTERNAL,
  905. .cra_blocksize = AES_BLOCK_SIZE,
  906. .cra_ctxsize = CRYPTO_AES_CTX_SIZE,
  907. .cra_module = THIS_MODULE,
  908. },
  909. .min_keysize = AES_MIN_KEY_SIZE,
  910. .max_keysize = AES_MAX_KEY_SIZE,
  911. .ivsize = AES_BLOCK_SIZE,
  912. .walksize = 2 * AES_BLOCK_SIZE,
  913. .setkey = aesni_skcipher_setkey,
  914. .encrypt = cts_cbc_encrypt,
  915. .decrypt = cts_cbc_decrypt,
  916. #ifdef CONFIG_X86_64
  917. }, {
  918. .base = {
  919. .cra_name = "__ctr(aes)",
  920. .cra_driver_name = "__ctr-aes-aesni",
  921. .cra_priority = 400,
  922. .cra_flags = CRYPTO_ALG_INTERNAL,
  923. .cra_blocksize = 1,
  924. .cra_ctxsize = CRYPTO_AES_CTX_SIZE,
  925. .cra_module = THIS_MODULE,
  926. },
  927. .min_keysize = AES_MIN_KEY_SIZE,
  928. .max_keysize = AES_MAX_KEY_SIZE,
  929. .ivsize = AES_BLOCK_SIZE,
  930. .chunksize = AES_BLOCK_SIZE,
  931. .setkey = aesni_skcipher_setkey,
  932. .encrypt = ctr_crypt,
  933. .decrypt = ctr_crypt,
  934. #endif
  935. }, {
  936. .base = {
  937. .cra_name = "__xts(aes)",
  938. .cra_driver_name = "__xts-aes-aesni",
  939. .cra_priority = 401,
  940. .cra_flags = CRYPTO_ALG_INTERNAL,
  941. .cra_blocksize = AES_BLOCK_SIZE,
  942. .cra_ctxsize = XTS_AES_CTX_SIZE,
  943. .cra_module = THIS_MODULE,
  944. },
  945. .min_keysize = 2 * AES_MIN_KEY_SIZE,
  946. .max_keysize = 2 * AES_MAX_KEY_SIZE,
  947. .ivsize = AES_BLOCK_SIZE,
  948. .walksize = 2 * AES_BLOCK_SIZE,
  949. .setkey = xts_aesni_setkey,
  950. .encrypt = xts_encrypt,
  951. .decrypt = xts_decrypt,
  952. }
  953. };
  954. static
  955. struct simd_skcipher_alg *aesni_simd_skciphers[ARRAY_SIZE(aesni_skciphers)];
  956. #ifdef CONFIG_X86_64
  957. /*
  958. * XCTR does not have a non-AVX implementation, so it must be enabled
  959. * conditionally.
  960. */
  961. static struct skcipher_alg aesni_xctr = {
  962. .base = {
  963. .cra_name = "__xctr(aes)",
  964. .cra_driver_name = "__xctr-aes-aesni",
  965. .cra_priority = 400,
  966. .cra_flags = CRYPTO_ALG_INTERNAL,
  967. .cra_blocksize = 1,
  968. .cra_ctxsize = CRYPTO_AES_CTX_SIZE,
  969. .cra_module = THIS_MODULE,
  970. },
  971. .min_keysize = AES_MIN_KEY_SIZE,
  972. .max_keysize = AES_MAX_KEY_SIZE,
  973. .ivsize = AES_BLOCK_SIZE,
  974. .chunksize = AES_BLOCK_SIZE,
  975. .setkey = aesni_skcipher_setkey,
  976. .encrypt = xctr_crypt,
  977. .decrypt = xctr_crypt,
  978. };
  979. static struct simd_skcipher_alg *aesni_simd_xctr;
  980. #endif /* CONFIG_X86_64 */
  981. #ifdef CONFIG_X86_64
  982. static int generic_gcmaes_set_key(struct crypto_aead *aead, const u8 *key,
  983. unsigned int key_len)
  984. {
  985. struct generic_gcmaes_ctx *ctx = generic_gcmaes_ctx_get(aead);
  986. return aes_set_key_common(crypto_aead_tfm(aead),
  987. &ctx->aes_key_expanded, key, key_len) ?:
  988. rfc4106_set_hash_subkey(ctx->hash_subkey, key, key_len);
  989. }
  990. static int generic_gcmaes_encrypt(struct aead_request *req)
  991. {
  992. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  993. struct generic_gcmaes_ctx *ctx = generic_gcmaes_ctx_get(tfm);
  994. void *aes_ctx = &(ctx->aes_key_expanded);
  995. u8 ivbuf[16 + (AESNI_ALIGN - 8)] __aligned(8);
  996. u8 *iv = PTR_ALIGN(&ivbuf[0], AESNI_ALIGN);
  997. __be32 counter = cpu_to_be32(1);
  998. memcpy(iv, req->iv, 12);
  999. *((__be32 *)(iv+12)) = counter;
  1000. return gcmaes_encrypt(req, req->assoclen, ctx->hash_subkey, iv,
  1001. aes_ctx);
  1002. }
  1003. static int generic_gcmaes_decrypt(struct aead_request *req)
  1004. {
  1005. __be32 counter = cpu_to_be32(1);
  1006. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  1007. struct generic_gcmaes_ctx *ctx = generic_gcmaes_ctx_get(tfm);
  1008. void *aes_ctx = &(ctx->aes_key_expanded);
  1009. u8 ivbuf[16 + (AESNI_ALIGN - 8)] __aligned(8);
  1010. u8 *iv = PTR_ALIGN(&ivbuf[0], AESNI_ALIGN);
  1011. memcpy(iv, req->iv, 12);
  1012. *((__be32 *)(iv+12)) = counter;
  1013. return gcmaes_decrypt(req, req->assoclen, ctx->hash_subkey, iv,
  1014. aes_ctx);
  1015. }
  1016. static struct aead_alg aesni_aeads[] = { {
  1017. .setkey = common_rfc4106_set_key,
  1018. .setauthsize = common_rfc4106_set_authsize,
  1019. .encrypt = helper_rfc4106_encrypt,
  1020. .decrypt = helper_rfc4106_decrypt,
  1021. .ivsize = GCM_RFC4106_IV_SIZE,
  1022. .maxauthsize = 16,
  1023. .base = {
  1024. .cra_name = "__rfc4106(gcm(aes))",
  1025. .cra_driver_name = "__rfc4106-gcm-aesni",
  1026. .cra_priority = 400,
  1027. .cra_flags = CRYPTO_ALG_INTERNAL,
  1028. .cra_blocksize = 1,
  1029. .cra_ctxsize = sizeof(struct aesni_rfc4106_gcm_ctx),
  1030. .cra_alignmask = 0,
  1031. .cra_module = THIS_MODULE,
  1032. },
  1033. }, {
  1034. .setkey = generic_gcmaes_set_key,
  1035. .setauthsize = generic_gcmaes_set_authsize,
  1036. .encrypt = generic_gcmaes_encrypt,
  1037. .decrypt = generic_gcmaes_decrypt,
  1038. .ivsize = GCM_AES_IV_SIZE,
  1039. .maxauthsize = 16,
  1040. .base = {
  1041. .cra_name = "__gcm(aes)",
  1042. .cra_driver_name = "__generic-gcm-aesni",
  1043. .cra_priority = 400,
  1044. .cra_flags = CRYPTO_ALG_INTERNAL,
  1045. .cra_blocksize = 1,
  1046. .cra_ctxsize = sizeof(struct generic_gcmaes_ctx),
  1047. .cra_alignmask = 0,
  1048. .cra_module = THIS_MODULE,
  1049. },
  1050. } };
  1051. #else
  1052. static struct aead_alg aesni_aeads[0];
  1053. #endif
  1054. static struct simd_aead_alg *aesni_simd_aeads[ARRAY_SIZE(aesni_aeads)];
  1055. static const struct x86_cpu_id aesni_cpu_id[] = {
  1056. X86_MATCH_FEATURE(X86_FEATURE_AES, NULL),
  1057. {}
  1058. };
  1059. MODULE_DEVICE_TABLE(x86cpu, aesni_cpu_id);
  1060. static int __init aesni_init(void)
  1061. {
  1062. int err;
  1063. if (!x86_match_cpu(aesni_cpu_id))
  1064. return -ENODEV;
  1065. #ifdef CONFIG_X86_64
  1066. if (boot_cpu_has(X86_FEATURE_AVX2)) {
  1067. pr_info("AVX2 version of gcm_enc/dec engaged.\n");
  1068. static_branch_enable(&gcm_use_avx);
  1069. static_branch_enable(&gcm_use_avx2);
  1070. } else
  1071. if (boot_cpu_has(X86_FEATURE_AVX)) {
  1072. pr_info("AVX version of gcm_enc/dec engaged.\n");
  1073. static_branch_enable(&gcm_use_avx);
  1074. } else {
  1075. pr_info("SSE version of gcm_enc/dec engaged.\n");
  1076. }
  1077. if (boot_cpu_has(X86_FEATURE_AVX)) {
  1078. /* optimize performance of ctr mode encryption transform */
  1079. static_call_update(aesni_ctr_enc_tfm, aesni_ctr_enc_avx_tfm);
  1080. pr_info("AES CTR mode by8 optimization enabled\n");
  1081. }
  1082. #endif /* CONFIG_X86_64 */
  1083. err = crypto_register_alg(&aesni_cipher_alg);
  1084. if (err)
  1085. return err;
  1086. err = simd_register_skciphers_compat(aesni_skciphers,
  1087. ARRAY_SIZE(aesni_skciphers),
  1088. aesni_simd_skciphers);
  1089. if (err)
  1090. goto unregister_cipher;
  1091. err = simd_register_aeads_compat(aesni_aeads, ARRAY_SIZE(aesni_aeads),
  1092. aesni_simd_aeads);
  1093. if (err)
  1094. goto unregister_skciphers;
  1095. #ifdef CONFIG_X86_64
  1096. if (boot_cpu_has(X86_FEATURE_AVX))
  1097. err = simd_register_skciphers_compat(&aesni_xctr, 1,
  1098. &aesni_simd_xctr);
  1099. if (err)
  1100. goto unregister_aeads;
  1101. #endif /* CONFIG_X86_64 */
  1102. return 0;
  1103. #ifdef CONFIG_X86_64
  1104. unregister_aeads:
  1105. simd_unregister_aeads(aesni_aeads, ARRAY_SIZE(aesni_aeads),
  1106. aesni_simd_aeads);
  1107. #endif /* CONFIG_X86_64 */
  1108. unregister_skciphers:
  1109. simd_unregister_skciphers(aesni_skciphers, ARRAY_SIZE(aesni_skciphers),
  1110. aesni_simd_skciphers);
  1111. unregister_cipher:
  1112. crypto_unregister_alg(&aesni_cipher_alg);
  1113. return err;
  1114. }
  1115. static void __exit aesni_exit(void)
  1116. {
  1117. simd_unregister_aeads(aesni_aeads, ARRAY_SIZE(aesni_aeads),
  1118. aesni_simd_aeads);
  1119. simd_unregister_skciphers(aesni_skciphers, ARRAY_SIZE(aesni_skciphers),
  1120. aesni_simd_skciphers);
  1121. crypto_unregister_alg(&aesni_cipher_alg);
  1122. #ifdef CONFIG_X86_64
  1123. if (boot_cpu_has(X86_FEATURE_AVX))
  1124. simd_unregister_skciphers(&aesni_xctr, 1, &aesni_simd_xctr);
  1125. #endif /* CONFIG_X86_64 */
  1126. }
  1127. late_initcall(aesni_init);
  1128. module_exit(aesni_exit);
  1129. MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm, Intel AES-NI instructions optimized");
  1130. MODULE_LICENSE("GPL");
  1131. MODULE_ALIAS_CRYPTO("aes");