pm.c 4.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * arch/sh/kernel/cpu/shmobile/pm.c
  4. *
  5. * Power management support code for SuperH Mobile
  6. *
  7. * Copyright (C) 2009 Magnus Damm
  8. */
  9. #include <linux/init.h>
  10. #include <linux/kernel.h>
  11. #include <linux/io.h>
  12. #include <linux/suspend.h>
  13. #include <asm/suspend.h>
  14. #include <linux/uaccess.h>
  15. #include <asm/cacheflush.h>
  16. #include <asm/bl_bit.h>
  17. /*
  18. * Notifier lists for pre/post sleep notification
  19. */
  20. ATOMIC_NOTIFIER_HEAD(sh_mobile_pre_sleep_notifier_list);
  21. ATOMIC_NOTIFIER_HEAD(sh_mobile_post_sleep_notifier_list);
  22. /*
  23. * Sleep modes available on SuperH Mobile:
  24. *
  25. * Sleep mode is just plain "sleep" instruction
  26. * Sleep Self-Refresh mode is above plus RAM put in Self-Refresh
  27. * Standby Self-Refresh mode is above plus stopped clocks
  28. */
  29. #define SUSP_MODE_SLEEP (SUSP_SH_SLEEP)
  30. #define SUSP_MODE_SLEEP_SF (SUSP_SH_SLEEP | SUSP_SH_SF)
  31. #define SUSP_MODE_STANDBY_SF (SUSP_SH_STANDBY | SUSP_SH_SF)
  32. #define SUSP_MODE_RSTANDBY_SF \
  33. (SUSP_SH_RSTANDBY | SUSP_SH_MMU | SUSP_SH_REGS | SUSP_SH_SF)
  34. /*
  35. * U-standby mode is unsupported since it needs bootloader hacks
  36. */
  37. #ifdef CONFIG_CPU_SUBTYPE_SH7724
  38. #define RAM_BASE 0xfd800000 /* RSMEM */
  39. #else
  40. #define RAM_BASE 0xe5200000 /* ILRAM */
  41. #endif
  42. void sh_mobile_call_standby(unsigned long mode)
  43. {
  44. void *onchip_mem = (void *)RAM_BASE;
  45. struct sh_sleep_data *sdp = onchip_mem;
  46. void (*standby_onchip_mem)(unsigned long, unsigned long);
  47. /* code located directly after data structure */
  48. standby_onchip_mem = (void *)(sdp + 1);
  49. atomic_notifier_call_chain(&sh_mobile_pre_sleep_notifier_list,
  50. mode, NULL);
  51. /* flush the caches if MMU flag is set */
  52. if (mode & SUSP_SH_MMU)
  53. flush_cache_all();
  54. /* Let assembly snippet in on-chip memory handle the rest */
  55. standby_onchip_mem(mode, RAM_BASE);
  56. atomic_notifier_call_chain(&sh_mobile_post_sleep_notifier_list,
  57. mode, NULL);
  58. }
  59. extern char sh_mobile_sleep_enter_start;
  60. extern char sh_mobile_sleep_enter_end;
  61. extern char sh_mobile_sleep_resume_start;
  62. extern char sh_mobile_sleep_resume_end;
  63. unsigned long sh_mobile_sleep_supported = SUSP_SH_SLEEP;
  64. void sh_mobile_register_self_refresh(unsigned long flags,
  65. void *pre_start, void *pre_end,
  66. void *post_start, void *post_end)
  67. {
  68. void *onchip_mem = (void *)RAM_BASE;
  69. void *vp;
  70. struct sh_sleep_data *sdp;
  71. int n;
  72. /* part 0: data area */
  73. sdp = onchip_mem;
  74. sdp->addr.stbcr = 0xa4150020; /* STBCR */
  75. sdp->addr.bar = 0xa4150040; /* BAR */
  76. sdp->addr.pteh = 0xff000000; /* PTEH */
  77. sdp->addr.ptel = 0xff000004; /* PTEL */
  78. sdp->addr.ttb = 0xff000008; /* TTB */
  79. sdp->addr.tea = 0xff00000c; /* TEA */
  80. sdp->addr.mmucr = 0xff000010; /* MMUCR */
  81. sdp->addr.ptea = 0xff000034; /* PTEA */
  82. sdp->addr.pascr = 0xff000070; /* PASCR */
  83. sdp->addr.irmcr = 0xff000078; /* IRMCR */
  84. sdp->addr.ccr = 0xff00001c; /* CCR */
  85. sdp->addr.ramcr = 0xff000074; /* RAMCR */
  86. vp = sdp + 1;
  87. /* part 1: common code to enter sleep mode */
  88. n = &sh_mobile_sleep_enter_end - &sh_mobile_sleep_enter_start;
  89. memcpy(vp, &sh_mobile_sleep_enter_start, n);
  90. vp += roundup(n, 4);
  91. /* part 2: board specific code to enter self-refresh mode */
  92. n = pre_end - pre_start;
  93. memcpy(vp, pre_start, n);
  94. sdp->sf_pre = (unsigned long)vp;
  95. vp += roundup(n, 4);
  96. /* part 3: board specific code to resume from self-refresh mode */
  97. n = post_end - post_start;
  98. memcpy(vp, post_start, n);
  99. sdp->sf_post = (unsigned long)vp;
  100. vp += roundup(n, 4);
  101. /* part 4: common code to resume from sleep mode */
  102. WARN_ON(vp > (onchip_mem + 0x600));
  103. vp = onchip_mem + 0x600; /* located at interrupt vector */
  104. n = &sh_mobile_sleep_resume_end - &sh_mobile_sleep_resume_start;
  105. memcpy(vp, &sh_mobile_sleep_resume_start, n);
  106. sdp->resume = (unsigned long)vp;
  107. sh_mobile_sleep_supported |= flags;
  108. }
  109. static int sh_pm_enter(suspend_state_t state)
  110. {
  111. if (!(sh_mobile_sleep_supported & SUSP_MODE_STANDBY_SF))
  112. return -ENXIO;
  113. local_irq_disable();
  114. set_bl_bit();
  115. sh_mobile_call_standby(SUSP_MODE_STANDBY_SF);
  116. local_irq_disable();
  117. clear_bl_bit();
  118. return 0;
  119. }
  120. static const struct platform_suspend_ops sh_pm_ops = {
  121. .enter = sh_pm_enter,
  122. .valid = suspend_valid_only_mem,
  123. };
  124. static int __init sh_pm_init(void)
  125. {
  126. suspend_set_ops(&sh_pm_ops);
  127. return sh_mobile_setup_cpuidle();
  128. }
  129. late_initcall(sh_pm_init);