setup-sh7705.c 4.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * SH7705 Setup
  4. *
  5. * Copyright (C) 2006 - 2009 Paul Mundt
  6. * Copyright (C) 2007 Nobuhiro Iwamatsu
  7. */
  8. #include <linux/platform_device.h>
  9. #include <linux/init.h>
  10. #include <linux/irq.h>
  11. #include <linux/serial.h>
  12. #include <linux/serial_sci.h>
  13. #include <linux/sh_timer.h>
  14. #include <linux/sh_intc.h>
  15. #include <asm/rtc.h>
  16. #include <cpu/serial.h>
  17. #include <asm/platform_early.h>
  18. enum {
  19. UNUSED = 0,
  20. /* interrupt sources */
  21. IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
  22. PINT07, PINT815,
  23. DMAC, SCIF0, SCIF2, ADC_ADI, USB,
  24. TPU0, TPU1, TPU2, TPU3,
  25. TMU0, TMU1, TMU2,
  26. RTC, WDT, REF_RCMI,
  27. };
  28. static struct intc_vect vectors[] __initdata = {
  29. /* IRQ0->5 are handled in setup-sh3.c */
  30. INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720),
  31. INTC_VECT(DMAC, 0x800), INTC_VECT(DMAC, 0x820),
  32. INTC_VECT(DMAC, 0x840), INTC_VECT(DMAC, 0x860),
  33. INTC_VECT(SCIF0, 0x880), INTC_VECT(SCIF0, 0x8a0),
  34. INTC_VECT(SCIF0, 0x8e0),
  35. INTC_VECT(SCIF2, 0x900), INTC_VECT(SCIF2, 0x920),
  36. INTC_VECT(SCIF2, 0x960),
  37. INTC_VECT(ADC_ADI, 0x980),
  38. INTC_VECT(USB, 0xa20), INTC_VECT(USB, 0xa40),
  39. INTC_VECT(TPU0, 0xc00), INTC_VECT(TPU1, 0xc20),
  40. INTC_VECT(TPU2, 0xc80), INTC_VECT(TPU3, 0xca0),
  41. INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
  42. INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460),
  43. INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
  44. INTC_VECT(RTC, 0x4c0),
  45. INTC_VECT(WDT, 0x560),
  46. INTC_VECT(REF_RCMI, 0x580),
  47. };
  48. static struct intc_prio_reg prio_registers[] __initdata = {
  49. { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
  50. { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, 0, 0 } },
  51. { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
  52. { 0xa4000018, 0, 16, 4, /* IPRD */ { PINT07, PINT815, IRQ5, IRQ4 } },
  53. { 0xa400001a, 0, 16, 4, /* IPRE */ { DMAC, SCIF0, SCIF2, ADC_ADI } },
  54. { 0xa4080000, 0, 16, 4, /* IPRF */ { 0, 0, USB } },
  55. { 0xa4080002, 0, 16, 4, /* IPRG */ { TPU0, TPU1 } },
  56. { 0xa4080004, 0, 16, 4, /* IPRH */ { TPU2, TPU3 } },
  57. };
  58. static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, NULL,
  59. NULL, prio_registers, NULL);
  60. static struct plat_sci_port scif0_platform_data = {
  61. .scscr = SCSCR_CKE1,
  62. .type = PORT_SCIF,
  63. .ops = &sh770x_sci_port_ops,
  64. .regtype = SCIx_SH7705_SCIF_REGTYPE,
  65. };
  66. static struct resource scif0_resources[] = {
  67. DEFINE_RES_MEM(0xa4410000, 0x100),
  68. DEFINE_RES_IRQ(evt2irq(0x900)),
  69. };
  70. static struct platform_device scif0_device = {
  71. .name = "sh-sci",
  72. .id = 0,
  73. .resource = scif0_resources,
  74. .num_resources = ARRAY_SIZE(scif0_resources),
  75. .dev = {
  76. .platform_data = &scif0_platform_data,
  77. },
  78. };
  79. static struct plat_sci_port scif1_platform_data = {
  80. .type = PORT_SCIF,
  81. .ops = &sh770x_sci_port_ops,
  82. .regtype = SCIx_SH7705_SCIF_REGTYPE,
  83. };
  84. static struct resource scif1_resources[] = {
  85. DEFINE_RES_MEM(0xa4400000, 0x100),
  86. DEFINE_RES_IRQ(evt2irq(0x880)),
  87. };
  88. static struct platform_device scif1_device = {
  89. .name = "sh-sci",
  90. .id = 1,
  91. .resource = scif1_resources,
  92. .num_resources = ARRAY_SIZE(scif1_resources),
  93. .dev = {
  94. .platform_data = &scif1_platform_data,
  95. },
  96. };
  97. static struct resource rtc_resources[] = {
  98. [0] = {
  99. .start = 0xfffffec0,
  100. .end = 0xfffffec0 + 0x1e,
  101. .flags = IORESOURCE_IO,
  102. },
  103. [1] = {
  104. .start = evt2irq(0x480),
  105. .flags = IORESOURCE_IRQ,
  106. },
  107. };
  108. static struct sh_rtc_platform_info rtc_info = {
  109. .capabilities = RTC_CAP_4_DIGIT_YEAR,
  110. };
  111. static struct platform_device rtc_device = {
  112. .name = "sh-rtc",
  113. .id = -1,
  114. .num_resources = ARRAY_SIZE(rtc_resources),
  115. .resource = rtc_resources,
  116. .dev = {
  117. .platform_data = &rtc_info,
  118. },
  119. };
  120. static struct sh_timer_config tmu0_platform_data = {
  121. .channels_mask = 7,
  122. };
  123. static struct resource tmu0_resources[] = {
  124. DEFINE_RES_MEM(0xfffffe90, 0x2c),
  125. DEFINE_RES_IRQ(evt2irq(0x400)),
  126. DEFINE_RES_IRQ(evt2irq(0x420)),
  127. DEFINE_RES_IRQ(evt2irq(0x440)),
  128. };
  129. static struct platform_device tmu0_device = {
  130. .name = "sh-tmu-sh3",
  131. .id = 0,
  132. .dev = {
  133. .platform_data = &tmu0_platform_data,
  134. },
  135. .resource = tmu0_resources,
  136. .num_resources = ARRAY_SIZE(tmu0_resources),
  137. };
  138. static struct platform_device *sh7705_devices[] __initdata = {
  139. &scif0_device,
  140. &scif1_device,
  141. &tmu0_device,
  142. &rtc_device,
  143. };
  144. static int __init sh7705_devices_setup(void)
  145. {
  146. return platform_add_devices(sh7705_devices,
  147. ARRAY_SIZE(sh7705_devices));
  148. }
  149. arch_initcall(sh7705_devices_setup);
  150. static struct platform_device *sh7705_early_devices[] __initdata = {
  151. &scif0_device,
  152. &scif1_device,
  153. &tmu0_device,
  154. };
  155. void __init plat_early_device_setup(void)
  156. {
  157. sh_early_platform_add_devices(sh7705_early_devices,
  158. ARRAY_SIZE(sh7705_early_devices));
  159. }
  160. void __init plat_irq_setup(void)
  161. {
  162. register_intc_controller(&intc_desc);
  163. plat_irq_setup_sh3();
  164. }