irq.c 2.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * linux/arch/sh/boards/se/770x/irq.c
  4. *
  5. * Copyright (C) 2000 Kazumoto Kojima
  6. * Copyright (C) 2006 Nobuhiro Iwamatsu
  7. *
  8. * Hitachi SolutionEngine Support.
  9. *
  10. */
  11. #include <linux/init.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/irq.h>
  14. #include <asm/irq.h>
  15. #include <asm/io.h>
  16. #include <mach-se/mach/se.h>
  17. static struct ipr_data ipr_irq_table[] = {
  18. /*
  19. * Super I/O (Just mimic PC):
  20. * 1: keyboard
  21. * 3: serial 0
  22. * 4: serial 1
  23. * 5: printer
  24. * 6: floppy
  25. * 8: rtc
  26. * 12: mouse
  27. * 14: ide0
  28. */
  29. #if defined(CONFIG_CPU_SUBTYPE_SH7705)
  30. /* This is default value */
  31. { 13, 0, 8, 0x0f-13, },
  32. { 5 , 0, 4, 0x0f- 5, },
  33. { 10, 1, 0, 0x0f-10, },
  34. { 7 , 2, 4, 0x0f- 7, },
  35. { 3 , 2, 0, 0x0f- 3, },
  36. { 1 , 3, 12, 0x0f- 1, },
  37. { 12, 3, 4, 0x0f-12, }, /* LAN */
  38. { 2 , 4, 8, 0x0f- 2, }, /* PCIRQ2 */
  39. { 6 , 4, 4, 0x0f- 6, }, /* PCIRQ1 */
  40. { 14, 4, 0, 0x0f-14, }, /* PCIRQ0 */
  41. { 0 , 5, 12, 0x0f , },
  42. { 4 , 5, 4, 0x0f- 4, },
  43. { 8 , 6, 12, 0x0f- 8, },
  44. { 9 , 6, 8, 0x0f- 9, },
  45. { 11, 6, 4, 0x0f-11, },
  46. #else
  47. { 14, 0, 8, 0x0f-14, },
  48. { 12, 0, 4, 0x0f-12, },
  49. { 8, 1, 4, 0x0f- 8, },
  50. { 6, 2, 12, 0x0f- 6, },
  51. { 5, 2, 8, 0x0f- 5, },
  52. { 4, 2, 4, 0x0f- 4, },
  53. { 3, 2, 0, 0x0f- 3, },
  54. { 1, 3, 12, 0x0f- 1, },
  55. #if defined(CONFIG_STNIC)
  56. /* ST NIC */
  57. { 10, 3, 4, 0x0f-10, }, /* LAN */
  58. #endif
  59. /* MRSHPC IRQs setting */
  60. { 0, 4, 12, 0x0f- 0, }, /* PCIRQ3 */
  61. { 11, 4, 8, 0x0f-11, }, /* PCIRQ2 */
  62. { 9, 4, 4, 0x0f- 9, }, /* PCIRQ1 */
  63. { 7, 4, 0, 0x0f- 7, }, /* PCIRQ0 */
  64. /* #2, #13 are allocated for SLOT IRQ #1 and #2 (for now) */
  65. /* NOTE: #2 and #13 are not used on PC */
  66. { 13, 6, 4, 0x0f-13, }, /* SLOTIRQ2 */
  67. { 2, 6, 0, 0x0f- 2, }, /* SLOTIRQ1 */
  68. #endif
  69. };
  70. static unsigned long ipr_offsets[] = {
  71. BCR_ILCRA,
  72. BCR_ILCRB,
  73. BCR_ILCRC,
  74. BCR_ILCRD,
  75. BCR_ILCRE,
  76. BCR_ILCRF,
  77. BCR_ILCRG,
  78. };
  79. static struct ipr_desc ipr_irq_desc = {
  80. .ipr_offsets = ipr_offsets,
  81. .nr_offsets = ARRAY_SIZE(ipr_offsets),
  82. .ipr_data = ipr_irq_table,
  83. .nr_irqs = ARRAY_SIZE(ipr_irq_table),
  84. .chip = {
  85. .name = "IPR-se770x",
  86. },
  87. };
  88. /*
  89. * Initialize IRQ setting
  90. */
  91. void __init init_se_IRQ(void)
  92. {
  93. /* Disable all interrupts */
  94. __raw_writew(0, BCR_ILCRA);
  95. __raw_writew(0, BCR_ILCRB);
  96. __raw_writew(0, BCR_ILCRC);
  97. __raw_writew(0, BCR_ILCRD);
  98. __raw_writew(0, BCR_ILCRE);
  99. __raw_writew(0, BCR_ILCRF);
  100. __raw_writew(0, BCR_ILCRG);
  101. register_ipr_controller(&ipr_irq_desc);
  102. }