vcpu_sbi_replace.c 4.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2021 Western Digital Corporation or its affiliates.
  4. *
  5. * Authors:
  6. * Atish Patra <[email protected]>
  7. */
  8. #include <linux/errno.h>
  9. #include <linux/err.h>
  10. #include <linux/kvm_host.h>
  11. #include <asm/csr.h>
  12. #include <asm/sbi.h>
  13. #include <asm/kvm_vcpu_timer.h>
  14. #include <asm/kvm_vcpu_sbi.h>
  15. static int kvm_sbi_ext_time_handler(struct kvm_vcpu *vcpu, struct kvm_run *run,
  16. unsigned long *out_val,
  17. struct kvm_cpu_trap *utrap, bool *exit)
  18. {
  19. int ret = 0;
  20. struct kvm_cpu_context *cp = &vcpu->arch.guest_context;
  21. u64 next_cycle;
  22. if (cp->a6 != SBI_EXT_TIME_SET_TIMER)
  23. return -EINVAL;
  24. #if __riscv_xlen == 32
  25. next_cycle = ((u64)cp->a1 << 32) | (u64)cp->a0;
  26. #else
  27. next_cycle = (u64)cp->a0;
  28. #endif
  29. kvm_riscv_vcpu_timer_next_event(vcpu, next_cycle);
  30. return ret;
  31. }
  32. const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_time = {
  33. .extid_start = SBI_EXT_TIME,
  34. .extid_end = SBI_EXT_TIME,
  35. .handler = kvm_sbi_ext_time_handler,
  36. };
  37. static int kvm_sbi_ext_ipi_handler(struct kvm_vcpu *vcpu, struct kvm_run *run,
  38. unsigned long *out_val,
  39. struct kvm_cpu_trap *utrap, bool *exit)
  40. {
  41. int ret = 0;
  42. unsigned long i;
  43. struct kvm_vcpu *tmp;
  44. struct kvm_cpu_context *cp = &vcpu->arch.guest_context;
  45. unsigned long hmask = cp->a0;
  46. unsigned long hbase = cp->a1;
  47. if (cp->a6 != SBI_EXT_IPI_SEND_IPI)
  48. return -EINVAL;
  49. kvm_for_each_vcpu(i, tmp, vcpu->kvm) {
  50. if (hbase != -1UL) {
  51. if (tmp->vcpu_id < hbase)
  52. continue;
  53. if (!(hmask & (1UL << (tmp->vcpu_id - hbase))))
  54. continue;
  55. }
  56. ret = kvm_riscv_vcpu_set_interrupt(tmp, IRQ_VS_SOFT);
  57. if (ret < 0)
  58. break;
  59. }
  60. return ret;
  61. }
  62. const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_ipi = {
  63. .extid_start = SBI_EXT_IPI,
  64. .extid_end = SBI_EXT_IPI,
  65. .handler = kvm_sbi_ext_ipi_handler,
  66. };
  67. static int kvm_sbi_ext_rfence_handler(struct kvm_vcpu *vcpu, struct kvm_run *run,
  68. unsigned long *out_val,
  69. struct kvm_cpu_trap *utrap, bool *exit)
  70. {
  71. int ret = 0;
  72. struct kvm_cpu_context *cp = &vcpu->arch.guest_context;
  73. unsigned long hmask = cp->a0;
  74. unsigned long hbase = cp->a1;
  75. unsigned long funcid = cp->a6;
  76. switch (funcid) {
  77. case SBI_EXT_RFENCE_REMOTE_FENCE_I:
  78. kvm_riscv_fence_i(vcpu->kvm, hbase, hmask);
  79. break;
  80. case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA:
  81. if (cp->a2 == 0 && cp->a3 == 0)
  82. kvm_riscv_hfence_vvma_all(vcpu->kvm, hbase, hmask);
  83. else
  84. kvm_riscv_hfence_vvma_gva(vcpu->kvm, hbase, hmask,
  85. cp->a2, cp->a3, PAGE_SHIFT);
  86. break;
  87. case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID:
  88. if (cp->a2 == 0 && cp->a3 == 0)
  89. kvm_riscv_hfence_vvma_asid_all(vcpu->kvm,
  90. hbase, hmask, cp->a4);
  91. else
  92. kvm_riscv_hfence_vvma_asid_gva(vcpu->kvm,
  93. hbase, hmask,
  94. cp->a2, cp->a3,
  95. PAGE_SHIFT, cp->a4);
  96. break;
  97. case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA:
  98. case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID:
  99. case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA:
  100. case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID:
  101. /*
  102. * Until nested virtualization is implemented, the
  103. * SBI HFENCE calls should be treated as NOPs
  104. */
  105. break;
  106. default:
  107. ret = -EOPNOTSUPP;
  108. }
  109. return ret;
  110. }
  111. const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_rfence = {
  112. .extid_start = SBI_EXT_RFENCE,
  113. .extid_end = SBI_EXT_RFENCE,
  114. .handler = kvm_sbi_ext_rfence_handler,
  115. };
  116. static int kvm_sbi_ext_srst_handler(struct kvm_vcpu *vcpu,
  117. struct kvm_run *run,
  118. unsigned long *out_val,
  119. struct kvm_cpu_trap *utrap, bool *exit)
  120. {
  121. struct kvm_cpu_context *cp = &vcpu->arch.guest_context;
  122. unsigned long funcid = cp->a6;
  123. u32 reason = cp->a1;
  124. u32 type = cp->a0;
  125. int ret = 0;
  126. switch (funcid) {
  127. case SBI_EXT_SRST_RESET:
  128. switch (type) {
  129. case SBI_SRST_RESET_TYPE_SHUTDOWN:
  130. kvm_riscv_vcpu_sbi_system_reset(vcpu, run,
  131. KVM_SYSTEM_EVENT_SHUTDOWN,
  132. reason);
  133. *exit = true;
  134. break;
  135. case SBI_SRST_RESET_TYPE_COLD_REBOOT:
  136. case SBI_SRST_RESET_TYPE_WARM_REBOOT:
  137. kvm_riscv_vcpu_sbi_system_reset(vcpu, run,
  138. KVM_SYSTEM_EVENT_RESET,
  139. reason);
  140. *exit = true;
  141. break;
  142. default:
  143. ret = -EOPNOTSUPP;
  144. }
  145. break;
  146. default:
  147. ret = -EOPNOTSUPP;
  148. }
  149. return ret;
  150. }
  151. const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_srst = {
  152. .extid_start = SBI_EXT_SRST,
  153. .extid_end = SBI_EXT_SRST,
  154. .handler = kvm_sbi_ext_srst_handler,
  155. };