cpm1-ic.c 4.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Interrupt controller for the
  4. * Communication Processor Module.
  5. * Copyright (c) 1997 Dan error_act ([email protected])
  6. */
  7. #include <linux/kernel.h>
  8. #include <linux/interrupt.h>
  9. #include <linux/irqdomain.h>
  10. #include <linux/platform_device.h>
  11. #include <asm/cpm1.h>
  12. struct cpm_pic_data {
  13. cpic8xx_t __iomem *reg;
  14. struct irq_domain *host;
  15. };
  16. static void cpm_mask_irq(struct irq_data *d)
  17. {
  18. struct cpm_pic_data *data = irq_data_get_irq_chip_data(d);
  19. unsigned int cpm_vec = (unsigned int)irqd_to_hwirq(d);
  20. clrbits32(&data->reg->cpic_cimr, (1 << cpm_vec));
  21. }
  22. static void cpm_unmask_irq(struct irq_data *d)
  23. {
  24. struct cpm_pic_data *data = irq_data_get_irq_chip_data(d);
  25. unsigned int cpm_vec = (unsigned int)irqd_to_hwirq(d);
  26. setbits32(&data->reg->cpic_cimr, (1 << cpm_vec));
  27. }
  28. static void cpm_end_irq(struct irq_data *d)
  29. {
  30. struct cpm_pic_data *data = irq_data_get_irq_chip_data(d);
  31. unsigned int cpm_vec = (unsigned int)irqd_to_hwirq(d);
  32. out_be32(&data->reg->cpic_cisr, (1 << cpm_vec));
  33. }
  34. static struct irq_chip cpm_pic = {
  35. .name = "CPM PIC",
  36. .irq_mask = cpm_mask_irq,
  37. .irq_unmask = cpm_unmask_irq,
  38. .irq_eoi = cpm_end_irq,
  39. };
  40. static int cpm_get_irq(struct irq_desc *desc)
  41. {
  42. struct cpm_pic_data *data = irq_desc_get_handler_data(desc);
  43. int cpm_vec;
  44. /*
  45. * Get the vector by setting the ACK bit and then reading
  46. * the register.
  47. */
  48. out_be16(&data->reg->cpic_civr, 1);
  49. cpm_vec = in_be16(&data->reg->cpic_civr);
  50. cpm_vec >>= 11;
  51. return irq_linear_revmap(data->host, cpm_vec);
  52. }
  53. static void cpm_cascade(struct irq_desc *desc)
  54. {
  55. generic_handle_irq(cpm_get_irq(desc));
  56. }
  57. static int cpm_pic_host_map(struct irq_domain *h, unsigned int virq,
  58. irq_hw_number_t hw)
  59. {
  60. irq_set_chip_data(virq, h->host_data);
  61. irq_set_status_flags(virq, IRQ_LEVEL);
  62. irq_set_chip_and_handler(virq, &cpm_pic, handle_fasteoi_irq);
  63. return 0;
  64. }
  65. static const struct irq_domain_ops cpm_pic_host_ops = {
  66. .map = cpm_pic_host_map,
  67. };
  68. static int cpm_pic_probe(struct platform_device *pdev)
  69. {
  70. struct device *dev = &pdev->dev;
  71. struct resource *res;
  72. int irq;
  73. struct cpm_pic_data *data;
  74. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  75. if (!res)
  76. return -ENODEV;
  77. data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
  78. if (!data)
  79. return -ENOMEM;
  80. data->reg = devm_ioremap(dev, res->start, resource_size(res));
  81. if (!data->reg)
  82. return -ENODEV;
  83. irq = platform_get_irq(pdev, 0);
  84. if (irq < 0)
  85. return irq;
  86. /* Initialize the CPM interrupt controller. */
  87. out_be32(&data->reg->cpic_cicr,
  88. (CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) |
  89. ((virq_to_hw(irq) / 2) << 13) | CICR_HP_MASK);
  90. out_be32(&data->reg->cpic_cimr, 0);
  91. data->host = irq_domain_add_linear(dev->of_node, 64, &cpm_pic_host_ops, data);
  92. if (!data->host)
  93. return -ENODEV;
  94. irq_set_handler_data(irq, data);
  95. irq_set_chained_handler(irq, cpm_cascade);
  96. setbits32(&data->reg->cpic_cicr, CICR_IEN);
  97. return 0;
  98. }
  99. static const struct of_device_id cpm_pic_match[] = {
  100. {
  101. .compatible = "fsl,cpm1-pic",
  102. }, {
  103. .type = "cpm-pic",
  104. .compatible = "CPM",
  105. }, {},
  106. };
  107. static struct platform_driver cpm_pic_driver = {
  108. .driver = {
  109. .name = "cpm-pic",
  110. .of_match_table = cpm_pic_match,
  111. },
  112. .probe = cpm_pic_probe,
  113. };
  114. static int __init cpm_pic_init(void)
  115. {
  116. return platform_driver_register(&cpm_pic_driver);
  117. }
  118. arch_initcall(cpm_pic_init);
  119. /*
  120. * The CPM can generate the error interrupt when there is a race condition
  121. * between generating and masking interrupts. All we have to do is ACK it
  122. * and return. This is a no-op function so we don't need any special
  123. * tests in the interrupt handler.
  124. */
  125. static irqreturn_t cpm_error_interrupt(int irq, void *dev)
  126. {
  127. return IRQ_HANDLED;
  128. }
  129. static int cpm_error_probe(struct platform_device *pdev)
  130. {
  131. int irq;
  132. irq = platform_get_irq(pdev, 0);
  133. if (irq < 0)
  134. return irq;
  135. return request_irq(irq, cpm_error_interrupt, IRQF_NO_THREAD, "error", NULL);
  136. }
  137. static const struct of_device_id cpm_error_ids[] = {
  138. { .compatible = "fsl,cpm1" },
  139. { .type = "cpm" },
  140. {},
  141. };
  142. static struct platform_driver cpm_error_driver = {
  143. .driver = {
  144. .name = "cpm-error",
  145. .of_match_table = cpm_error_ids,
  146. },
  147. .probe = cpm_error_probe,
  148. };
  149. static int __init cpm_error_init(void)
  150. {
  151. return platform_driver_register(&cpm_error_driver);
  152. }
  153. subsys_initcall(cpm_error_init);