pdm360ng.dts 3.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Device Tree Source for IFM PDM360NG.
  4. *
  5. * Copyright 2009 - 2010 DENX Software Engineering.
  6. * Anatolij Gustschin <[email protected]>
  7. *
  8. * Based on MPC5121E ADS dts.
  9. * Copyright 2008 Freescale Semiconductor Inc.
  10. */
  11. #include "mpc5121.dtsi"
  12. / {
  13. model = "pdm360ng";
  14. compatible = "ifm,pdm360ng", "fsl,mpc5121";
  15. #address-cells = <1>;
  16. #size-cells = <1>;
  17. interrupt-parent = <&ipic>;
  18. memory {
  19. device_type = "memory";
  20. reg = <0x00000000 0x20000000>; // 512MB at 0
  21. };
  22. nfc@40000000 {
  23. bank-width = <0x1>;
  24. chips = <0x1>;
  25. partition@0 {
  26. label = "nand0";
  27. reg = <0x0 0x40000000>;
  28. };
  29. };
  30. localbus@80000020 {
  31. ranges = <0x0 0x0 0xf0000000 0x10000000 /* Flash */
  32. 0x2 0x0 0x50040000 0x00020000>; /* CS2: MRAM */
  33. flash@0,0 {
  34. compatible = "amd,s29gl01gp", "cfi-flash";
  35. reg = <0 0x00000000 0x08000000
  36. 0 0x08000000 0x08000000>;
  37. #address-cells = <1>;
  38. #size-cells = <1>;
  39. bank-width = <4>;
  40. device-width = <2>;
  41. partition@0 {
  42. label = "u-boot";
  43. reg = <0x00000000 0x00080000>;
  44. read-only;
  45. };
  46. partition@80000 {
  47. label = "environment";
  48. reg = <0x00080000 0x00080000>;
  49. read-only;
  50. };
  51. partition@100000 {
  52. label = "splash-image";
  53. reg = <0x00100000 0x00080000>;
  54. read-only;
  55. };
  56. partition@180000 {
  57. label = "device-tree";
  58. reg = <0x00180000 0x00040000>;
  59. };
  60. partition@1c0000 {
  61. label = "kernel";
  62. reg = <0x001c0000 0x00500000>;
  63. };
  64. partition@6c0000 {
  65. label = "filesystem";
  66. reg = <0x006c0000 0x07940000>;
  67. };
  68. };
  69. mram0@2,0 {
  70. compatible = "mtd-ram";
  71. reg = <2 0x00000 0x10000>;
  72. bank-width = <2>;
  73. };
  74. mram1@2,10000 {
  75. compatible = "mtd-ram";
  76. reg = <2 0x010000 0x10000>;
  77. bank-width = <2>;
  78. };
  79. };
  80. soc@80000000 {
  81. i2c@1700 {
  82. fsl,preserve-clocking;
  83. eeprom@50 {
  84. compatible = "atmel,24c01";
  85. reg = <0x50>;
  86. };
  87. rtc@68 {
  88. compatible = "st,m41t00";
  89. reg = <0x68>;
  90. };
  91. };
  92. i2c@1720 {
  93. status = "disabled";
  94. };
  95. i2c@1740 {
  96. fsl,preserve-clocking;
  97. };
  98. ethernet@2800 {
  99. phy-handle = <&phy0>;
  100. };
  101. mdio@2800 {
  102. phy0: ethernet-phy@1f {
  103. compatible = "smsc,lan8700";
  104. reg = <0x1f>;
  105. };
  106. };
  107. /* USB1 using external ULPI PHY */
  108. usb@3000 {
  109. dr_mode = "host";
  110. };
  111. /* USB0 using internal UTMI PHY */
  112. usb@4000 {
  113. fsl,invert-pwr-fault;
  114. };
  115. psc@11000 {
  116. compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
  117. };
  118. psc@11100 {
  119. compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
  120. };
  121. psc@11200 {
  122. compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
  123. };
  124. psc@11300 {
  125. compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
  126. };
  127. psc@11400 {
  128. compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
  129. };
  130. psc@11500 {
  131. status = "disabled";
  132. };
  133. psc@11600 {
  134. compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
  135. };
  136. psc@11700 {
  137. status = "disabled";
  138. };
  139. psc@11800 {
  140. compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
  141. };
  142. psc@11900 {
  143. compatible = "fsl,mpc5121-psc-spi", "fsl,mpc5121-psc";
  144. #address-cells = <1>;
  145. #size-cells = <0>;
  146. /* ADS7845 touch screen controller */
  147. ts@0 {
  148. compatible = "ti,ads7846";
  149. reg = <0x0>;
  150. spi-max-frequency = <3000000>;
  151. /* pen irq is GPIO25 */
  152. interrupts = <78 0x8>;
  153. };
  154. };
  155. psc@11a00 {
  156. status = "disabled";
  157. };
  158. psc@11b00 {
  159. compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
  160. };
  161. };
  162. };