t1042d4rdb.dts 2.9 KB

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  1. /*
  2. * T1042D4RDB Device Tree Source
  3. *
  4. * Copyright 2015 Freescale Semiconductor Inc.
  5. *
  6. * Redistribution and use in source and binary forms, with or without
  7. * modification, are permitted provided that the following conditions are met:
  8. * * Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. * * Redistributions in binary form must reproduce the above copyright
  11. * notice, this list of conditions and the following disclaimer in the
  12. * documentation and/or other materials provided with the distribution.
  13. * * Neither the name of Freescale Semiconductor nor the
  14. * names of its contributors may be used to endorse or promote products
  15. * derived from this software without specific prior written permission.
  16. *
  17. *
  18. * ALTERNATIVELY, this software may be distributed under the terms of the
  19. * GNU General Public License ("GPL") as published by the Free Software
  20. * Foundation, either version 2 of that License or (at your option) any
  21. * later version.
  22. *
  23. * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
  24. * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  25. * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  26. * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  27. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  28. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  29. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  30. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  32. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33. */
  34. /include/ "t104xsi-pre.dtsi"
  35. /include/ "t104xd4rdb.dtsi"
  36. / {
  37. model = "fsl,T1042D4RDB";
  38. compatible = "fsl,T1042D4RDB";
  39. #address-cells = <2>;
  40. #size-cells = <2>;
  41. interrupt-parent = <&mpic>;
  42. ifc: localbus@ffe124000 {
  43. cpld@3,0 {
  44. compatible = "fsl,t1040d4rdb-cpld",
  45. "fsl,deepsleep-cpld";
  46. };
  47. };
  48. soc: soc@ffe000000 {
  49. fman0: fman@400000 {
  50. ethernet@e0000 {
  51. phy-handle = <&phy_sgmii_0>;
  52. phy-connection-type = "sgmii";
  53. };
  54. ethernet@e2000 {
  55. phy-handle = <&phy_sgmii_1>;
  56. phy-connection-type = "sgmii";
  57. };
  58. ethernet@e4000 {
  59. phy-handle = <&phy_sgmii_2>;
  60. phy-connection-type = "sgmii";
  61. };
  62. ethernet@e6000 {
  63. phy-handle = <&phy_rgmii_0>;
  64. phy-connection-type = "rgmii";
  65. };
  66. ethernet@e8000 {
  67. phy-handle = <&phy_rgmii_1>;
  68. phy-connection-type = "rgmii";
  69. };
  70. mdio0: mdio@fc000 {
  71. phy_sgmii_0: ethernet-phy@2 {
  72. reg = <0x02>;
  73. };
  74. phy_sgmii_1: ethernet-phy@3 {
  75. reg = <0x03>;
  76. };
  77. phy_sgmii_2: ethernet-phy@1 {
  78. reg = <0x01>;
  79. };
  80. phy_rgmii_0: ethernet-phy@4 {
  81. reg = <0x04>;
  82. };
  83. phy_rgmii_1: ethernet-phy@5 {
  84. reg = <0x05>;
  85. };
  86. };
  87. };
  88. };
  89. };
  90. #include "t1042si-post.dtsi"