t1023si-post.dtsi 13 KB

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  1. /*
  2. * T1023 Silicon/SoC Device Tree Source (post include)
  3. *
  4. * Copyright 2014 Freescale Semiconductor Inc.
  5. *
  6. * Redistribution and use in source and binary forms, with or without
  7. * modification, are permitted provided that the following conditions are met:
  8. * * Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. * * Redistributions in binary form must reproduce the above copyright
  11. * notice, this list of conditions and the following disclaimer in the
  12. * documentation and/or other materials provided with the distribution.
  13. * * Neither the name of Freescale Semiconductor nor the
  14. * names of its contributors may be used to endorse or promote products
  15. * derived from this software without specific prior written permission.
  16. *
  17. *
  18. * ALTERNATIVELY, this software may be distributed under the terms of the
  19. * GNU General Public License ("GPL") as published by the Free Software
  20. * Foundation, either version 2 of that License or (at your option) any
  21. * later version.
  22. *
  23. * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  24. * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  25. * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  26. * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  27. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  28. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  29. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  30. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  32. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33. */
  34. #include <dt-bindings/thermal/thermal.h>
  35. &bman_fbpr {
  36. compatible = "fsl,bman-fbpr";
  37. alloc-ranges = <0 0 0x10000 0>;
  38. };
  39. &qman_fqd {
  40. compatible = "fsl,qman-fqd";
  41. alloc-ranges = <0 0 0x10000 0>;
  42. };
  43. &qman_pfdr {
  44. compatible = "fsl,qman-pfdr";
  45. alloc-ranges = <0 0 0x10000 0>;
  46. };
  47. &ifc {
  48. #address-cells = <2>;
  49. #size-cells = <1>;
  50. compatible = "fsl,ifc", "simple-bus";
  51. interrupts = <25 2 0 0>;
  52. };
  53. &pci0 {
  54. compatible = "fsl,t1023-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
  55. device_type = "pci";
  56. #size-cells = <2>;
  57. #address-cells = <3>;
  58. bus-range = <0x0 0xff>;
  59. interrupts = <20 2 0 0>;
  60. fsl,iommu-parent = <&pamu0>;
  61. pcie@0 {
  62. reg = <0 0 0 0 0>;
  63. #interrupt-cells = <1>;
  64. #size-cells = <2>;
  65. #address-cells = <3>;
  66. device_type = "pci";
  67. interrupts = <20 2 0 0>;
  68. interrupt-map-mask = <0xf800 0 0 7>;
  69. interrupt-map = <
  70. /* IDSEL 0x0 */
  71. 0000 0 0 1 &mpic 40 1 0 0
  72. 0000 0 0 2 &mpic 1 1 0 0
  73. 0000 0 0 3 &mpic 2 1 0 0
  74. 0000 0 0 4 &mpic 3 1 0 0
  75. >;
  76. };
  77. };
  78. &pci1 {
  79. compatible = "fsl,t1023-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
  80. device_type = "pci";
  81. #size-cells = <2>;
  82. #address-cells = <3>;
  83. bus-range = <0 0xff>;
  84. interrupts = <21 2 0 0>;
  85. fsl,iommu-parent = <&pamu0>;
  86. pcie@0 {
  87. reg = <0 0 0 0 0>;
  88. #interrupt-cells = <1>;
  89. #size-cells = <2>;
  90. #address-cells = <3>;
  91. device_type = "pci";
  92. interrupts = <21 2 0 0>;
  93. interrupt-map-mask = <0xf800 0 0 7>;
  94. interrupt-map = <
  95. /* IDSEL 0x0 */
  96. 0000 0 0 1 &mpic 41 1 0 0
  97. 0000 0 0 2 &mpic 5 1 0 0
  98. 0000 0 0 3 &mpic 6 1 0 0
  99. 0000 0 0 4 &mpic 7 1 0 0
  100. >;
  101. };
  102. };
  103. &pci2 {
  104. compatible = "fsl,t1023-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
  105. device_type = "pci";
  106. #size-cells = <2>;
  107. #address-cells = <3>;
  108. bus-range = <0x0 0xff>;
  109. interrupts = <22 2 0 0>;
  110. fsl,iommu-parent = <&pamu0>;
  111. pcie@0 {
  112. reg = <0 0 0 0 0>;
  113. #interrupt-cells = <1>;
  114. #size-cells = <2>;
  115. #address-cells = <3>;
  116. device_type = "pci";
  117. interrupts = <22 2 0 0>;
  118. interrupt-map-mask = <0xf800 0 0 7>;
  119. interrupt-map = <
  120. /* IDSEL 0x0 */
  121. 0000 0 0 1 &mpic 42 1 0 0
  122. 0000 0 0 2 &mpic 9 1 0 0
  123. 0000 0 0 3 &mpic 10 1 0 0
  124. 0000 0 0 4 &mpic 11 1 0 0
  125. >;
  126. };
  127. };
  128. &dcsr {
  129. #address-cells = <1>;
  130. #size-cells = <1>;
  131. compatible = "fsl,dcsr", "simple-bus";
  132. dcsr-epu@0 {
  133. compatible = "fsl,t1023-dcsr-epu", "fsl,dcsr-epu";
  134. interrupts = <52 2 0 0
  135. 84 2 0 0
  136. 85 2 0 0>;
  137. reg = <0x0 0x1000>;
  138. };
  139. dcsr-npc {
  140. compatible = "fsl,t1023-dcsr-cnpc", "fsl,dcsr-cnpc";
  141. reg = <0x1000 0x1000 0x1002000 0x10000>;
  142. };
  143. dcsr-nxc@2000 {
  144. compatible = "fsl,dcsr-nxc";
  145. reg = <0x2000 0x1000>;
  146. };
  147. dcsr-corenet {
  148. compatible = "fsl,dcsr-corenet";
  149. reg = <0x8000 0x1000 0x1A000 0x1000>;
  150. };
  151. dcsr-ocn@11000 {
  152. compatible = "fsl,t1023-dcsr-ocn", "fsl,dcsr-ocn";
  153. reg = <0x11000 0x1000>;
  154. };
  155. dcsr-ddr@12000 {
  156. compatible = "fsl,dcsr-ddr";
  157. dev-handle = <&ddr1>;
  158. reg = <0x12000 0x1000>;
  159. };
  160. dcsr-nal@18000 {
  161. compatible = "fsl,t1023-dcsr-nal", "fsl,dcsr-nal";
  162. reg = <0x18000 0x1000>;
  163. };
  164. dcsr-rcpm@22000 {
  165. compatible = "fsl,t1023-dcsr-rcpm", "fsl,dcsr-rcpm";
  166. reg = <0x22000 0x1000>;
  167. };
  168. dcsr-snpc@30000 {
  169. compatible = "fsl,t1023-dcsr-snpc", "fsl,dcsr-snpc";
  170. reg = <0x30000 0x1000 0x1022000 0x10000>;
  171. };
  172. dcsr-snpc@31000 {
  173. compatible = "fsl,t1023-dcsr-snpc", "fsl,dcsr-snpc";
  174. reg = <0x31000 0x1000 0x1042000 0x10000>;
  175. };
  176. dcsr-cpu-sb-proxy@100000 {
  177. compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
  178. cpu-handle = <&cpu0>;
  179. reg = <0x100000 0x1000 0x101000 0x1000>;
  180. };
  181. dcsr-cpu-sb-proxy@108000 {
  182. compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
  183. cpu-handle = <&cpu1>;
  184. reg = <0x108000 0x1000 0x109000 0x1000>;
  185. };
  186. };
  187. &bportals {
  188. #address-cells = <0x1>;
  189. #size-cells = <0x1>;
  190. compatible = "simple-bus";
  191. bman-portal@0 {
  192. cell-index = <0x0>;
  193. compatible = "fsl,bman-portal";
  194. reg = <0x0 0x4000>, <0x1000000 0x1000>;
  195. interrupts = <105 2 0 0>;
  196. };
  197. bman-portal@4000 {
  198. cell-index = <0x1>;
  199. compatible = "fsl,bman-portal";
  200. reg = <0x4000 0x4000>, <0x1001000 0x1000>;
  201. interrupts = <107 2 0 0>;
  202. };
  203. bman-portal@8000 {
  204. cell-index = <2>;
  205. compatible = "fsl,bman-portal";
  206. reg = <0x8000 0x4000>, <0x1002000 0x1000>;
  207. interrupts = <109 2 0 0>;
  208. };
  209. bman-portal@c000 {
  210. cell-index = <0x3>;
  211. compatible = "fsl,bman-portal";
  212. reg = <0xc000 0x4000>, <0x1003000 0x1000>;
  213. interrupts = <111 2 0 0>;
  214. };
  215. bman-portal@10000 {
  216. cell-index = <0x4>;
  217. compatible = "fsl,bman-portal";
  218. reg = <0x10000 0x4000>, <0x1004000 0x1000>;
  219. interrupts = <113 2 0 0>;
  220. };
  221. bman-portal@14000 {
  222. cell-index = <0x5>;
  223. compatible = "fsl,bman-portal";
  224. reg = <0x14000 0x4000>, <0x1005000 0x1000>;
  225. interrupts = <115 2 0 0>;
  226. };
  227. };
  228. &qportals {
  229. #address-cells = <0x1>;
  230. #size-cells = <0x1>;
  231. compatible = "simple-bus";
  232. qportal0: qman-portal@0 {
  233. compatible = "fsl,qman-portal";
  234. reg = <0x0 0x4000>, <0x1000000 0x1000>;
  235. interrupts = <104 0x2 0 0>;
  236. cell-index = <0x0>;
  237. };
  238. qportal1: qman-portal@4000 {
  239. compatible = "fsl,qman-portal";
  240. reg = <0x4000 0x4000>, <0x1001000 0x1000>;
  241. interrupts = <106 0x2 0 0>;
  242. cell-index = <0x1>;
  243. };
  244. qportal2: qman-portal@8000 {
  245. compatible = "fsl,qman-portal";
  246. reg = <0x8000 0x4000>, <0x1002000 0x1000>;
  247. interrupts = <108 0x2 0 0>;
  248. cell-index = <0x2>;
  249. };
  250. qportal3: qman-portal@c000 {
  251. compatible = "fsl,qman-portal";
  252. reg = <0xc000 0x4000>, <0x1003000 0x1000>;
  253. interrupts = <110 0x2 0 0>;
  254. cell-index = <0x3>;
  255. };
  256. qportal4: qman-portal@10000 {
  257. compatible = "fsl,qman-portal";
  258. reg = <0x10000 0x4000>, <0x1004000 0x1000>;
  259. interrupts = <112 0x2 0 0>;
  260. cell-index = <0x4>;
  261. };
  262. qportal5: qman-portal@14000 {
  263. compatible = "fsl,qman-portal";
  264. reg = <0x14000 0x4000>, <0x1005000 0x1000>;
  265. interrupts = <114 0x2 0 0>;
  266. cell-index = <0x5>;
  267. };
  268. };
  269. &soc {
  270. #address-cells = <1>;
  271. #size-cells = <1>;
  272. device_type = "soc";
  273. compatible = "simple-bus";
  274. soc-sram-error {
  275. compatible = "fsl,soc-sram-error";
  276. interrupts = <16 2 1 29>;
  277. };
  278. corenet-law@0 {
  279. compatible = "fsl,corenet-law";
  280. reg = <0x0 0x1000>;
  281. fsl,num-laws = <16>;
  282. };
  283. ddr1: memory-controller@8000 {
  284. compatible = "fsl,qoriq-memory-controller-v5.0",
  285. "fsl,qoriq-memory-controller";
  286. reg = <0x8000 0x1000>;
  287. interrupts = <16 2 1 23>;
  288. };
  289. cpc: l3-cache-controller@10000 {
  290. compatible = "fsl,t1023-l3-cache-controller", "cache";
  291. reg = <0x10000 0x1000>;
  292. interrupts = <16 2 1 27>;
  293. };
  294. corenet-cf@18000 {
  295. compatible = "fsl,corenet2-cf";
  296. reg = <0x18000 0x1000>;
  297. interrupts = <16 2 1 31>;
  298. };
  299. iommu@20000 {
  300. compatible = "fsl,pamu-v1.0", "fsl,pamu";
  301. reg = <0x20000 0x1000>;
  302. ranges = <0 0x20000 0x1000>;
  303. #address-cells = <1>;
  304. #size-cells = <1>;
  305. interrupts = <
  306. 24 2 0 0
  307. 16 2 1 30>;
  308. pamu0: pamu@0 {
  309. reg = <0 0x1000>;
  310. fsl,primary-cache-geometry = <128 1>;
  311. fsl,secondary-cache-geometry = <32 2>;
  312. };
  313. };
  314. /include/ "qoriq-mpic.dtsi"
  315. guts: global-utilities@e0000 {
  316. compatible = "fsl,t1023-device-config", "fsl,qoriq-device-config-2.0";
  317. reg = <0xe0000 0xe00>;
  318. fsl,has-rstcr;
  319. fsl,liodn-bits = <12>;
  320. };
  321. /include/ "qoriq-clockgen2.dtsi"
  322. global-utilities@e1000 {
  323. compatible = "fsl,t1023-clockgen", "fsl,qoriq-clockgen-2.0";
  324. };
  325. rcpm: global-utilities@e2000 {
  326. compatible = "fsl,t1023-rcpm", "fsl,qoriq-rcpm-2.1";
  327. reg = <0xe2000 0x1000>;
  328. };
  329. sfp: sfp@e8000 {
  330. compatible = "fsl,t1023-sfp";
  331. reg = <0xe8000 0x1000>;
  332. };
  333. serdes: serdes@ea000 {
  334. compatible = "fsl,t1023-serdes";
  335. reg = <0xea000 0x4000>;
  336. };
  337. tmu: tmu@f0000 {
  338. compatible = "fsl,qoriq-tmu";
  339. reg = <0xf0000 0x1000>;
  340. interrupts = <18 2 0 0>;
  341. fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x30061>;
  342. fsl,tmu-calibration = <0x00000000 0x0000000f
  343. 0x00000001 0x00000017
  344. 0x00000002 0x0000001e
  345. 0x00000003 0x00000026
  346. 0x00000004 0x0000002e
  347. 0x00000005 0x00000035
  348. 0x00000006 0x0000003d
  349. 0x00000007 0x00000044
  350. 0x00000008 0x0000004c
  351. 0x00000009 0x00000053
  352. 0x0000000a 0x0000005b
  353. 0x0000000b 0x00000064
  354. 0x00010000 0x00000011
  355. 0x00010001 0x0000001c
  356. 0x00010002 0x00000024
  357. 0x00010003 0x0000002b
  358. 0x00010004 0x00000034
  359. 0x00010005 0x00000039
  360. 0x00010006 0x00000042
  361. 0x00010007 0x0000004c
  362. 0x00010008 0x00000051
  363. 0x00010009 0x0000005a
  364. 0x0001000a 0x00000063
  365. 0x00020000 0x00000013
  366. 0x00020001 0x00000019
  367. 0x00020002 0x00000024
  368. 0x00020003 0x0000002c
  369. 0x00020004 0x00000035
  370. 0x00020005 0x0000003d
  371. 0x00020006 0x00000046
  372. 0x00020007 0x00000050
  373. 0x00020008 0x00000059
  374. 0x00030000 0x00000002
  375. 0x00030001 0x0000000d
  376. 0x00030002 0x00000019
  377. 0x00030003 0x00000024>;
  378. #thermal-sensor-cells = <1>;
  379. };
  380. thermal-zones {
  381. cpu_thermal: cpu-thermal {
  382. polling-delay-passive = <1000>;
  383. polling-delay = <5000>;
  384. thermal-sensors = <&tmu 0>;
  385. trips {
  386. cpu_alert: cpu-alert {
  387. temperature = <85000>;
  388. hysteresis = <2000>;
  389. type = "passive";
  390. };
  391. cpu_crit: cpu-crit {
  392. temperature = <95000>;
  393. hysteresis = <2000>;
  394. type = "critical";
  395. };
  396. };
  397. cooling-maps {
  398. map0 {
  399. trip = <&cpu_alert>;
  400. cooling-device =
  401. <&cpu0 THERMAL_NO_LIMIT
  402. THERMAL_NO_LIMIT>;
  403. };
  404. map1 {
  405. trip = <&cpu_alert>;
  406. cooling-device =
  407. <&cpu1 THERMAL_NO_LIMIT
  408. THERMAL_NO_LIMIT>;
  409. };
  410. };
  411. };
  412. };
  413. scfg: global-utilities@fc000 {
  414. compatible = "fsl,t1023-scfg";
  415. reg = <0xfc000 0x1000>;
  416. };
  417. /include/ "elo3-dma-0.dtsi"
  418. /include/ "elo3-dma-1.dtsi"
  419. /include/ "qoriq-espi-0.dtsi"
  420. spi@110000 {
  421. fsl,espi-num-chipselects = <4>;
  422. };
  423. /include/ "qoriq-esdhc-0.dtsi"
  424. sdhc@114000 {
  425. compatible = "fsl,t1023-esdhc", "fsl,esdhc";
  426. fsl,iommu-parent = <&pamu0>;
  427. fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
  428. sdhci,auto-cmd12;
  429. no-1-8-v;
  430. };
  431. /include/ "qoriq-i2c-0.dtsi"
  432. /include/ "qoriq-i2c-1.dtsi"
  433. /include/ "qoriq-duart-0.dtsi"
  434. /include/ "qoriq-duart-1.dtsi"
  435. /include/ "qoriq-gpio-0.dtsi"
  436. /include/ "qoriq-gpio-1.dtsi"
  437. /include/ "qoriq-gpio-2.dtsi"
  438. /include/ "qoriq-gpio-3.dtsi"
  439. /include/ "qoriq-usb2-mph-0.dtsi"
  440. usb0: usb@210000 {
  441. compatible = "fsl-usb2-mph-v2.5", "fsl-usb2-mph";
  442. fsl,iommu-parent = <&pamu0>;
  443. fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
  444. phy_type = "utmi";
  445. port0;
  446. };
  447. /include/ "qoriq-usb2-dr-0.dtsi"
  448. usb1: usb@211000 {
  449. compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
  450. fsl,iommu-parent = <&pamu0>;
  451. fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */
  452. dr_mode = "host";
  453. phy_type = "utmi";
  454. };
  455. /include/ "qoriq-sata2-0.dtsi"
  456. sata@220000 {
  457. fsl,iommu-parent = <&pamu0>;
  458. fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */
  459. };
  460. /include/ "qoriq-sec5.0-0.dtsi"
  461. /include/ "qoriq-qman3.dtsi"
  462. /include/ "qoriq-bman1.dtsi"
  463. /include/ "qoriq-fman3l-0.dtsi"
  464. /include/ "qoriq-fman3-0-10g-0-best-effort.dtsi"
  465. /include/ "qoriq-fman3-0-1g-1.dtsi"
  466. /include/ "qoriq-fman3-0-1g-2.dtsi"
  467. /include/ "qoriq-fman3-0-1g-3.dtsi"
  468. fman@400000 {
  469. enet0: ethernet@e0000 {
  470. };
  471. enet1: ethernet@e2000 {
  472. };
  473. enet2: ethernet@e4000 {
  474. };
  475. enet3: ethernet@e6000 {
  476. };
  477. };
  478. };