mpc8544ds.dtsi 4.9 KB

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  1. /*
  2. * MPC8544DS Device Tree Source stub (no addresses or top-level ranges)
  3. *
  4. * Copyright 2011 Freescale Semiconductor Inc.
  5. *
  6. * Redistribution and use in source and binary forms, with or without
  7. * modification, are permitted provided that the following conditions are met:
  8. * * Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. * * Redistributions in binary form must reproduce the above copyright
  11. * notice, this list of conditions and the following disclaimer in the
  12. * documentation and/or other materials provided with the distribution.
  13. * * Neither the name of Freescale Semiconductor nor the
  14. * names of its contributors may be used to endorse or promote products
  15. * derived from this software without specific prior written permission.
  16. *
  17. *
  18. * ALTERNATIVELY, this software may be distributed under the terms of the
  19. * GNU General Public License ("GPL") as published by the Free Software
  20. * Foundation, either version 2 of that License or (at your option) any
  21. * later version.
  22. *
  23. * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  24. * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  25. * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  26. * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  27. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  28. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  29. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  30. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  32. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33. */
  34. &board_lbc {
  35. nor@0,0 {
  36. #address-cells = <1>;
  37. #size-cells = <1>;
  38. compatible = "cfi-flash";
  39. reg = <0x0 0x0 0x800000>;
  40. bank-width = <2>;
  41. device-width = <1>;
  42. partition@0 {
  43. reg = <0x0 0x10000>;
  44. label = "dtb-nor";
  45. };
  46. partition@20000 {
  47. reg = <0x20000 0x30000>;
  48. label = "diagnostic-nor";
  49. read-only;
  50. };
  51. partition@200000 {
  52. reg = <0x200000 0x200000>;
  53. label = "dink-nor";
  54. read-only;
  55. };
  56. partition@400000 {
  57. reg = <0x400000 0x380000>;
  58. label = "kernel-nor";
  59. };
  60. partition@780000 {
  61. reg = <0x780000 0x80000>;
  62. label = "u-boot-nor";
  63. read-only;
  64. };
  65. };
  66. };
  67. &board_soc {
  68. enet0: ethernet@24000 {
  69. phy-handle = <&phy0>;
  70. tbi-handle = <&tbi0>;
  71. phy-connection-type = "rgmii-id";
  72. };
  73. mdio@24520 {
  74. phy0: ethernet-phy@0 {
  75. interrupts = <10 1 0 0>;
  76. reg = <0x0>;
  77. };
  78. phy1: ethernet-phy@1 {
  79. interrupts = <10 1 0 0>;
  80. reg = <0x1>;
  81. };
  82. sgmii_phy0: sgmii-phy@0 {
  83. interrupts = <6 1 0 0>;
  84. reg = <0x1c>;
  85. };
  86. sgmii_phy1: sgmii-phy@1 {
  87. interrupts = <6 1 0 0>;
  88. reg = <0x1d>;
  89. };
  90. tbi0: tbi-phy@11 {
  91. reg = <0x11>;
  92. device_type = "tbi-phy";
  93. };
  94. };
  95. enet2: ethernet@26000 {
  96. phy-handle = <&phy1>;
  97. tbi-handle = <&tbi1>;
  98. phy-connection-type = "rgmii-id";
  99. };
  100. mdio@26520 {
  101. tbi1: tbi-phy@11 {
  102. reg = <0x11>;
  103. device_type = "tbi-phy";
  104. };
  105. };
  106. };
  107. &board_pci3 {
  108. pcie@0 {
  109. interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
  110. interrupt-map = <
  111. // IDSEL 0x1c USB
  112. 0xe000 0x0 0x0 0x1 &i8259 0xc 0x2
  113. 0xe100 0x0 0x0 0x2 &i8259 0x9 0x2
  114. 0xe200 0x0 0x0 0x3 &i8259 0xa 0x2
  115. 0xe300 0x0 0x0 0x4 &i8259 0xb 0x2
  116. // IDSEL 0x1d Audio
  117. 0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
  118. // IDSEL 0x1e Legacy
  119. 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
  120. 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
  121. // IDSEL 0x1f IDE/SATA
  122. 0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
  123. 0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
  124. >;
  125. uli1575@0 {
  126. reg = <0x0 0x0 0x0 0x0 0x0>;
  127. #size-cells = <2>;
  128. #address-cells = <3>;
  129. ranges = <0x2000000 0x0 0xb0000000
  130. 0x2000000 0x0 0xb0000000
  131. 0x0 0x100000
  132. 0x1000000 0x0 0x0
  133. 0x1000000 0x0 0x0
  134. 0x0 0x100000>;
  135. isa@1e {
  136. device_type = "isa";
  137. #interrupt-cells = <2>;
  138. #size-cells = <1>;
  139. #address-cells = <2>;
  140. reg = <0xf000 0x0 0x0 0x0 0x0>;
  141. ranges = <0x1 0x0 0x1000000 0x0 0x0
  142. 0x1000>;
  143. interrupt-parent = <&i8259>;
  144. i8259: interrupt-controller@20 {
  145. reg = <0x1 0x20 0x2
  146. 0x1 0xa0 0x2
  147. 0x1 0x4d0 0x2>;
  148. interrupt-controller;
  149. device_type = "interrupt-controller";
  150. #address-cells = <0>;
  151. #interrupt-cells = <2>;
  152. compatible = "chrp,iic";
  153. interrupts = <9 2 0 0>;
  154. interrupt-parent = <&mpic>;
  155. };
  156. i8042@60 {
  157. #size-cells = <0>;
  158. #address-cells = <1>;
  159. reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
  160. interrupts = <1 3 12 3>;
  161. interrupt-parent =
  162. <&i8259>;
  163. keyboard@0 {
  164. reg = <0x0>;
  165. compatible = "pnpPNP,303";
  166. };
  167. mouse@1 {
  168. reg = <0x1>;
  169. compatible = "pnpPNP,f03";
  170. };
  171. };
  172. rtc@70 {
  173. compatible = "pnpPNP,b00";
  174. reg = <0x1 0x70 0x2>;
  175. };
  176. gpio@400 {
  177. reg = <0x1 0x400 0x80>;
  178. };
  179. };
  180. };
  181. };
  182. };