mpc8544ds.dts 2.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * MPC8544 DS Device Tree Source
  4. *
  5. * Copyright 2007, 2008 Freescale Semiconductor Inc.
  6. */
  7. /include/ "mpc8544si-pre.dtsi"
  8. / {
  9. model = "MPC8544DS";
  10. compatible = "MPC8544DS", "MPC85xxDS";
  11. memory {
  12. device_type = "memory";
  13. reg = <0 0 0 0>; // Filled by U-Boot
  14. };
  15. board_lbc: lbc: localbus@e0005000 {
  16. reg = <0 0xe0005000 0 0x1000>;
  17. ranges = <0x0 0x0 0x0 0xff800000 0x800000>;
  18. };
  19. board_soc: soc: soc8544@e0000000 {
  20. ranges = <0x0 0x0 0xe0000000 0x100000>;
  21. };
  22. pci0: pci@e0008000 {
  23. reg = <0 0xe0008000 0 0x1000>;
  24. ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
  25. 0x1000000 0x0 0x00000000 0 0xe1000000 0x0 0x10000>;
  26. clock-frequency = <66666666>;
  27. interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
  28. interrupt-map = <
  29. /* IDSEL 0x11 J17 Slot 1 */
  30. 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
  31. 0x8800 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
  32. 0x8800 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
  33. 0x8800 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
  34. /* IDSEL 0x12 J16 Slot 2 */
  35. 0x9000 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
  36. 0x9000 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
  37. 0x9000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
  38. 0x9000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0>;
  39. };
  40. pci1: pcie@e0009000 {
  41. reg = <0x0 0xe0009000 0x0 0x1000>;
  42. ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
  43. 0x1000000 0x0 0x00000000 0 0xe1010000 0x0 0x10000>;
  44. pcie@0 {
  45. ranges = <0x2000000 0x0 0x80000000
  46. 0x2000000 0x0 0x80000000
  47. 0x0 0x20000000
  48. 0x1000000 0x0 0x0
  49. 0x1000000 0x0 0x0
  50. 0x0 0x10000>;
  51. };
  52. };
  53. pci2: pcie@e000a000 {
  54. reg = <0x0 0xe000a000 0x0 0x1000>;
  55. ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x10000000
  56. 0x1000000 0x0 0x00000000 0 0xe1020000 0x0 0x10000>;
  57. pcie@0 {
  58. ranges = <0x2000000 0x0 0xa0000000
  59. 0x2000000 0x0 0xa0000000
  60. 0x0 0x10000000
  61. 0x1000000 0x0 0x0
  62. 0x1000000 0x0 0x0
  63. 0x0 0x10000>;
  64. };
  65. };
  66. board_pci3: pci3: pcie@e000b000 {
  67. reg = <0x0 0xe000b000 0x0 0x1000>;
  68. ranges = <0x2000000 0x0 0xb0000000 0 0xb0000000 0x0 0x100000
  69. 0x1000000 0x0 0x00000000 0 0xb0100000 0x0 0x100000>;
  70. pcie@0 {
  71. ranges = <0x2000000 0x0 0xb0000000
  72. 0x2000000 0x0 0xb0000000
  73. 0x0 0x100000
  74. 0x1000000 0x0 0x0
  75. 0x1000000 0x0 0x0
  76. 0x0 0x100000>;
  77. };
  78. };
  79. };
  80. /*
  81. * mpc8544ds.dtsi must be last to ensure board_pci3 overrides pci3 settings
  82. * for interrupt-map & interrupt-map-mask
  83. */
  84. /include/ "mpc8544si-post.dtsi"
  85. /include/ "mpc8544ds.dtsi"