ip22-platform.c 4.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. #include <linux/init.h>
  3. #include <linux/if_ether.h>
  4. #include <linux/kernel.h>
  5. #include <linux/platform_device.h>
  6. #include <linux/dma-mapping.h>
  7. #include <asm/paccess.h>
  8. #include <asm/sgi/ip22.h>
  9. #include <asm/sgi/hpc3.h>
  10. #include <asm/sgi/mc.h>
  11. #include <asm/sgi/seeq.h>
  12. #include <asm/sgi/wd.h>
  13. static struct resource sgiwd93_0_resources[] = {
  14. {
  15. .name = "eth0 irq",
  16. .start = SGI_WD93_0_IRQ,
  17. .end = SGI_WD93_0_IRQ,
  18. .flags = IORESOURCE_IRQ
  19. }
  20. };
  21. static struct sgiwd93_platform_data sgiwd93_0_pd = {
  22. .unit = 0,
  23. .irq = SGI_WD93_0_IRQ,
  24. };
  25. static u64 sgiwd93_0_dma_mask = DMA_BIT_MASK(32);
  26. static struct platform_device sgiwd93_0_device = {
  27. .name = "sgiwd93",
  28. .id = 0,
  29. .num_resources = ARRAY_SIZE(sgiwd93_0_resources),
  30. .resource = sgiwd93_0_resources,
  31. .dev = {
  32. .platform_data = &sgiwd93_0_pd,
  33. .dma_mask = &sgiwd93_0_dma_mask,
  34. .coherent_dma_mask = DMA_BIT_MASK(32),
  35. },
  36. };
  37. static struct resource sgiwd93_1_resources[] = {
  38. {
  39. .name = "eth0 irq",
  40. .start = SGI_WD93_1_IRQ,
  41. .end = SGI_WD93_1_IRQ,
  42. .flags = IORESOURCE_IRQ
  43. }
  44. };
  45. static struct sgiwd93_platform_data sgiwd93_1_pd = {
  46. .unit = 1,
  47. .irq = SGI_WD93_1_IRQ,
  48. };
  49. static u64 sgiwd93_1_dma_mask = DMA_BIT_MASK(32);
  50. static struct platform_device sgiwd93_1_device = {
  51. .name = "sgiwd93",
  52. .id = 1,
  53. .num_resources = ARRAY_SIZE(sgiwd93_1_resources),
  54. .resource = sgiwd93_1_resources,
  55. .dev = {
  56. .platform_data = &sgiwd93_1_pd,
  57. .dma_mask = &sgiwd93_1_dma_mask,
  58. .coherent_dma_mask = DMA_BIT_MASK(32),
  59. },
  60. };
  61. /*
  62. * Create a platform device for the GPI port that receives the
  63. * image data from the embedded camera.
  64. */
  65. static int __init sgiwd93_devinit(void)
  66. {
  67. int res;
  68. sgiwd93_0_pd.hregs = &hpc3c0->scsi_chan0;
  69. sgiwd93_0_pd.wdregs = (unsigned char *) hpc3c0->scsi0_ext;
  70. res = platform_device_register(&sgiwd93_0_device);
  71. if (res)
  72. return res;
  73. if (!ip22_is_fullhouse())
  74. return 0;
  75. sgiwd93_1_pd.hregs = &hpc3c0->scsi_chan1;
  76. sgiwd93_1_pd.wdregs = (unsigned char *) hpc3c0->scsi1_ext;
  77. return platform_device_register(&sgiwd93_1_device);
  78. }
  79. device_initcall(sgiwd93_devinit);
  80. static struct resource sgiseeq_0_resources[] = {
  81. {
  82. .name = "eth0 irq",
  83. .start = SGI_ENET_IRQ,
  84. .end = SGI_ENET_IRQ,
  85. .flags = IORESOURCE_IRQ
  86. }
  87. };
  88. static struct sgiseeq_platform_data eth0_pd;
  89. static u64 sgiseeq_dma_mask = DMA_BIT_MASK(32);
  90. static struct platform_device eth0_device = {
  91. .name = "sgiseeq",
  92. .id = 0,
  93. .num_resources = ARRAY_SIZE(sgiseeq_0_resources),
  94. .resource = sgiseeq_0_resources,
  95. .dev = {
  96. .platform_data = &eth0_pd,
  97. .dma_mask = &sgiseeq_dma_mask,
  98. .coherent_dma_mask = DMA_BIT_MASK(32),
  99. },
  100. };
  101. static struct resource sgiseeq_1_resources[] = {
  102. {
  103. .name = "eth1 irq",
  104. .start = SGI_GIO_0_IRQ,
  105. .end = SGI_GIO_0_IRQ,
  106. .flags = IORESOURCE_IRQ
  107. }
  108. };
  109. static struct sgiseeq_platform_data eth1_pd;
  110. static struct platform_device eth1_device = {
  111. .name = "sgiseeq",
  112. .id = 1,
  113. .num_resources = ARRAY_SIZE(sgiseeq_1_resources),
  114. .resource = sgiseeq_1_resources,
  115. .dev = {
  116. .platform_data = &eth1_pd,
  117. },
  118. };
  119. /*
  120. * Create a platform device for the GPI port that receives the
  121. * image data from the embedded camera.
  122. */
  123. static int __init sgiseeq_devinit(void)
  124. {
  125. unsigned int pbdma __maybe_unused;
  126. int res, i;
  127. eth0_pd.hpc = hpc3c0;
  128. eth0_pd.irq = SGI_ENET_IRQ;
  129. #define EADDR_NVOFS 250
  130. for (i = 0; i < 3; i++) {
  131. unsigned short tmp = ip22_nvram_read(EADDR_NVOFS / 2 + i);
  132. eth0_pd.mac[2 * i] = tmp >> 8;
  133. eth0_pd.mac[2 * i + 1] = tmp & 0xff;
  134. }
  135. res = platform_device_register(&eth0_device);
  136. if (res)
  137. return res;
  138. /* Second HPC is missing? */
  139. if (ip22_is_fullhouse() ||
  140. get_dbe(pbdma, (unsigned int *)&hpc3c1->pbdma[1]))
  141. return 0;
  142. sgimc->giopar |= SGIMC_GIOPAR_MASTEREXP1 | SGIMC_GIOPAR_EXP164 |
  143. SGIMC_GIOPAR_HPC264;
  144. hpc3c1->pbus_piocfg[0][0] = 0x3ffff;
  145. /* interrupt/config register on Challenge S Mezz board */
  146. hpc3c1->pbus_extregs[0][0] = 0x30;
  147. eth1_pd.hpc = hpc3c1;
  148. eth1_pd.irq = SGI_GIO_0_IRQ;
  149. #define EADDR_NVOFS 250
  150. for (i = 0; i < 3; i++) {
  151. unsigned short tmp = ip22_eeprom_read(&hpc3c1->eeprom,
  152. EADDR_NVOFS / 2 + i);
  153. eth1_pd.mac[2 * i] = tmp >> 8;
  154. eth1_pd.mac[2 * i + 1] = tmp & 0xff;
  155. }
  156. return platform_device_register(&eth1_device);
  157. }
  158. device_initcall(sgiseeq_devinit);
  159. static int __init sgi_hal2_devinit(void)
  160. {
  161. return IS_ERR(platform_device_register_simple("sgihal2", 0, NULL, 0));
  162. }
  163. device_initcall(sgi_hal2_devinit);
  164. static int __init sgi_button_devinit(void)
  165. {
  166. if (ip22_is_fullhouse())
  167. return 0; /* full house has no volume buttons */
  168. return IS_ERR(platform_device_register_simple("sgibtns", -1, NULL, 0));
  169. }
  170. device_initcall(sgi_button_devinit);
  171. static int __init sgi_ds1286_devinit(void)
  172. {
  173. struct resource res;
  174. memset(&res, 0, sizeof(res));
  175. res.start = HPC3_CHIP0_BASE + offsetof(struct hpc3_regs, rtcregs);
  176. res.end = res.start + sizeof(hpc3c0->rtcregs) - 1;
  177. res.flags = IORESOURCE_MEM;
  178. return IS_ERR(platform_device_register_simple("rtc-ds1286", -1,
  179. &res, 1));
  180. }
  181. device_initcall(sgi_ds1286_devinit);