irq.c 1.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright (C) 2007 Lemote Inc. & Institute of Computing Technology
  4. * Author: Fuxin Zhang, [email protected]
  5. */
  6. #include <linux/interrupt.h>
  7. #include <asm/irq_cpu.h>
  8. #include <asm/i8259.h>
  9. #include <loongson.h>
  10. static void i8259_irqdispatch(void)
  11. {
  12. int irq;
  13. irq = i8259_irq();
  14. if (irq >= 0)
  15. do_IRQ(irq);
  16. else
  17. spurious_interrupt();
  18. }
  19. asmlinkage void mach_irq_dispatch(unsigned int pending)
  20. {
  21. if (pending & CAUSEF_IP7)
  22. do_IRQ(MIPS_CPU_IRQ_BASE + 7);
  23. else if (pending & CAUSEF_IP6) /* perf counter loverflow */
  24. return;
  25. else if (pending & CAUSEF_IP5)
  26. i8259_irqdispatch();
  27. else if (pending & CAUSEF_IP2)
  28. bonito_irqdispatch();
  29. else
  30. spurious_interrupt();
  31. }
  32. void __init mach_init_irq(void)
  33. {
  34. int irq;
  35. /* init all controller
  36. * 0-15 ------> i8259 interrupt
  37. * 16-23 ------> mips cpu interrupt
  38. * 32-63 ------> bonito irq
  39. */
  40. /* most bonito irq should be level triggered */
  41. LOONGSON_INTEDGE = LOONGSON_ICU_SYSTEMERR | LOONGSON_ICU_MASTERERR |
  42. LOONGSON_ICU_RETRYERR | LOONGSON_ICU_MBOXES;
  43. /* Sets the first-level interrupt dispatcher. */
  44. mips_cpu_irq_init();
  45. init_i8259_irqs();
  46. bonito_irq_init();
  47. /* bonito irq at IP2 */
  48. irq = MIPS_CPU_IRQ_BASE + 2;
  49. if (request_irq(irq, no_action, IRQF_NO_THREAD, "cascade", NULL))
  50. pr_err("Failed to request irq %d (cascade)\n", irq);
  51. /* 8259 irq at IP5 */
  52. irq = MIPS_CPU_IRQ_BASE + 5;
  53. if (request_irq(irq, no_action, IRQF_NO_THREAD, "cascade", NULL))
  54. pr_err("Failed to request irq %d (cascade)\n", irq);
  55. }