irq.c 1.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright (C) 2007 Lemote Inc. & Institute of Computing Technology
  4. * Author: Fuxin Zhang, [email protected]
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/interrupt.h>
  8. #include <loongson.h>
  9. /*
  10. * the first level int-handler will jump here if it is a bonito irq
  11. */
  12. void bonito_irqdispatch(void)
  13. {
  14. u32 int_status;
  15. int i;
  16. /* workaround the IO dma problem: let cpu looping to allow DMA finish */
  17. int_status = LOONGSON_INTISR;
  18. while (int_status & (1 << 10)) {
  19. udelay(1);
  20. int_status = LOONGSON_INTISR;
  21. }
  22. /* Get pending sources, masked by current enables */
  23. int_status = LOONGSON_INTISR & LOONGSON_INTEN;
  24. if (int_status) {
  25. i = __ffs(int_status);
  26. do_IRQ(LOONGSON_IRQ_BASE + i);
  27. }
  28. }
  29. asmlinkage void plat_irq_dispatch(void)
  30. {
  31. unsigned int pending;
  32. pending = read_c0_cause() & read_c0_status() & ST0_IM;
  33. /* machine-specific plat_irq_dispatch */
  34. mach_irq_dispatch(pending);
  35. }
  36. void __init arch_init_irq(void)
  37. {
  38. /*
  39. * Clear all of the interrupts while we change the able around a bit.
  40. * int-handler is not on bootstrap
  41. */
  42. clear_c0_status(ST0_IM | ST0_BEV);
  43. /* no steer */
  44. LOONGSON_INTSTEER = 0;
  45. /*
  46. * Mask out all interrupt by writing "1" to all bit position in
  47. * the interrupt reset reg.
  48. */
  49. LOONGSON_INTENCLR = ~0;
  50. /* machine specific irq init */
  51. mach_init_irq();
  52. }