cvmx-sli-defs.h 4.0 KB

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  1. /***********************license start***************
  2. * Author: Cavium Networks
  3. *
  4. * Contact: [email protected]
  5. * This file is part of the OCTEON SDK
  6. *
  7. * Copyright (c) 2003-2017 Cavium, Inc.
  8. *
  9. * This file is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License, Version 2, as
  11. * published by the Free Software Foundation.
  12. *
  13. * This file is distributed in the hope that it will be useful, but
  14. * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
  15. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
  16. * NONINFRINGEMENT. See the GNU General Public License for more
  17. * details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this file; if not, write to the Free Software
  21. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  22. * or visit http://www.gnu.org/licenses/.
  23. *
  24. * This file may also be available under a different license from Cavium.
  25. * Contact Cavium Networks for more information
  26. ***********************license end**************************************/
  27. #ifndef __CVMX_SLI_DEFS_H__
  28. #define __CVMX_SLI_DEFS_H__
  29. #include <uapi/asm/bitfield.h>
  30. #define CVMX_SLI_PCIE_MSI_RCV CVMX_SLI_PCIE_MSI_RCV_FUNC()
  31. static inline uint64_t CVMX_SLI_PCIE_MSI_RCV_FUNC(void)
  32. {
  33. switch (cvmx_get_octeon_family()) {
  34. case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
  35. case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
  36. case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
  37. case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
  38. case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
  39. case OCTEON_CN70XX & OCTEON_FAMILY_MASK:
  40. return 0x0000000000003CB0ull;
  41. case OCTEON_CNF75XX & OCTEON_FAMILY_MASK:
  42. case OCTEON_CN73XX & OCTEON_FAMILY_MASK:
  43. case OCTEON_CN78XX & OCTEON_FAMILY_MASK:
  44. if (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))
  45. return 0x0000000000003CB0ull;
  46. fallthrough;
  47. default:
  48. return 0x0000000000023CB0ull;
  49. }
  50. }
  51. union cvmx_sli_ctl_portx {
  52. uint64_t u64;
  53. struct cvmx_sli_ctl_portx_s {
  54. __BITFIELD_FIELD(uint64_t reserved_22_63:42,
  55. __BITFIELD_FIELD(uint64_t intd:1,
  56. __BITFIELD_FIELD(uint64_t intc:1,
  57. __BITFIELD_FIELD(uint64_t intb:1,
  58. __BITFIELD_FIELD(uint64_t inta:1,
  59. __BITFIELD_FIELD(uint64_t dis_port:1,
  60. __BITFIELD_FIELD(uint64_t waitl_com:1,
  61. __BITFIELD_FIELD(uint64_t intd_map:2,
  62. __BITFIELD_FIELD(uint64_t intc_map:2,
  63. __BITFIELD_FIELD(uint64_t intb_map:2,
  64. __BITFIELD_FIELD(uint64_t inta_map:2,
  65. __BITFIELD_FIELD(uint64_t ctlp_ro:1,
  66. __BITFIELD_FIELD(uint64_t reserved_6_6:1,
  67. __BITFIELD_FIELD(uint64_t ptlp_ro:1,
  68. __BITFIELD_FIELD(uint64_t reserved_1_4:4,
  69. __BITFIELD_FIELD(uint64_t wait_com:1,
  70. ;))))))))))))))))
  71. } s;
  72. };
  73. union cvmx_sli_mem_access_ctl {
  74. uint64_t u64;
  75. struct cvmx_sli_mem_access_ctl_s {
  76. __BITFIELD_FIELD(uint64_t reserved_14_63:50,
  77. __BITFIELD_FIELD(uint64_t max_word:4,
  78. __BITFIELD_FIELD(uint64_t timer:10,
  79. ;)))
  80. } s;
  81. };
  82. union cvmx_sli_s2m_portx_ctl {
  83. uint64_t u64;
  84. struct cvmx_sli_s2m_portx_ctl_s {
  85. __BITFIELD_FIELD(uint64_t reserved_5_63:59,
  86. __BITFIELD_FIELD(uint64_t wind_d:1,
  87. __BITFIELD_FIELD(uint64_t bar0_d:1,
  88. __BITFIELD_FIELD(uint64_t mrrs:3,
  89. ;))))
  90. } s;
  91. };
  92. union cvmx_sli_mem_access_subidx {
  93. uint64_t u64;
  94. struct cvmx_sli_mem_access_subidx_s {
  95. __BITFIELD_FIELD(uint64_t reserved_43_63:21,
  96. __BITFIELD_FIELD(uint64_t zero:1,
  97. __BITFIELD_FIELD(uint64_t port:3,
  98. __BITFIELD_FIELD(uint64_t nmerge:1,
  99. __BITFIELD_FIELD(uint64_t esr:2,
  100. __BITFIELD_FIELD(uint64_t esw:2,
  101. __BITFIELD_FIELD(uint64_t wtype:2,
  102. __BITFIELD_FIELD(uint64_t rtype:2,
  103. __BITFIELD_FIELD(uint64_t ba:30,
  104. ;)))))))))
  105. } s;
  106. struct cvmx_sli_mem_access_subidx_cn68xx {
  107. __BITFIELD_FIELD(uint64_t reserved_43_63:21,
  108. __BITFIELD_FIELD(uint64_t zero:1,
  109. __BITFIELD_FIELD(uint64_t port:3,
  110. __BITFIELD_FIELD(uint64_t nmerge:1,
  111. __BITFIELD_FIELD(uint64_t esr:2,
  112. __BITFIELD_FIELD(uint64_t esw:2,
  113. __BITFIELD_FIELD(uint64_t wtype:2,
  114. __BITFIELD_FIELD(uint64_t rtype:2,
  115. __BITFIELD_FIELD(uint64_t ba:28,
  116. __BITFIELD_FIELD(uint64_t reserved_0_1:2,
  117. ;))))))))))
  118. } cn68xx;
  119. };
  120. #endif