rb.h 1.4 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. /*
  3. *
  4. * Copyright (C) 2004 IDT Inc.
  5. * Copyright (C) 2006 Felix Fietkau <[email protected]>
  6. */
  7. #ifndef __ASM_RC32434_RB_H
  8. #define __ASM_RC32434_RB_H
  9. #define REGBASE 0x18000000
  10. #define IDT434_REG_BASE ((volatile void *) KSEG1ADDR(REGBASE))
  11. #define UART0BASE 0x58000
  12. #define RST (1 << 15)
  13. #define DEV0BASE 0x010000
  14. #define DEV0MASK 0x010004
  15. #define DEV0C 0x010008
  16. #define DEV0T 0x01000C
  17. #define DEV1BASE 0x010010
  18. #define DEV1MASK 0x010014
  19. #define DEV1C 0x010018
  20. #define DEV1TC 0x01001C
  21. #define DEV2BASE 0x010020
  22. #define DEV2MASK 0x010024
  23. #define DEV2C 0x010028
  24. #define DEV2TC 0x01002C
  25. #define DEV3BASE 0x010030
  26. #define DEV3MASK 0x010034
  27. #define DEV3C 0x010038
  28. #define DEV3TC 0x01003C
  29. #define BTCS 0x010040
  30. #define BTCOMPARE 0x010044
  31. #define LO_WPX (1 << 0)
  32. #define LO_ALE (1 << 1)
  33. #define LO_CLE (1 << 2)
  34. #define LO_CEX (1 << 3)
  35. #define LO_FOFF (1 << 5)
  36. #define LO_SPICS (1 << 6)
  37. #define LO_ULED (1 << 7)
  38. #define BIT_TO_MASK(x) (1 << x)
  39. struct dev_reg {
  40. u32 base;
  41. u32 mask;
  42. u32 ctl;
  43. u32 timing;
  44. };
  45. struct korina_device {
  46. char *name;
  47. unsigned char mac[6];
  48. struct net_device *dev;
  49. };
  50. struct mpmc_device {
  51. unsigned char state;
  52. spinlock_t lock;
  53. void __iomem *base;
  54. };
  55. extern void set_latch_u5(unsigned char or_mask, unsigned char nand_mask);
  56. extern unsigned char get_latch_u5(void);
  57. #endif /* __ASM_RC32434_RB_H */