irq.h 3.3 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. /*
  3. * Copyright (c) 2011 Zhang, Keguang <[email protected]>
  4. *
  5. * IRQ mappings for Loongson 1
  6. */
  7. #ifndef __ASM_MACH_LOONGSON32_IRQ_H
  8. #define __ASM_MACH_LOONGSON32_IRQ_H
  9. /*
  10. * CPU core Interrupt Numbers
  11. */
  12. #define MIPS_CPU_IRQ_BASE 0
  13. #define MIPS_CPU_IRQ(x) (MIPS_CPU_IRQ_BASE + (x))
  14. #define SOFTINT0_IRQ MIPS_CPU_IRQ(0)
  15. #define SOFTINT1_IRQ MIPS_CPU_IRQ(1)
  16. #define INT0_IRQ MIPS_CPU_IRQ(2)
  17. #define INT1_IRQ MIPS_CPU_IRQ(3)
  18. #define INT2_IRQ MIPS_CPU_IRQ(4)
  19. #define INT3_IRQ MIPS_CPU_IRQ(5)
  20. #define INT4_IRQ MIPS_CPU_IRQ(6)
  21. #define TIMER_IRQ MIPS_CPU_IRQ(7) /* cpu timer */
  22. #define MIPS_CPU_IRQS (MIPS_CPU_IRQ(7) + 1 - MIPS_CPU_IRQ_BASE)
  23. /*
  24. * INT0~3 Interrupt Numbers
  25. */
  26. #define LS1X_IRQ_BASE MIPS_CPU_IRQS
  27. #define LS1X_IRQ(n, x) (LS1X_IRQ_BASE + (n << 5) + (x))
  28. #define LS1X_UART0_IRQ LS1X_IRQ(0, 2)
  29. #if defined(CONFIG_LOONGSON1_LS1B)
  30. #define LS1X_UART1_IRQ LS1X_IRQ(0, 3)
  31. #define LS1X_UART2_IRQ LS1X_IRQ(0, 4)
  32. #define LS1X_UART3_IRQ LS1X_IRQ(0, 5)
  33. #elif defined(CONFIG_LOONGSON1_LS1C)
  34. #define LS1X_UART1_IRQ LS1X_IRQ(0, 4)
  35. #define LS1X_UART2_IRQ LS1X_IRQ(0, 5)
  36. #endif
  37. #define LS1X_CAN0_IRQ LS1X_IRQ(0, 6)
  38. #define LS1X_CAN1_IRQ LS1X_IRQ(0, 7)
  39. #define LS1X_SPI0_IRQ LS1X_IRQ(0, 8)
  40. #define LS1X_SPI1_IRQ LS1X_IRQ(0, 9)
  41. #define LS1X_AC97_IRQ LS1X_IRQ(0, 10)
  42. #define LS1X_DMA0_IRQ LS1X_IRQ(0, 13)
  43. #define LS1X_DMA1_IRQ LS1X_IRQ(0, 14)
  44. #define LS1X_DMA2_IRQ LS1X_IRQ(0, 15)
  45. #if defined(CONFIG_LOONGSON1_LS1C)
  46. #define LS1X_NAND_IRQ LS1X_IRQ(0, 16)
  47. #endif
  48. #define LS1X_PWM0_IRQ LS1X_IRQ(0, 17)
  49. #define LS1X_PWM1_IRQ LS1X_IRQ(0, 18)
  50. #define LS1X_PWM2_IRQ LS1X_IRQ(0, 19)
  51. #define LS1X_PWM3_IRQ LS1X_IRQ(0, 20)
  52. #define LS1X_RTC_INT0_IRQ LS1X_IRQ(0, 21)
  53. #define LS1X_RTC_INT1_IRQ LS1X_IRQ(0, 22)
  54. #define LS1X_RTC_INT2_IRQ LS1X_IRQ(0, 23)
  55. #if defined(CONFIG_LOONGSON1_LS1B)
  56. #define LS1X_TOY_INT0_IRQ LS1X_IRQ(0, 24)
  57. #define LS1X_TOY_INT1_IRQ LS1X_IRQ(0, 25)
  58. #define LS1X_TOY_INT2_IRQ LS1X_IRQ(0, 26)
  59. #define LS1X_RTC_TICK_IRQ LS1X_IRQ(0, 27)
  60. #define LS1X_TOY_TICK_IRQ LS1X_IRQ(0, 28)
  61. #define LS1X_UART4_IRQ LS1X_IRQ(0, 29)
  62. #define LS1X_UART5_IRQ LS1X_IRQ(0, 30)
  63. #elif defined(CONFIG_LOONGSON1_LS1C)
  64. #define LS1X_UART3_IRQ LS1X_IRQ(0, 29)
  65. #define LS1X_ADC_IRQ LS1X_IRQ(0, 30)
  66. #define LS1X_SDIO_IRQ LS1X_IRQ(0, 31)
  67. #endif
  68. #define LS1X_EHCI_IRQ LS1X_IRQ(1, 0)
  69. #define LS1X_OHCI_IRQ LS1X_IRQ(1, 1)
  70. #if defined(CONFIG_LOONGSON1_LS1B)
  71. #define LS1X_GMAC0_IRQ LS1X_IRQ(1, 2)
  72. #define LS1X_GMAC1_IRQ LS1X_IRQ(1, 3)
  73. #elif defined(CONFIG_LOONGSON1_LS1C)
  74. #define LS1X_OTG_IRQ LS1X_IRQ(1, 2)
  75. #define LS1X_GMAC0_IRQ LS1X_IRQ(1, 3)
  76. #define LS1X_CAM_IRQ LS1X_IRQ(1, 4)
  77. #define LS1X_UART4_IRQ LS1X_IRQ(1, 5)
  78. #define LS1X_UART5_IRQ LS1X_IRQ(1, 6)
  79. #define LS1X_UART6_IRQ LS1X_IRQ(1, 7)
  80. #define LS1X_UART7_IRQ LS1X_IRQ(1, 8)
  81. #define LS1X_UART8_IRQ LS1X_IRQ(1, 9)
  82. #define LS1X_UART9_IRQ LS1X_IRQ(1, 13)
  83. #define LS1X_UART10_IRQ LS1X_IRQ(1, 14)
  84. #define LS1X_UART11_IRQ LS1X_IRQ(1, 15)
  85. #define LS1X_I2C0_IRQ LS1X_IRQ(1, 17)
  86. #define LS1X_I2C1_IRQ LS1X_IRQ(1, 18)
  87. #define LS1X_I2C2_IRQ LS1X_IRQ(1, 19)
  88. #endif
  89. #if defined(CONFIG_LOONGSON1_LS1B)
  90. #define INTN 4
  91. #elif defined(CONFIG_LOONGSON1_LS1C)
  92. #define INTN 5
  93. #endif
  94. #define LS1X_IRQS (LS1X_IRQ(INTN, 31) + 1 - LS1X_IRQ_BASE)
  95. #define NR_IRQS (MIPS_CPU_IRQS + LS1X_IRQS)
  96. #endif /* __ASM_MACH_LOONGSON32_IRQ_H */